1*4882a593Smuzhiyun /* SPDX-License-Identifier: MIT */
2*4882a593Smuzhiyun #ifndef __NOUVEAU_DRV_H__
3*4882a593Smuzhiyun #define __NOUVEAU_DRV_H__
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #define DRIVER_AUTHOR "Nouveau Project"
6*4882a593Smuzhiyun #define DRIVER_EMAIL "nouveau@lists.freedesktop.org"
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #define DRIVER_NAME "nouveau"
9*4882a593Smuzhiyun #define DRIVER_DESC "nVidia Riva/TNT/GeForce/Quadro/Tesla/Tegra K1+"
10*4882a593Smuzhiyun #define DRIVER_DATE "20120801"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #define DRIVER_MAJOR 1
13*4882a593Smuzhiyun #define DRIVER_MINOR 3
14*4882a593Smuzhiyun #define DRIVER_PATCHLEVEL 1
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun * 1.1.1:
18*4882a593Smuzhiyun * - added support for tiled system memory buffer objects
19*4882a593Smuzhiyun * - added support for NOUVEAU_GETPARAM_GRAPH_UNITS on [nvc0,nve0].
20*4882a593Smuzhiyun * - added support for compressed memory storage types on [nvc0,nve0].
21*4882a593Smuzhiyun * - added support for software methods 0x600,0x644,0x6ac on nvc0
22*4882a593Smuzhiyun * to control registers on the MPs to enable performance counters,
23*4882a593Smuzhiyun * and to control the warp error enable mask (OpenGL requires out of
24*4882a593Smuzhiyun * bounds access to local memory to be silently ignored / return 0).
25*4882a593Smuzhiyun * 1.1.2:
26*4882a593Smuzhiyun * - fixes multiple bugs in flip completion events and timestamping
27*4882a593Smuzhiyun * 1.2.0:
28*4882a593Smuzhiyun * - object api exposed to userspace
29*4882a593Smuzhiyun * - fermi,kepler,maxwell zbc
30*4882a593Smuzhiyun * 1.2.1:
31*4882a593Smuzhiyun * - allow concurrent access to bo's mapped read/write.
32*4882a593Smuzhiyun * 1.2.2:
33*4882a593Smuzhiyun * - add NOUVEAU_GEM_DOMAIN_COHERENT flag
34*4882a593Smuzhiyun * 1.3.0:
35*4882a593Smuzhiyun * - NVIF ABI modified, safe because only (current) users are test
36*4882a593Smuzhiyun * programs that get directly linked with NVKM.
37*4882a593Smuzhiyun * 1.3.1:
38*4882a593Smuzhiyun * - implemented limited ABI16/NVIF interop
39*4882a593Smuzhiyun */
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #include <linux/notifier.h>
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #include <nvif/client.h>
44*4882a593Smuzhiyun #include <nvif/device.h>
45*4882a593Smuzhiyun #include <nvif/ioctl.h>
46*4882a593Smuzhiyun #include <nvif/mmu.h>
47*4882a593Smuzhiyun #include <nvif/vmm.h>
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #include <drm/drm_connector.h>
50*4882a593Smuzhiyun #include <drm/drm_device.h>
51*4882a593Smuzhiyun #include <drm/drm_drv.h>
52*4882a593Smuzhiyun #include <drm/drm_file.h>
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #include <drm/ttm/ttm_bo_api.h>
55*4882a593Smuzhiyun #include <drm/ttm/ttm_bo_driver.h>
56*4882a593Smuzhiyun #include <drm/ttm/ttm_placement.h>
57*4882a593Smuzhiyun #include <drm/ttm/ttm_memory.h>
58*4882a593Smuzhiyun #include <drm/ttm/ttm_module.h>
59*4882a593Smuzhiyun #include <drm/ttm/ttm_page_alloc.h>
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #include <drm/drm_audio_component.h>
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun #include "uapi/drm/nouveau_drm.h"
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun struct nouveau_channel;
66*4882a593Smuzhiyun struct platform_device;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun #include "nouveau_fence.h"
69*4882a593Smuzhiyun #include "nouveau_bios.h"
70*4882a593Smuzhiyun #include "nouveau_vmm.h"
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun struct nouveau_drm_tile {
73*4882a593Smuzhiyun struct nouveau_fence *fence;
74*4882a593Smuzhiyun bool used;
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun enum nouveau_drm_object_route {
78*4882a593Smuzhiyun NVDRM_OBJECT_NVIF = NVIF_IOCTL_V0_OWNER_NVIF,
79*4882a593Smuzhiyun NVDRM_OBJECT_USIF,
80*4882a593Smuzhiyun NVDRM_OBJECT_ABI16,
81*4882a593Smuzhiyun NVDRM_OBJECT_ANY = NVIF_IOCTL_V0_OWNER_ANY,
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun enum nouveau_drm_notify_route {
85*4882a593Smuzhiyun NVDRM_NOTIFY_NVIF = 0,
86*4882a593Smuzhiyun NVDRM_NOTIFY_USIF
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun enum nouveau_drm_handle {
90*4882a593Smuzhiyun NVDRM_CHAN = 0xcccc0000, /* |= client chid */
91*4882a593Smuzhiyun NVDRM_NVSW = 0x55550000,
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun struct nouveau_cli {
95*4882a593Smuzhiyun struct nvif_client base;
96*4882a593Smuzhiyun struct nouveau_drm *drm;
97*4882a593Smuzhiyun struct mutex mutex;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun struct nvif_device device;
100*4882a593Smuzhiyun struct nvif_mmu mmu;
101*4882a593Smuzhiyun struct nouveau_vmm vmm;
102*4882a593Smuzhiyun struct nouveau_vmm svm;
103*4882a593Smuzhiyun const struct nvif_mclass *mem;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun struct list_head head;
106*4882a593Smuzhiyun void *abi16;
107*4882a593Smuzhiyun struct list_head objects;
108*4882a593Smuzhiyun struct list_head notifys;
109*4882a593Smuzhiyun char name[32];
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun struct work_struct work;
112*4882a593Smuzhiyun struct list_head worker;
113*4882a593Smuzhiyun struct mutex lock;
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun struct nouveau_cli_work {
117*4882a593Smuzhiyun void (*func)(struct nouveau_cli_work *);
118*4882a593Smuzhiyun struct nouveau_cli *cli;
119*4882a593Smuzhiyun struct list_head head;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun struct dma_fence *fence;
122*4882a593Smuzhiyun struct dma_fence_cb cb;
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun void nouveau_cli_work_queue(struct nouveau_cli *, struct dma_fence *,
126*4882a593Smuzhiyun struct nouveau_cli_work *);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun static inline struct nouveau_cli *
nouveau_cli(struct drm_file * fpriv)129*4882a593Smuzhiyun nouveau_cli(struct drm_file *fpriv)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun return fpriv ? fpriv->driver_priv : NULL;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun #include <nvif/object.h>
135*4882a593Smuzhiyun #include <nvif/parent.h>
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun struct nouveau_drm {
138*4882a593Smuzhiyun struct nvif_parent parent;
139*4882a593Smuzhiyun struct nouveau_cli master;
140*4882a593Smuzhiyun struct nouveau_cli client;
141*4882a593Smuzhiyun struct drm_device *dev;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun struct list_head clients;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /**
146*4882a593Smuzhiyun * @clients_lock: Protects access to the @clients list of &struct nouveau_cli.
147*4882a593Smuzhiyun */
148*4882a593Smuzhiyun struct mutex clients_lock;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun u8 old_pm_cap;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun struct {
153*4882a593Smuzhiyun struct agp_bridge_data *bridge;
154*4882a593Smuzhiyun u32 base;
155*4882a593Smuzhiyun u32 size;
156*4882a593Smuzhiyun bool cma;
157*4882a593Smuzhiyun } agp;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun /* TTM interface support */
160*4882a593Smuzhiyun struct {
161*4882a593Smuzhiyun struct ttm_bo_device bdev;
162*4882a593Smuzhiyun atomic_t validate_sequence;
163*4882a593Smuzhiyun int (*move)(struct nouveau_channel *,
164*4882a593Smuzhiyun struct ttm_buffer_object *,
165*4882a593Smuzhiyun struct ttm_resource *, struct ttm_resource *);
166*4882a593Smuzhiyun struct nouveau_channel *chan;
167*4882a593Smuzhiyun struct nvif_object copy;
168*4882a593Smuzhiyun int mtrr;
169*4882a593Smuzhiyun int type_vram;
170*4882a593Smuzhiyun int type_host[2];
171*4882a593Smuzhiyun int type_ncoh[2];
172*4882a593Smuzhiyun struct mutex io_reserve_mutex;
173*4882a593Smuzhiyun struct list_head io_reserve_lru;
174*4882a593Smuzhiyun } ttm;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun /* GEM interface support */
177*4882a593Smuzhiyun struct {
178*4882a593Smuzhiyun u64 vram_available;
179*4882a593Smuzhiyun u64 gart_available;
180*4882a593Smuzhiyun } gem;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun /* synchronisation */
183*4882a593Smuzhiyun void *fence;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /* Global channel management. */
186*4882a593Smuzhiyun struct {
187*4882a593Smuzhiyun int nr;
188*4882a593Smuzhiyun u64 context_base;
189*4882a593Smuzhiyun } chan;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /* context for accelerated drm-internal operations */
192*4882a593Smuzhiyun struct nouveau_channel *cechan;
193*4882a593Smuzhiyun struct nouveau_channel *channel;
194*4882a593Smuzhiyun struct nvkm_gpuobj *notify;
195*4882a593Smuzhiyun struct nouveau_fbdev *fbcon;
196*4882a593Smuzhiyun struct nvif_object ntfy;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /* nv10-nv40 tiling regions */
199*4882a593Smuzhiyun struct {
200*4882a593Smuzhiyun struct nouveau_drm_tile reg[15];
201*4882a593Smuzhiyun spinlock_t lock;
202*4882a593Smuzhiyun } tile;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /* modesetting */
205*4882a593Smuzhiyun struct nvbios vbios;
206*4882a593Smuzhiyun struct nouveau_display *display;
207*4882a593Smuzhiyun struct work_struct hpd_work;
208*4882a593Smuzhiyun struct mutex hpd_lock;
209*4882a593Smuzhiyun u32 hpd_pending;
210*4882a593Smuzhiyun struct work_struct fbcon_work;
211*4882a593Smuzhiyun int fbcon_new_state;
212*4882a593Smuzhiyun #ifdef CONFIG_ACPI
213*4882a593Smuzhiyun struct notifier_block acpi_nb;
214*4882a593Smuzhiyun #endif
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun /* power management */
217*4882a593Smuzhiyun struct nouveau_hwmon *hwmon;
218*4882a593Smuzhiyun struct nouveau_debugfs *debugfs;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun /* led management */
221*4882a593Smuzhiyun struct nouveau_led *led;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun struct dev_pm_domain vga_pm_domain;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun struct nouveau_svm *svm;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun struct nouveau_dmem *dmem;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun struct {
230*4882a593Smuzhiyun struct drm_audio_component *component;
231*4882a593Smuzhiyun bool component_registered;
232*4882a593Smuzhiyun } audio;
233*4882a593Smuzhiyun };
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun static inline struct nouveau_drm *
nouveau_drm(struct drm_device * dev)236*4882a593Smuzhiyun nouveau_drm(struct drm_device *dev)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun return dev->dev_private;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun static inline bool
nouveau_drm_use_coherent_gpu_mapping(struct nouveau_drm * drm)242*4882a593Smuzhiyun nouveau_drm_use_coherent_gpu_mapping(struct nouveau_drm *drm)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun struct nvif_mmu *mmu = &drm->client.mmu;
245*4882a593Smuzhiyun return !(mmu->type[drm->ttm.type_host[0]].type & NVIF_MEM_UNCACHED);
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun int nouveau_pmops_suspend(struct device *);
249*4882a593Smuzhiyun int nouveau_pmops_resume(struct device *);
250*4882a593Smuzhiyun bool nouveau_pmops_runtime(void);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun #include <nvkm/core/tegra.h>
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun struct drm_device *
255*4882a593Smuzhiyun nouveau_platform_device_create(const struct nvkm_device_tegra_func *,
256*4882a593Smuzhiyun struct platform_device *, struct nvkm_device **);
257*4882a593Smuzhiyun void nouveau_drm_device_remove(struct drm_device *dev);
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun #define NV_PRINTK(l,c,f,a...) do { \
260*4882a593Smuzhiyun struct nouveau_cli *_cli = (c); \
261*4882a593Smuzhiyun dev_##l(_cli->drm->dev->dev, "%s: "f, _cli->name, ##a); \
262*4882a593Smuzhiyun } while(0)
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun #define NV_FATAL(drm,f,a...) NV_PRINTK(crit, &(drm)->client, f, ##a)
265*4882a593Smuzhiyun #define NV_ERROR(drm,f,a...) NV_PRINTK(err, &(drm)->client, f, ##a)
266*4882a593Smuzhiyun #define NV_WARN(drm,f,a...) NV_PRINTK(warn, &(drm)->client, f, ##a)
267*4882a593Smuzhiyun #define NV_INFO(drm,f,a...) NV_PRINTK(info, &(drm)->client, f, ##a)
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun #define NV_DEBUG(drm,f,a...) do { \
270*4882a593Smuzhiyun if (drm_debug_enabled(DRM_UT_DRIVER)) \
271*4882a593Smuzhiyun NV_PRINTK(info, &(drm)->client, f, ##a); \
272*4882a593Smuzhiyun } while(0)
273*4882a593Smuzhiyun #define NV_ATOMIC(drm,f,a...) do { \
274*4882a593Smuzhiyun if (drm_debug_enabled(DRM_UT_ATOMIC)) \
275*4882a593Smuzhiyun NV_PRINTK(info, &(drm)->client, f, ##a); \
276*4882a593Smuzhiyun } while(0)
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun #define NV_PRINTK_ONCE(l,c,f,a...) NV_PRINTK(l##_once,c,f, ##a)
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun #define NV_ERROR_ONCE(drm,f,a...) NV_PRINTK_ONCE(err, &(drm)->client, f, ##a)
281*4882a593Smuzhiyun #define NV_WARN_ONCE(drm,f,a...) NV_PRINTK_ONCE(warn, &(drm)->client, f, ##a)
282*4882a593Smuzhiyun #define NV_INFO_ONCE(drm,f,a...) NV_PRINTK_ONCE(info, &(drm)->client, f, ##a)
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun extern int nouveau_modeset;
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun #endif
287