1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2008 Maarten Maathuis.
3*4882a593Smuzhiyun * All Rights Reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining
6*4882a593Smuzhiyun * a copy of this software and associated documentation files (the
7*4882a593Smuzhiyun * "Software"), to deal in the Software without restriction, including
8*4882a593Smuzhiyun * without limitation the rights to use, copy, modify, merge, publish,
9*4882a593Smuzhiyun * distribute, sublicense, and/or sell copies of the Software, and to
10*4882a593Smuzhiyun * permit persons to whom the Software is furnished to do so, subject to
11*4882a593Smuzhiyun * the following conditions:
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the
14*4882a593Smuzhiyun * next paragraph) shall be included in all copies or substantial
15*4882a593Smuzhiyun * portions of the Software.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20*4882a593Smuzhiyun * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21*4882a593Smuzhiyun * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22*4882a593Smuzhiyun * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23*4882a593Smuzhiyun * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24*4882a593Smuzhiyun *
25*4882a593Smuzhiyun */
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #include <acpi/video.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include <drm/drm_atomic.h>
30*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
31*4882a593Smuzhiyun #include <drm/drm_crtc_helper.h>
32*4882a593Smuzhiyun #include <drm/drm_fb_helper.h>
33*4882a593Smuzhiyun #include <drm/drm_fourcc.h>
34*4882a593Smuzhiyun #include <drm/drm_gem_framebuffer_helper.h>
35*4882a593Smuzhiyun #include <drm/drm_probe_helper.h>
36*4882a593Smuzhiyun #include <drm/drm_vblank.h>
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #include "nouveau_fbcon.h"
39*4882a593Smuzhiyun #include "nouveau_crtc.h"
40*4882a593Smuzhiyun #include "nouveau_gem.h"
41*4882a593Smuzhiyun #include "nouveau_connector.h"
42*4882a593Smuzhiyun #include "nv50_display.h"
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #include <nvif/class.h>
45*4882a593Smuzhiyun #include <nvif/cl0046.h>
46*4882a593Smuzhiyun #include <nvif/event.h>
47*4882a593Smuzhiyun #include <dispnv50/crc.h>
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun int
nouveau_display_vblank_enable(struct drm_crtc * crtc)50*4882a593Smuzhiyun nouveau_display_vblank_enable(struct drm_crtc *crtc)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun struct nouveau_crtc *nv_crtc;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun nv_crtc = nouveau_crtc(crtc);
55*4882a593Smuzhiyun nvif_notify_get(&nv_crtc->vblank);
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun return 0;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun void
nouveau_display_vblank_disable(struct drm_crtc * crtc)61*4882a593Smuzhiyun nouveau_display_vblank_disable(struct drm_crtc *crtc)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct nouveau_crtc *nv_crtc;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun nv_crtc = nouveau_crtc(crtc);
66*4882a593Smuzhiyun nvif_notify_put(&nv_crtc->vblank);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun static inline int
calc(int blanks,int blanke,int total,int line)70*4882a593Smuzhiyun calc(int blanks, int blanke, int total, int line)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun if (blanke >= blanks) {
73*4882a593Smuzhiyun if (line >= blanks)
74*4882a593Smuzhiyun line -= total;
75*4882a593Smuzhiyun } else {
76*4882a593Smuzhiyun if (line >= blanks)
77*4882a593Smuzhiyun line -= total;
78*4882a593Smuzhiyun line -= blanke + 1;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun return line;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun static bool
nouveau_display_scanoutpos_head(struct drm_crtc * crtc,int * vpos,int * hpos,ktime_t * stime,ktime_t * etime)84*4882a593Smuzhiyun nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,
85*4882a593Smuzhiyun ktime_t *stime, ktime_t *etime)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun struct {
88*4882a593Smuzhiyun struct nv04_disp_mthd_v0 base;
89*4882a593Smuzhiyun struct nv04_disp_scanoutpos_v0 scan;
90*4882a593Smuzhiyun } args = {
91*4882a593Smuzhiyun .base.method = NV04_DISP_SCANOUTPOS,
92*4882a593Smuzhiyun .base.head = nouveau_crtc(crtc)->index,
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun struct nouveau_display *disp = nouveau_display(crtc->dev);
95*4882a593Smuzhiyun struct drm_vblank_crtc *vblank = &crtc->dev->vblank[drm_crtc_index(crtc)];
96*4882a593Smuzhiyun int retry = 20;
97*4882a593Smuzhiyun bool ret = false;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun do {
100*4882a593Smuzhiyun ret = nvif_mthd(&disp->disp.object, 0, &args, sizeof(args));
101*4882a593Smuzhiyun if (ret != 0)
102*4882a593Smuzhiyun return false;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun if (args.scan.vline) {
105*4882a593Smuzhiyun ret = true;
106*4882a593Smuzhiyun break;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun if (retry) ndelay(vblank->linedur_ns);
110*4882a593Smuzhiyun } while (retry--);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun *hpos = args.scan.hline;
113*4882a593Smuzhiyun *vpos = calc(args.scan.vblanks, args.scan.vblanke,
114*4882a593Smuzhiyun args.scan.vtotal, args.scan.vline);
115*4882a593Smuzhiyun if (stime) *stime = ns_to_ktime(args.scan.time[0]);
116*4882a593Smuzhiyun if (etime) *etime = ns_to_ktime(args.scan.time[1]);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun return ret;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun bool
nouveau_display_scanoutpos(struct drm_crtc * crtc,bool in_vblank_irq,int * vpos,int * hpos,ktime_t * stime,ktime_t * etime,const struct drm_display_mode * mode)122*4882a593Smuzhiyun nouveau_display_scanoutpos(struct drm_crtc *crtc,
123*4882a593Smuzhiyun bool in_vblank_irq, int *vpos, int *hpos,
124*4882a593Smuzhiyun ktime_t *stime, ktime_t *etime,
125*4882a593Smuzhiyun const struct drm_display_mode *mode)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun return nouveau_display_scanoutpos_head(crtc, vpos, hpos,
128*4882a593Smuzhiyun stime, etime);
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
132*4882a593Smuzhiyun .destroy = drm_gem_fb_destroy,
133*4882a593Smuzhiyun .create_handle = drm_gem_fb_create_handle,
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun static void
nouveau_decode_mod(struct nouveau_drm * drm,uint64_t modifier,uint32_t * tile_mode,uint8_t * kind)137*4882a593Smuzhiyun nouveau_decode_mod(struct nouveau_drm *drm,
138*4882a593Smuzhiyun uint64_t modifier,
139*4882a593Smuzhiyun uint32_t *tile_mode,
140*4882a593Smuzhiyun uint8_t *kind)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun struct nouveau_display *disp = nouveau_display(drm->dev);
143*4882a593Smuzhiyun BUG_ON(!tile_mode || !kind);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun if (modifier == DRM_FORMAT_MOD_LINEAR) {
146*4882a593Smuzhiyun /* tile_mode will not be used in this case */
147*4882a593Smuzhiyun *tile_mode = 0;
148*4882a593Smuzhiyun *kind = 0;
149*4882a593Smuzhiyun } else {
150*4882a593Smuzhiyun /*
151*4882a593Smuzhiyun * Extract the block height and kind from the corresponding
152*4882a593Smuzhiyun * modifier fields. See drm_fourcc.h for details.
153*4882a593Smuzhiyun */
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun if ((modifier & (0xffull << 12)) == 0ull) {
156*4882a593Smuzhiyun /* Legacy modifier. Translate to this dev's 'kind.' */
157*4882a593Smuzhiyun modifier |= disp->format_modifiers[0] & (0xffull << 12);
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun *tile_mode = (uint32_t)(modifier & 0xF);
161*4882a593Smuzhiyun *kind = (uint8_t)((modifier >> 12) & 0xFF);
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun if (drm->client.device.info.chipset >= 0xc0)
164*4882a593Smuzhiyun *tile_mode <<= 4;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun void
nouveau_framebuffer_get_layout(struct drm_framebuffer * fb,uint32_t * tile_mode,uint8_t * kind)169*4882a593Smuzhiyun nouveau_framebuffer_get_layout(struct drm_framebuffer *fb,
170*4882a593Smuzhiyun uint32_t *tile_mode,
171*4882a593Smuzhiyun uint8_t *kind)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun if (fb->flags & DRM_MODE_FB_MODIFIERS) {
174*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(fb->dev);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun nouveau_decode_mod(drm, fb->modifier, tile_mode, kind);
177*4882a593Smuzhiyun } else {
178*4882a593Smuzhiyun const struct nouveau_bo *nvbo = nouveau_gem_object(fb->obj[0]);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun *tile_mode = nvbo->mode;
181*4882a593Smuzhiyun *kind = nvbo->kind;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun static const u64 legacy_modifiers[] = {
186*4882a593Smuzhiyun DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(0),
187*4882a593Smuzhiyun DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(1),
188*4882a593Smuzhiyun DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(2),
189*4882a593Smuzhiyun DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(3),
190*4882a593Smuzhiyun DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(4),
191*4882a593Smuzhiyun DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(5),
192*4882a593Smuzhiyun DRM_FORMAT_MOD_INVALID
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun static int
nouveau_validate_decode_mod(struct nouveau_drm * drm,uint64_t modifier,uint32_t * tile_mode,uint8_t * kind)196*4882a593Smuzhiyun nouveau_validate_decode_mod(struct nouveau_drm *drm,
197*4882a593Smuzhiyun uint64_t modifier,
198*4882a593Smuzhiyun uint32_t *tile_mode,
199*4882a593Smuzhiyun uint8_t *kind)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun struct nouveau_display *disp = nouveau_display(drm->dev);
202*4882a593Smuzhiyun int mod;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
205*4882a593Smuzhiyun return -EINVAL;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun BUG_ON(!disp->format_modifiers);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun for (mod = 0;
211*4882a593Smuzhiyun (disp->format_modifiers[mod] != DRM_FORMAT_MOD_INVALID) &&
212*4882a593Smuzhiyun (disp->format_modifiers[mod] != modifier);
213*4882a593Smuzhiyun mod++);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun if (disp->format_modifiers[mod] == DRM_FORMAT_MOD_INVALID) {
216*4882a593Smuzhiyun for (mod = 0;
217*4882a593Smuzhiyun (legacy_modifiers[mod] != DRM_FORMAT_MOD_INVALID) &&
218*4882a593Smuzhiyun (legacy_modifiers[mod] != modifier);
219*4882a593Smuzhiyun mod++);
220*4882a593Smuzhiyun if (legacy_modifiers[mod] == DRM_FORMAT_MOD_INVALID)
221*4882a593Smuzhiyun return -EINVAL;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun nouveau_decode_mod(drm, modifier, tile_mode, kind);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun return 0;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun static inline uint32_t
nouveau_get_width_in_blocks(uint32_t stride)230*4882a593Smuzhiyun nouveau_get_width_in_blocks(uint32_t stride)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun /* GOBs per block in the x direction is always one, and GOBs are
233*4882a593Smuzhiyun * 64 bytes wide
234*4882a593Smuzhiyun */
235*4882a593Smuzhiyun static const uint32_t log_block_width = 6;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun return (stride + (1 << log_block_width) - 1) >> log_block_width;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun static inline uint32_t
nouveau_get_height_in_blocks(struct nouveau_drm * drm,uint32_t height,uint32_t log_block_height_in_gobs)241*4882a593Smuzhiyun nouveau_get_height_in_blocks(struct nouveau_drm *drm,
242*4882a593Smuzhiyun uint32_t height,
243*4882a593Smuzhiyun uint32_t log_block_height_in_gobs)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun uint32_t log_gob_height;
246*4882a593Smuzhiyun uint32_t log_block_height;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun BUG_ON(drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun if (drm->client.device.info.family < NV_DEVICE_INFO_V0_FERMI)
251*4882a593Smuzhiyun log_gob_height = 2;
252*4882a593Smuzhiyun else
253*4882a593Smuzhiyun log_gob_height = 3;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun log_block_height = log_block_height_in_gobs + log_gob_height;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun return (height + (1 << log_block_height) - 1) >> log_block_height;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun static int
nouveau_check_bl_size(struct nouveau_drm * drm,struct nouveau_bo * nvbo,uint32_t offset,uint32_t stride,uint32_t h,uint32_t tile_mode)261*4882a593Smuzhiyun nouveau_check_bl_size(struct nouveau_drm *drm, struct nouveau_bo *nvbo,
262*4882a593Smuzhiyun uint32_t offset, uint32_t stride, uint32_t h,
263*4882a593Smuzhiyun uint32_t tile_mode)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun uint32_t gob_size, bw, bh;
266*4882a593Smuzhiyun uint64_t bl_size;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun BUG_ON(drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun if (drm->client.device.info.chipset >= 0xc0) {
271*4882a593Smuzhiyun if (tile_mode & 0xF)
272*4882a593Smuzhiyun return -EINVAL;
273*4882a593Smuzhiyun tile_mode >>= 4;
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun if (tile_mode & 0xFFFFFFF0)
277*4882a593Smuzhiyun return -EINVAL;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun if (drm->client.device.info.family < NV_DEVICE_INFO_V0_FERMI)
280*4882a593Smuzhiyun gob_size = 256;
281*4882a593Smuzhiyun else
282*4882a593Smuzhiyun gob_size = 512;
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun bw = nouveau_get_width_in_blocks(stride);
285*4882a593Smuzhiyun bh = nouveau_get_height_in_blocks(drm, h, tile_mode);
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun bl_size = bw * bh * (1 << tile_mode) * gob_size;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun DRM_DEBUG_KMS("offset=%u stride=%u h=%u tile_mode=0x%02x bw=%u bh=%u gob_size=%u bl_size=%llu size=%lu\n",
290*4882a593Smuzhiyun offset, stride, h, tile_mode, bw, bh, gob_size, bl_size,
291*4882a593Smuzhiyun nvbo->bo.mem.size);
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun if (bl_size + offset > nvbo->bo.mem.size)
294*4882a593Smuzhiyun return -ERANGE;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun return 0;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun int
nouveau_framebuffer_new(struct drm_device * dev,const struct drm_mode_fb_cmd2 * mode_cmd,struct drm_gem_object * gem,struct drm_framebuffer ** pfb)300*4882a593Smuzhiyun nouveau_framebuffer_new(struct drm_device *dev,
301*4882a593Smuzhiyun const struct drm_mode_fb_cmd2 *mode_cmd,
302*4882a593Smuzhiyun struct drm_gem_object *gem,
303*4882a593Smuzhiyun struct drm_framebuffer **pfb)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(dev);
306*4882a593Smuzhiyun struct nouveau_bo *nvbo = nouveau_gem_object(gem);
307*4882a593Smuzhiyun struct drm_framebuffer *fb;
308*4882a593Smuzhiyun const struct drm_format_info *info;
309*4882a593Smuzhiyun unsigned int width, height, i;
310*4882a593Smuzhiyun uint32_t tile_mode;
311*4882a593Smuzhiyun uint8_t kind;
312*4882a593Smuzhiyun int ret;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun /* YUV overlays have special requirements pre-NV50 */
315*4882a593Smuzhiyun if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA &&
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun (mode_cmd->pixel_format == DRM_FORMAT_YUYV ||
318*4882a593Smuzhiyun mode_cmd->pixel_format == DRM_FORMAT_UYVY ||
319*4882a593Smuzhiyun mode_cmd->pixel_format == DRM_FORMAT_NV12 ||
320*4882a593Smuzhiyun mode_cmd->pixel_format == DRM_FORMAT_NV21) &&
321*4882a593Smuzhiyun (mode_cmd->pitches[0] & 0x3f || /* align 64 */
322*4882a593Smuzhiyun mode_cmd->pitches[0] >= 0x10000 || /* at most 64k pitch */
323*4882a593Smuzhiyun (mode_cmd->pitches[1] && /* pitches for planes must match */
324*4882a593Smuzhiyun mode_cmd->pitches[0] != mode_cmd->pitches[1]))) {
325*4882a593Smuzhiyun struct drm_format_name_buf format_name;
326*4882a593Smuzhiyun DRM_DEBUG_KMS("Unsuitable framebuffer: format: %s; pitches: 0x%x\n 0x%x\n",
327*4882a593Smuzhiyun drm_get_format_name(mode_cmd->pixel_format,
328*4882a593Smuzhiyun &format_name),
329*4882a593Smuzhiyun mode_cmd->pitches[0],
330*4882a593Smuzhiyun mode_cmd->pitches[1]);
331*4882a593Smuzhiyun return -EINVAL;
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun if (mode_cmd->flags & DRM_MODE_FB_MODIFIERS) {
335*4882a593Smuzhiyun if (nouveau_validate_decode_mod(drm, mode_cmd->modifier[0],
336*4882a593Smuzhiyun &tile_mode, &kind)) {
337*4882a593Smuzhiyun DRM_DEBUG_KMS("Unsupported modifier: 0x%llx\n",
338*4882a593Smuzhiyun mode_cmd->modifier[0]);
339*4882a593Smuzhiyun return -EINVAL;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun } else {
342*4882a593Smuzhiyun tile_mode = nvbo->mode;
343*4882a593Smuzhiyun kind = nvbo->kind;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun info = drm_get_format_info(dev, mode_cmd);
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun for (i = 0; i < info->num_planes; i++) {
349*4882a593Smuzhiyun width = drm_format_info_plane_width(info,
350*4882a593Smuzhiyun mode_cmd->width,
351*4882a593Smuzhiyun i);
352*4882a593Smuzhiyun height = drm_format_info_plane_height(info,
353*4882a593Smuzhiyun mode_cmd->height,
354*4882a593Smuzhiyun i);
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun if (kind) {
357*4882a593Smuzhiyun ret = nouveau_check_bl_size(drm, nvbo,
358*4882a593Smuzhiyun mode_cmd->offsets[i],
359*4882a593Smuzhiyun mode_cmd->pitches[i],
360*4882a593Smuzhiyun height, tile_mode);
361*4882a593Smuzhiyun if (ret)
362*4882a593Smuzhiyun return ret;
363*4882a593Smuzhiyun } else {
364*4882a593Smuzhiyun uint32_t size = mode_cmd->pitches[i] * height;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun if (size + mode_cmd->offsets[i] > nvbo->bo.mem.size)
367*4882a593Smuzhiyun return -ERANGE;
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun if (!(fb = *pfb = kzalloc(sizeof(*fb), GFP_KERNEL)))
372*4882a593Smuzhiyun return -ENOMEM;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun drm_helper_mode_fill_fb_struct(dev, fb, mode_cmd);
375*4882a593Smuzhiyun fb->obj[0] = gem;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
378*4882a593Smuzhiyun if (ret)
379*4882a593Smuzhiyun kfree(fb);
380*4882a593Smuzhiyun return ret;
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun struct drm_framebuffer *
nouveau_user_framebuffer_create(struct drm_device * dev,struct drm_file * file_priv,const struct drm_mode_fb_cmd2 * mode_cmd)384*4882a593Smuzhiyun nouveau_user_framebuffer_create(struct drm_device *dev,
385*4882a593Smuzhiyun struct drm_file *file_priv,
386*4882a593Smuzhiyun const struct drm_mode_fb_cmd2 *mode_cmd)
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun struct drm_framebuffer *fb;
389*4882a593Smuzhiyun struct drm_gem_object *gem;
390*4882a593Smuzhiyun int ret;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun gem = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]);
393*4882a593Smuzhiyun if (!gem)
394*4882a593Smuzhiyun return ERR_PTR(-ENOENT);
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun ret = nouveau_framebuffer_new(dev, mode_cmd, gem, &fb);
397*4882a593Smuzhiyun if (ret == 0)
398*4882a593Smuzhiyun return fb;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun drm_gem_object_put(gem);
401*4882a593Smuzhiyun return ERR_PTR(ret);
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
405*4882a593Smuzhiyun .fb_create = nouveau_user_framebuffer_create,
406*4882a593Smuzhiyun .output_poll_changed = nouveau_fbcon_output_poll_changed,
407*4882a593Smuzhiyun };
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun struct nouveau_drm_prop_enum_list {
411*4882a593Smuzhiyun u8 gen_mask;
412*4882a593Smuzhiyun int type;
413*4882a593Smuzhiyun char *name;
414*4882a593Smuzhiyun };
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun static struct nouveau_drm_prop_enum_list underscan[] = {
417*4882a593Smuzhiyun { 6, UNDERSCAN_AUTO, "auto" },
418*4882a593Smuzhiyun { 6, UNDERSCAN_OFF, "off" },
419*4882a593Smuzhiyun { 6, UNDERSCAN_ON, "on" },
420*4882a593Smuzhiyun {}
421*4882a593Smuzhiyun };
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun static struct nouveau_drm_prop_enum_list dither_mode[] = {
424*4882a593Smuzhiyun { 7, DITHERING_MODE_AUTO, "auto" },
425*4882a593Smuzhiyun { 7, DITHERING_MODE_OFF, "off" },
426*4882a593Smuzhiyun { 1, DITHERING_MODE_ON, "on" },
427*4882a593Smuzhiyun { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
428*4882a593Smuzhiyun { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
429*4882a593Smuzhiyun { 4, DITHERING_MODE_TEMPORAL, "temporal" },
430*4882a593Smuzhiyun {}
431*4882a593Smuzhiyun };
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun static struct nouveau_drm_prop_enum_list dither_depth[] = {
434*4882a593Smuzhiyun { 6, DITHERING_DEPTH_AUTO, "auto" },
435*4882a593Smuzhiyun { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
436*4882a593Smuzhiyun { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
437*4882a593Smuzhiyun {}
438*4882a593Smuzhiyun };
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun #define PROP_ENUM(p,gen,n,list) do { \
441*4882a593Smuzhiyun struct nouveau_drm_prop_enum_list *l = (list); \
442*4882a593Smuzhiyun int c = 0; \
443*4882a593Smuzhiyun while (l->gen_mask) { \
444*4882a593Smuzhiyun if (l->gen_mask & (1 << (gen))) \
445*4882a593Smuzhiyun c++; \
446*4882a593Smuzhiyun l++; \
447*4882a593Smuzhiyun } \
448*4882a593Smuzhiyun if (c) { \
449*4882a593Smuzhiyun p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
450*4882a593Smuzhiyun l = (list); \
451*4882a593Smuzhiyun while (p && l->gen_mask) { \
452*4882a593Smuzhiyun if (l->gen_mask & (1 << (gen))) { \
453*4882a593Smuzhiyun drm_property_add_enum(p, l->type, l->name); \
454*4882a593Smuzhiyun } \
455*4882a593Smuzhiyun l++; \
456*4882a593Smuzhiyun } \
457*4882a593Smuzhiyun } \
458*4882a593Smuzhiyun } while(0)
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun void
nouveau_display_hpd_resume(struct drm_device * dev)461*4882a593Smuzhiyun nouveau_display_hpd_resume(struct drm_device *dev)
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(dev);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun mutex_lock(&drm->hpd_lock);
466*4882a593Smuzhiyun drm->hpd_pending = ~0;
467*4882a593Smuzhiyun mutex_unlock(&drm->hpd_lock);
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun schedule_work(&drm->hpd_work);
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun static void
nouveau_display_hpd_work(struct work_struct * work)473*4882a593Smuzhiyun nouveau_display_hpd_work(struct work_struct *work)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun struct nouveau_drm *drm = container_of(work, typeof(*drm), hpd_work);
476*4882a593Smuzhiyun struct drm_device *dev = drm->dev;
477*4882a593Smuzhiyun struct drm_connector *connector;
478*4882a593Smuzhiyun struct drm_connector_list_iter conn_iter;
479*4882a593Smuzhiyun u32 pending;
480*4882a593Smuzhiyun bool changed = false;
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun pm_runtime_get_sync(dev->dev);
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun mutex_lock(&drm->hpd_lock);
485*4882a593Smuzhiyun pending = drm->hpd_pending;
486*4882a593Smuzhiyun drm->hpd_pending = 0;
487*4882a593Smuzhiyun mutex_unlock(&drm->hpd_lock);
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun /* Nothing to do, exit early without updating the last busy counter */
490*4882a593Smuzhiyun if (!pending)
491*4882a593Smuzhiyun goto noop;
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun mutex_lock(&dev->mode_config.mutex);
494*4882a593Smuzhiyun drm_connector_list_iter_begin(dev, &conn_iter);
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) {
497*4882a593Smuzhiyun enum drm_connector_status old_status = connector->status;
498*4882a593Smuzhiyun u64 old_epoch_counter = connector->epoch_counter;
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun if (!(pending & drm_connector_mask(connector)))
501*4882a593Smuzhiyun continue;
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun connector->status = drm_helper_probe_detect(connector, NULL,
504*4882a593Smuzhiyun false);
505*4882a593Smuzhiyun if (old_epoch_counter == connector->epoch_counter)
506*4882a593Smuzhiyun continue;
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun changed = true;
509*4882a593Smuzhiyun drm_dbg_kms(dev, "[CONNECTOR:%d:%s] status updated from %s to %s (epoch counter %llu->%llu)\n",
510*4882a593Smuzhiyun connector->base.id, connector->name,
511*4882a593Smuzhiyun drm_get_connector_status_name(old_status),
512*4882a593Smuzhiyun drm_get_connector_status_name(connector->status),
513*4882a593Smuzhiyun old_epoch_counter, connector->epoch_counter);
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun drm_connector_list_iter_end(&conn_iter);
517*4882a593Smuzhiyun mutex_unlock(&dev->mode_config.mutex);
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun if (changed)
520*4882a593Smuzhiyun drm_kms_helper_hotplug_event(dev);
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun pm_runtime_mark_last_busy(drm->dev->dev);
523*4882a593Smuzhiyun noop:
524*4882a593Smuzhiyun pm_runtime_put_autosuspend(dev->dev);
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun #ifdef CONFIG_ACPI
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun static int
nouveau_display_acpi_ntfy(struct notifier_block * nb,unsigned long val,void * data)530*4882a593Smuzhiyun nouveau_display_acpi_ntfy(struct notifier_block *nb, unsigned long val,
531*4882a593Smuzhiyun void *data)
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun struct nouveau_drm *drm = container_of(nb, typeof(*drm), acpi_nb);
534*4882a593Smuzhiyun struct acpi_bus_event *info = data;
535*4882a593Smuzhiyun int ret;
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun if (!strcmp(info->device_class, ACPI_VIDEO_CLASS)) {
538*4882a593Smuzhiyun if (info->type == ACPI_VIDEO_NOTIFY_PROBE) {
539*4882a593Smuzhiyun ret = pm_runtime_get(drm->dev->dev);
540*4882a593Smuzhiyun if (ret == 1 || ret == -EACCES) {
541*4882a593Smuzhiyun /* If the GPU is already awake, or in a state
542*4882a593Smuzhiyun * where we can't wake it up, it can handle
543*4882a593Smuzhiyun * it's own hotplug events.
544*4882a593Smuzhiyun */
545*4882a593Smuzhiyun pm_runtime_put_autosuspend(drm->dev->dev);
546*4882a593Smuzhiyun } else if (ret == 0 || ret == -EINPROGRESS) {
547*4882a593Smuzhiyun /* We've started resuming the GPU already, so
548*4882a593Smuzhiyun * it will handle scheduling a full reprobe
549*4882a593Smuzhiyun * itself
550*4882a593Smuzhiyun */
551*4882a593Smuzhiyun NV_DEBUG(drm, "ACPI requested connector reprobe\n");
552*4882a593Smuzhiyun pm_runtime_put_noidle(drm->dev->dev);
553*4882a593Smuzhiyun } else {
554*4882a593Smuzhiyun NV_WARN(drm, "Dropped ACPI reprobe event due to RPM error: %d\n",
555*4882a593Smuzhiyun ret);
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun /* acpi-video should not generate keypresses for this */
559*4882a593Smuzhiyun return NOTIFY_BAD;
560*4882a593Smuzhiyun }
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun return NOTIFY_DONE;
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun #endif
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun int
nouveau_display_init(struct drm_device * dev,bool resume,bool runtime)568*4882a593Smuzhiyun nouveau_display_init(struct drm_device *dev, bool resume, bool runtime)
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun struct nouveau_display *disp = nouveau_display(dev);
571*4882a593Smuzhiyun struct drm_connector *connector;
572*4882a593Smuzhiyun struct drm_connector_list_iter conn_iter;
573*4882a593Smuzhiyun int ret;
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun /*
576*4882a593Smuzhiyun * Enable hotplug interrupts (done as early as possible, since we need
577*4882a593Smuzhiyun * them for MST)
578*4882a593Smuzhiyun */
579*4882a593Smuzhiyun drm_connector_list_iter_begin(dev, &conn_iter);
580*4882a593Smuzhiyun nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) {
581*4882a593Smuzhiyun struct nouveau_connector *conn = nouveau_connector(connector);
582*4882a593Smuzhiyun nvif_notify_get(&conn->hpd);
583*4882a593Smuzhiyun }
584*4882a593Smuzhiyun drm_connector_list_iter_end(&conn_iter);
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun ret = disp->init(dev, resume, runtime);
587*4882a593Smuzhiyun if (ret)
588*4882a593Smuzhiyun return ret;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun /* enable connector detection and polling for connectors without HPD
591*4882a593Smuzhiyun * support
592*4882a593Smuzhiyun */
593*4882a593Smuzhiyun drm_kms_helper_poll_enable(dev);
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun return ret;
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun void
nouveau_display_fini(struct drm_device * dev,bool suspend,bool runtime)599*4882a593Smuzhiyun nouveau_display_fini(struct drm_device *dev, bool suspend, bool runtime)
600*4882a593Smuzhiyun {
601*4882a593Smuzhiyun struct nouveau_display *disp = nouveau_display(dev);
602*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(dev);
603*4882a593Smuzhiyun struct drm_connector *connector;
604*4882a593Smuzhiyun struct drm_connector_list_iter conn_iter;
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun if (!suspend) {
607*4882a593Smuzhiyun if (drm_drv_uses_atomic_modeset(dev))
608*4882a593Smuzhiyun drm_atomic_helper_shutdown(dev);
609*4882a593Smuzhiyun else
610*4882a593Smuzhiyun drm_helper_force_disable_all(dev);
611*4882a593Smuzhiyun }
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun /* disable hotplug interrupts */
614*4882a593Smuzhiyun drm_connector_list_iter_begin(dev, &conn_iter);
615*4882a593Smuzhiyun nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) {
616*4882a593Smuzhiyun struct nouveau_connector *conn = nouveau_connector(connector);
617*4882a593Smuzhiyun nvif_notify_put(&conn->hpd);
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun drm_connector_list_iter_end(&conn_iter);
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun if (!runtime)
622*4882a593Smuzhiyun cancel_work_sync(&drm->hpd_work);
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun drm_kms_helper_poll_disable(dev);
625*4882a593Smuzhiyun disp->fini(dev, runtime, suspend);
626*4882a593Smuzhiyun }
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun static void
nouveau_display_create_properties(struct drm_device * dev)629*4882a593Smuzhiyun nouveau_display_create_properties(struct drm_device *dev)
630*4882a593Smuzhiyun {
631*4882a593Smuzhiyun struct nouveau_display *disp = nouveau_display(dev);
632*4882a593Smuzhiyun int gen;
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun if (disp->disp.object.oclass < NV50_DISP)
635*4882a593Smuzhiyun gen = 0;
636*4882a593Smuzhiyun else
637*4882a593Smuzhiyun if (disp->disp.object.oclass < GF110_DISP)
638*4882a593Smuzhiyun gen = 1;
639*4882a593Smuzhiyun else
640*4882a593Smuzhiyun gen = 2;
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
643*4882a593Smuzhiyun PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
644*4882a593Smuzhiyun PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun disp->underscan_hborder_property =
647*4882a593Smuzhiyun drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun disp->underscan_vborder_property =
650*4882a593Smuzhiyun drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun if (gen < 1)
653*4882a593Smuzhiyun return;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun /* -90..+90 */
656*4882a593Smuzhiyun disp->vibrant_hue_property =
657*4882a593Smuzhiyun drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun /* -100..+100 */
660*4882a593Smuzhiyun disp->color_vibrance_property =
661*4882a593Smuzhiyun drm_property_create_range(dev, 0, "color vibrance", 0, 200);
662*4882a593Smuzhiyun }
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun int
nouveau_display_create(struct drm_device * dev)665*4882a593Smuzhiyun nouveau_display_create(struct drm_device *dev)
666*4882a593Smuzhiyun {
667*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(dev);
668*4882a593Smuzhiyun struct nvkm_device *device = nvxx_device(&drm->client.device);
669*4882a593Smuzhiyun struct nouveau_display *disp;
670*4882a593Smuzhiyun int ret;
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
673*4882a593Smuzhiyun if (!disp)
674*4882a593Smuzhiyun return -ENOMEM;
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun drm_mode_config_init(dev);
677*4882a593Smuzhiyun drm_mode_create_scaling_mode_property(dev);
678*4882a593Smuzhiyun drm_mode_create_dvi_i_properties(dev);
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun dev->mode_config.funcs = &nouveau_mode_config_funcs;
681*4882a593Smuzhiyun dev->mode_config.fb_base = device->func->resource_addr(device, 1);
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun dev->mode_config.min_width = 0;
684*4882a593Smuzhiyun dev->mode_config.min_height = 0;
685*4882a593Smuzhiyun if (drm->client.device.info.family < NV_DEVICE_INFO_V0_CELSIUS) {
686*4882a593Smuzhiyun dev->mode_config.max_width = 2048;
687*4882a593Smuzhiyun dev->mode_config.max_height = 2048;
688*4882a593Smuzhiyun } else
689*4882a593Smuzhiyun if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
690*4882a593Smuzhiyun dev->mode_config.max_width = 4096;
691*4882a593Smuzhiyun dev->mode_config.max_height = 4096;
692*4882a593Smuzhiyun } else
693*4882a593Smuzhiyun if (drm->client.device.info.family < NV_DEVICE_INFO_V0_FERMI) {
694*4882a593Smuzhiyun dev->mode_config.max_width = 8192;
695*4882a593Smuzhiyun dev->mode_config.max_height = 8192;
696*4882a593Smuzhiyun } else {
697*4882a593Smuzhiyun dev->mode_config.max_width = 16384;
698*4882a593Smuzhiyun dev->mode_config.max_height = 16384;
699*4882a593Smuzhiyun }
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun dev->mode_config.preferred_depth = 24;
702*4882a593Smuzhiyun dev->mode_config.prefer_shadow = 1;
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun if (drm->client.device.info.chipset < 0x11)
705*4882a593Smuzhiyun dev->mode_config.async_page_flip = false;
706*4882a593Smuzhiyun else
707*4882a593Smuzhiyun dev->mode_config.async_page_flip = true;
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun drm_kms_helper_poll_init(dev);
710*4882a593Smuzhiyun drm_kms_helper_poll_disable(dev);
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun if (nouveau_modeset != 2 && drm->vbios.dcb.entries) {
713*4882a593Smuzhiyun ret = nvif_disp_ctor(&drm->client.device, "kmsDisp", 0,
714*4882a593Smuzhiyun &disp->disp);
715*4882a593Smuzhiyun if (ret == 0) {
716*4882a593Smuzhiyun nouveau_display_create_properties(dev);
717*4882a593Smuzhiyun if (disp->disp.object.oclass < NV50_DISP)
718*4882a593Smuzhiyun ret = nv04_display_create(dev);
719*4882a593Smuzhiyun else
720*4882a593Smuzhiyun ret = nv50_display_create(dev);
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun } else {
723*4882a593Smuzhiyun ret = 0;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun if (ret)
727*4882a593Smuzhiyun goto disp_create_err;
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun drm_mode_config_reset(dev);
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun if (dev->mode_config.num_crtc) {
732*4882a593Smuzhiyun ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
733*4882a593Smuzhiyun if (ret)
734*4882a593Smuzhiyun goto vblank_err;
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun if (disp->disp.object.oclass >= NV50_DISP)
737*4882a593Smuzhiyun nv50_crc_init(dev);
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun INIT_WORK(&drm->hpd_work, nouveau_display_hpd_work);
741*4882a593Smuzhiyun mutex_init(&drm->hpd_lock);
742*4882a593Smuzhiyun #ifdef CONFIG_ACPI
743*4882a593Smuzhiyun drm->acpi_nb.notifier_call = nouveau_display_acpi_ntfy;
744*4882a593Smuzhiyun register_acpi_notifier(&drm->acpi_nb);
745*4882a593Smuzhiyun #endif
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun return 0;
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun vblank_err:
750*4882a593Smuzhiyun disp->dtor(dev);
751*4882a593Smuzhiyun disp_create_err:
752*4882a593Smuzhiyun drm_kms_helper_poll_fini(dev);
753*4882a593Smuzhiyun drm_mode_config_cleanup(dev);
754*4882a593Smuzhiyun return ret;
755*4882a593Smuzhiyun }
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun void
nouveau_display_destroy(struct drm_device * dev)758*4882a593Smuzhiyun nouveau_display_destroy(struct drm_device *dev)
759*4882a593Smuzhiyun {
760*4882a593Smuzhiyun struct nouveau_display *disp = nouveau_display(dev);
761*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(dev);
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun #ifdef CONFIG_ACPI
764*4882a593Smuzhiyun unregister_acpi_notifier(&drm->acpi_nb);
765*4882a593Smuzhiyun #endif
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun drm_kms_helper_poll_fini(dev);
768*4882a593Smuzhiyun drm_mode_config_cleanup(dev);
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun if (disp->dtor)
771*4882a593Smuzhiyun disp->dtor(dev);
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun nvif_disp_dtor(&disp->disp);
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun nouveau_drm(dev)->display = NULL;
776*4882a593Smuzhiyun mutex_destroy(&drm->hpd_lock);
777*4882a593Smuzhiyun kfree(disp);
778*4882a593Smuzhiyun }
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun int
nouveau_display_suspend(struct drm_device * dev,bool runtime)781*4882a593Smuzhiyun nouveau_display_suspend(struct drm_device *dev, bool runtime)
782*4882a593Smuzhiyun {
783*4882a593Smuzhiyun struct nouveau_display *disp = nouveau_display(dev);
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun if (drm_drv_uses_atomic_modeset(dev)) {
786*4882a593Smuzhiyun if (!runtime) {
787*4882a593Smuzhiyun disp->suspend = drm_atomic_helper_suspend(dev);
788*4882a593Smuzhiyun if (IS_ERR(disp->suspend)) {
789*4882a593Smuzhiyun int ret = PTR_ERR(disp->suspend);
790*4882a593Smuzhiyun disp->suspend = NULL;
791*4882a593Smuzhiyun return ret;
792*4882a593Smuzhiyun }
793*4882a593Smuzhiyun }
794*4882a593Smuzhiyun }
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun nouveau_display_fini(dev, true, runtime);
797*4882a593Smuzhiyun return 0;
798*4882a593Smuzhiyun }
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun void
nouveau_display_resume(struct drm_device * dev,bool runtime)801*4882a593Smuzhiyun nouveau_display_resume(struct drm_device *dev, bool runtime)
802*4882a593Smuzhiyun {
803*4882a593Smuzhiyun struct nouveau_display *disp = nouveau_display(dev);
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun nouveau_display_init(dev, true, runtime);
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun if (drm_drv_uses_atomic_modeset(dev)) {
808*4882a593Smuzhiyun if (disp->suspend) {
809*4882a593Smuzhiyun drm_atomic_helper_resume(dev, disp->suspend);
810*4882a593Smuzhiyun disp->suspend = NULL;
811*4882a593Smuzhiyun }
812*4882a593Smuzhiyun return;
813*4882a593Smuzhiyun }
814*4882a593Smuzhiyun }
815*4882a593Smuzhiyun
816*4882a593Smuzhiyun int
nouveau_display_dumb_create(struct drm_file * file_priv,struct drm_device * dev,struct drm_mode_create_dumb * args)817*4882a593Smuzhiyun nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
818*4882a593Smuzhiyun struct drm_mode_create_dumb *args)
819*4882a593Smuzhiyun {
820*4882a593Smuzhiyun struct nouveau_cli *cli = nouveau_cli(file_priv);
821*4882a593Smuzhiyun struct nouveau_bo *bo;
822*4882a593Smuzhiyun uint32_t domain;
823*4882a593Smuzhiyun int ret;
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun args->pitch = roundup(args->width * (args->bpp / 8), 256);
826*4882a593Smuzhiyun args->size = args->pitch * args->height;
827*4882a593Smuzhiyun args->size = roundup(args->size, PAGE_SIZE);
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun /* Use VRAM if there is any ; otherwise fallback to system memory */
830*4882a593Smuzhiyun if (nouveau_drm(dev)->client.device.info.ram_size != 0)
831*4882a593Smuzhiyun domain = NOUVEAU_GEM_DOMAIN_VRAM;
832*4882a593Smuzhiyun else
833*4882a593Smuzhiyun domain = NOUVEAU_GEM_DOMAIN_GART;
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun ret = nouveau_gem_new(cli, args->size, 0, domain, 0, 0, &bo);
836*4882a593Smuzhiyun if (ret)
837*4882a593Smuzhiyun return ret;
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun ret = drm_gem_handle_create(file_priv, &bo->bo.base, &args->handle);
840*4882a593Smuzhiyun drm_gem_object_put(&bo->bo.base);
841*4882a593Smuzhiyun return ret;
842*4882a593Smuzhiyun }
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun int
nouveau_display_dumb_map_offset(struct drm_file * file_priv,struct drm_device * dev,uint32_t handle,uint64_t * poffset)845*4882a593Smuzhiyun nouveau_display_dumb_map_offset(struct drm_file *file_priv,
846*4882a593Smuzhiyun struct drm_device *dev,
847*4882a593Smuzhiyun uint32_t handle, uint64_t *poffset)
848*4882a593Smuzhiyun {
849*4882a593Smuzhiyun struct drm_gem_object *gem;
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun gem = drm_gem_object_lookup(file_priv, handle);
852*4882a593Smuzhiyun if (gem) {
853*4882a593Smuzhiyun struct nouveau_bo *bo = nouveau_gem_object(gem);
854*4882a593Smuzhiyun *poffset = drm_vma_node_offset_addr(&bo->bo.base.vma_node);
855*4882a593Smuzhiyun drm_gem_object_put(gem);
856*4882a593Smuzhiyun return 0;
857*4882a593Smuzhiyun }
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun return -ENOENT;
860*4882a593Smuzhiyun }
861