1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2007 Dave Airlied
3*4882a593Smuzhiyun * All Rights Reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
6*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
7*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
8*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
10*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the next
13*4882a593Smuzhiyun * paragraph) shall be included in all copies or substantial portions of the
14*4882a593Smuzhiyun * Software.
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19*4882a593Smuzhiyun * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE.
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun * Authors: Dave Airlied <airlied@linux.ie>
26*4882a593Smuzhiyun * Ben Skeggs <darktama@iinet.net.au>
27*4882a593Smuzhiyun * Jeremy Kolb <jkolb@brandeis.edu>
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun #include "nouveau_bo.h"
30*4882a593Smuzhiyun #include "nouveau_dma.h"
31*4882a593Smuzhiyun #include "nouveau_mem.h"
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include <nvif/push906f.h>
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #include <nvhw/class/cla0b5.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun int
nve0_bo_move_copy(struct nouveau_channel * chan,struct ttm_buffer_object * bo,struct ttm_resource * old_reg,struct ttm_resource * new_reg)38*4882a593Smuzhiyun nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
39*4882a593Smuzhiyun struct ttm_resource *old_reg, struct ttm_resource *new_reg)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun struct nouveau_mem *mem = nouveau_mem(old_reg);
42*4882a593Smuzhiyun struct nvif_push *push = chan->chan.push;
43*4882a593Smuzhiyun int ret;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun ret = PUSH_WAIT(push, 10);
46*4882a593Smuzhiyun if (ret)
47*4882a593Smuzhiyun return ret;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun PUSH_MTHD(push, NVA0B5, OFFSET_IN_UPPER,
50*4882a593Smuzhiyun NVVAL(NVA0B5, OFFSET_IN_UPPER, UPPER, upper_32_bits(mem->vma[0].addr)),
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun OFFSET_IN_LOWER, lower_32_bits(mem->vma[0].addr),
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun OFFSET_OUT_UPPER,
55*4882a593Smuzhiyun NVVAL(NVA0B5, OFFSET_OUT_UPPER, UPPER, upper_32_bits(mem->vma[1].addr)),
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun OFFSET_OUT_LOWER, lower_32_bits(mem->vma[1].addr),
58*4882a593Smuzhiyun PITCH_IN, PAGE_SIZE,
59*4882a593Smuzhiyun PITCH_OUT, PAGE_SIZE,
60*4882a593Smuzhiyun LINE_LENGTH_IN, PAGE_SIZE,
61*4882a593Smuzhiyun LINE_COUNT, new_reg->num_pages);
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun PUSH_IMMD(push, NVA0B5, LAUNCH_DMA,
64*4882a593Smuzhiyun NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) |
65*4882a593Smuzhiyun NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) |
66*4882a593Smuzhiyun NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) |
67*4882a593Smuzhiyun NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) |
68*4882a593Smuzhiyun NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) |
69*4882a593Smuzhiyun NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) |
70*4882a593Smuzhiyun NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, TRUE) |
71*4882a593Smuzhiyun NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, FALSE) |
72*4882a593Smuzhiyun NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING) |
73*4882a593Smuzhiyun NVDEF(NVA0B5, LAUNCH_DMA, SRC_TYPE, VIRTUAL) |
74*4882a593Smuzhiyun NVDEF(NVA0B5, LAUNCH_DMA, DST_TYPE, VIRTUAL));
75*4882a593Smuzhiyun return 0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun int
nve0_bo_move_init(struct nouveau_channel * chan,u32 handle)79*4882a593Smuzhiyun nve0_bo_move_init(struct nouveau_channel *chan, u32 handle)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun struct nvif_push *push = chan->chan.push;
82*4882a593Smuzhiyun int ret;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun ret = PUSH_WAIT(push, 2);
85*4882a593Smuzhiyun if (ret)
86*4882a593Smuzhiyun return ret;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun PUSH_NVSQ(push, NVA0B5, 0x0000, handle & 0x0000ffff);
89*4882a593Smuzhiyun return 0;
90*4882a593Smuzhiyun }
91