1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2020 Red Hat Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun */
22*4882a593Smuzhiyun #include "nouveau_bo.h"
23*4882a593Smuzhiyun #include "nouveau_dma.h"
24*4882a593Smuzhiyun #include "nouveau_mem.h"
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include <nvif/push906f.h>
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /*XXX: Fixup class to be compatible with NVIDIA's, which will allow sharing
29*4882a593Smuzhiyun * code with KeplerDmaCopyA.
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun int
nvc0_bo_move_copy(struct nouveau_channel * chan,struct ttm_buffer_object * bo,struct ttm_resource * old_reg,struct ttm_resource * new_reg)33*4882a593Smuzhiyun nvc0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
34*4882a593Smuzhiyun struct ttm_resource *old_reg, struct ttm_resource *new_reg)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun struct nouveau_mem *mem = nouveau_mem(old_reg);
37*4882a593Smuzhiyun struct nvif_push *push = chan->chan.push;
38*4882a593Smuzhiyun u64 src_offset = mem->vma[0].addr;
39*4882a593Smuzhiyun u64 dst_offset = mem->vma[1].addr;
40*4882a593Smuzhiyun u32 page_count = new_reg->num_pages;
41*4882a593Smuzhiyun int ret;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun page_count = new_reg->num_pages;
44*4882a593Smuzhiyun while (page_count) {
45*4882a593Smuzhiyun int line_count = (page_count > 8191) ? 8191 : page_count;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun ret = PUSH_WAIT(push, 10);
48*4882a593Smuzhiyun if (ret)
49*4882a593Smuzhiyun return ret;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun PUSH_NVSQ(push, NV90B5, 0x030c, upper_32_bits(src_offset),
52*4882a593Smuzhiyun 0x0310, lower_32_bits(src_offset),
53*4882a593Smuzhiyun 0x0314, upper_32_bits(dst_offset),
54*4882a593Smuzhiyun 0x0318, lower_32_bits(dst_offset),
55*4882a593Smuzhiyun 0x031c, PAGE_SIZE,
56*4882a593Smuzhiyun 0x0320, PAGE_SIZE,
57*4882a593Smuzhiyun 0x0324, PAGE_SIZE,
58*4882a593Smuzhiyun 0x0328, line_count);
59*4882a593Smuzhiyun PUSH_NVIM(push, NV90B5, 0x0300, 0x0110);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun page_count -= line_count;
62*4882a593Smuzhiyun src_offset += (PAGE_SIZE * line_count);
63*4882a593Smuzhiyun dst_offset += (PAGE_SIZE * line_count);
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun return 0;
67*4882a593Smuzhiyun }
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