1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2007 Dave Airlied
3*4882a593Smuzhiyun * All Rights Reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
6*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
7*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
8*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
10*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the next
13*4882a593Smuzhiyun * paragraph) shall be included in all copies or substantial portions of the
14*4882a593Smuzhiyun * Software.
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19*4882a593Smuzhiyun * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE.
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun * Authors: Dave Airlied <airlied@linux.ie>
26*4882a593Smuzhiyun * Ben Skeggs <darktama@iinet.net.au>
27*4882a593Smuzhiyun * Jeremy Kolb <jkolb@brandeis.edu>
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun #include "nouveau_bo.h"
30*4882a593Smuzhiyun #include "nouveau_dma.h"
31*4882a593Smuzhiyun #include "nouveau_drv.h"
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include <nvif/push006c.h>
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #include <nvhw/class/cl0039.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static inline uint32_t
nouveau_bo_mem_ctxdma(struct ttm_buffer_object * bo,struct nouveau_channel * chan,struct ttm_resource * reg)38*4882a593Smuzhiyun nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo,
39*4882a593Smuzhiyun struct nouveau_channel *chan, struct ttm_resource *reg)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun if (reg->mem_type == TTM_PL_TT)
42*4882a593Smuzhiyun return NvDmaTT;
43*4882a593Smuzhiyun return chan->vram.handle;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun int
nv04_bo_move_m2mf(struct nouveau_channel * chan,struct ttm_buffer_object * bo,struct ttm_resource * old_reg,struct ttm_resource * new_reg)47*4882a593Smuzhiyun nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
48*4882a593Smuzhiyun struct ttm_resource *old_reg, struct ttm_resource *new_reg)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun struct nvif_push *push = chan->chan.push;
51*4882a593Smuzhiyun u32 src_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, old_reg);
52*4882a593Smuzhiyun u32 src_offset = old_reg->start << PAGE_SHIFT;
53*4882a593Smuzhiyun u32 dst_ctxdma = nouveau_bo_mem_ctxdma(bo, chan, new_reg);
54*4882a593Smuzhiyun u32 dst_offset = new_reg->start << PAGE_SHIFT;
55*4882a593Smuzhiyun u32 page_count = new_reg->num_pages;
56*4882a593Smuzhiyun int ret;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun ret = PUSH_WAIT(push, 3);
59*4882a593Smuzhiyun if (ret)
60*4882a593Smuzhiyun return ret;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun PUSH_MTHD(push, NV039, SET_CONTEXT_DMA_BUFFER_IN, src_ctxdma,
63*4882a593Smuzhiyun SET_CONTEXT_DMA_BUFFER_OUT, dst_ctxdma);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun page_count = new_reg->num_pages;
66*4882a593Smuzhiyun while (page_count) {
67*4882a593Smuzhiyun int line_count = (page_count > 2047) ? 2047 : page_count;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun ret = PUSH_WAIT(push, 11);
70*4882a593Smuzhiyun if (ret)
71*4882a593Smuzhiyun return ret;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun PUSH_MTHD(push, NV039, OFFSET_IN, src_offset,
74*4882a593Smuzhiyun OFFSET_OUT, dst_offset,
75*4882a593Smuzhiyun PITCH_IN, PAGE_SIZE,
76*4882a593Smuzhiyun PITCH_OUT, PAGE_SIZE,
77*4882a593Smuzhiyun LINE_LENGTH_IN, PAGE_SIZE,
78*4882a593Smuzhiyun LINE_COUNT, line_count,
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun FORMAT,
81*4882a593Smuzhiyun NVVAL(NV039, FORMAT, IN, 1) |
82*4882a593Smuzhiyun NVVAL(NV039, FORMAT, OUT, 1),
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun BUFFER_NOTIFY, NV039_BUFFER_NOTIFY_WRITE_ONLY);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun PUSH_MTHD(push, NV039, NO_OPERATION, 0x00000000);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun page_count -= line_count;
89*4882a593Smuzhiyun src_offset += (PAGE_SIZE * line_count);
90*4882a593Smuzhiyun dst_offset += (PAGE_SIZE * line_count);
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun return 0;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun int
nv04_bo_move_init(struct nouveau_channel * chan,u32 handle)97*4882a593Smuzhiyun nv04_bo_move_init(struct nouveau_channel *chan, u32 handle)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun struct nvif_push *push = chan->chan.push;
100*4882a593Smuzhiyun int ret;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun ret = PUSH_WAIT(push, 4);
103*4882a593Smuzhiyun if (ret)
104*4882a593Smuzhiyun return ret;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun PUSH_MTHD(push, NV039, SET_OBJECT, handle);
107*4882a593Smuzhiyun PUSH_MTHD(push, NV039, SET_CONTEXT_DMA_NOTIFIES, chan->drm->ntfy.handle);
108*4882a593Smuzhiyun return 0;
109*4882a593Smuzhiyun }
110