1*4882a593Smuzhiyun /* SPDX-License-Identifier: MIT */ 2*4882a593Smuzhiyun #ifndef __NVIF_CLC36F_H__ 3*4882a593Smuzhiyun #define __NVIF_CLC36F_H__ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun struct volta_channel_gpfifo_a_v0 { 6*4882a593Smuzhiyun __u8 version; 7*4882a593Smuzhiyun __u8 priv; 8*4882a593Smuzhiyun __u16 chid; 9*4882a593Smuzhiyun __u32 ilength; 10*4882a593Smuzhiyun __u64 ioffset; 11*4882a593Smuzhiyun __u64 runlist; 12*4882a593Smuzhiyun __u64 vmm; 13*4882a593Smuzhiyun __u64 inst; 14*4882a593Smuzhiyun __u32 token; 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define NVC36F_V0_NTFY_NON_STALL_INTERRUPT 0x00 18*4882a593Smuzhiyun #define NVC36F_V0_NTFY_KILLED 0x01 19*4882a593Smuzhiyun #endif 20