xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/dispnv50/wimmc37b.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2018 Red Hat Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun  * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*4882a593Smuzhiyun  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun  * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun #include "wimm.h"
23*4882a593Smuzhiyun #include "atom.h"
24*4882a593Smuzhiyun #include "wndw.h"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include <nvif/clc37b.h>
27*4882a593Smuzhiyun #include <nvif/pushc37b.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #include <nvhw/class/clc37b.h>
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun static int
wimmc37b_update(struct nv50_wndw * wndw,u32 * interlock)32*4882a593Smuzhiyun wimmc37b_update(struct nv50_wndw *wndw, u32 *interlock)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	struct nvif_push *push = wndw->wimm.push;
35*4882a593Smuzhiyun 	int ret;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	if ((ret = PUSH_WAIT(push, 2)))
38*4882a593Smuzhiyun 		return ret;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	PUSH_MTHD(push, NVC37B, UPDATE, 0x00000001 |
41*4882a593Smuzhiyun 		  NVVAL(NVC37B, UPDATE, INTERLOCK_WITH_WINDOW,
42*4882a593Smuzhiyun 			!!(interlock[NV50_DISP_INTERLOCK_WNDW] & wndw->interlock.data)));
43*4882a593Smuzhiyun 	return PUSH_KICK(push);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun static int
wimmc37b_point(struct nv50_wndw * wndw,struct nv50_wndw_atom * asyw)47*4882a593Smuzhiyun wimmc37b_point(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	struct nvif_push *push = wndw->wimm.push;
50*4882a593Smuzhiyun 	int ret;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	if ((ret = PUSH_WAIT(push, 2)))
53*4882a593Smuzhiyun 		return ret;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	PUSH_MTHD(push, NVC37B, SET_POINT_OUT(0),
56*4882a593Smuzhiyun 		  NVVAL(NVC37B, SET_POINT_OUT, X, asyw->point.x) |
57*4882a593Smuzhiyun 		  NVVAL(NVC37B, SET_POINT_OUT, Y, asyw->point.y));
58*4882a593Smuzhiyun 	return 0;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun static const struct nv50_wimm_func
62*4882a593Smuzhiyun wimmc37b = {
63*4882a593Smuzhiyun 	.point = wimmc37b_point,
64*4882a593Smuzhiyun 	.update = wimmc37b_update,
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static int
wimmc37b_init_(const struct nv50_wimm_func * func,struct nouveau_drm * drm,s32 oclass,struct nv50_wndw * wndw)68*4882a593Smuzhiyun wimmc37b_init_(const struct nv50_wimm_func *func, struct nouveau_drm *drm,
69*4882a593Smuzhiyun 	       s32 oclass, struct nv50_wndw *wndw)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun 	struct nvc37b_window_imm_channel_dma_v0 args = {
72*4882a593Smuzhiyun 		.pushbuf = 0xb0007b00 | wndw->id,
73*4882a593Smuzhiyun 		.index = wndw->id,
74*4882a593Smuzhiyun 	};
75*4882a593Smuzhiyun 	struct nv50_disp *disp = nv50_disp(drm->dev);
76*4882a593Smuzhiyun 	int ret;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	ret = nv50_dmac_create(&drm->client.device, &disp->disp->object,
79*4882a593Smuzhiyun 			       &oclass, 0, &args, sizeof(args), -1,
80*4882a593Smuzhiyun 			       &wndw->wimm);
81*4882a593Smuzhiyun 	if (ret) {
82*4882a593Smuzhiyun 		NV_ERROR(drm, "wimm%04x allocation failed: %d\n", oclass, ret);
83*4882a593Smuzhiyun 		return ret;
84*4882a593Smuzhiyun 	}
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	wndw->interlock.wimm = wndw->interlock.data;
87*4882a593Smuzhiyun 	wndw->immd = func;
88*4882a593Smuzhiyun 	return 0;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun int
wimmc37b_init(struct nouveau_drm * drm,s32 oclass,struct nv50_wndw * wndw)92*4882a593Smuzhiyun wimmc37b_init(struct nouveau_drm *drm, s32 oclass, struct nv50_wndw *wndw)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	return wimmc37b_init_(&wimmc37b, drm, oclass, wndw);
95*4882a593Smuzhiyun }
96