xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/dispnv50/sor907d.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2018 Red Hat Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun  * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*4882a593Smuzhiyun  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun  * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun #include "core.h"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #include <nvif/class.h>
25*4882a593Smuzhiyun #include <nvif/push507c.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include <nvhw/class/cl907d.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #include <nouveau_bo.h>
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun static int
sor907d_ctrl(struct nv50_core * core,int or,u32 ctrl,struct nv50_head_atom * asyh)32*4882a593Smuzhiyun sor907d_ctrl(struct nv50_core *core, int or, u32 ctrl,
33*4882a593Smuzhiyun 	     struct nv50_head_atom *asyh)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	struct nvif_push *push = core->chan.push;
36*4882a593Smuzhiyun 	int ret;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	if ((ret = PUSH_WAIT(push, 2)))
39*4882a593Smuzhiyun 		return ret;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	PUSH_MTHD(push, NV907D, SOR_SET_CONTROL(or), ctrl);
42*4882a593Smuzhiyun 	return 0;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun static void
sor907d_get_caps(struct nv50_disp * disp,struct nouveau_encoder * outp,int or)46*4882a593Smuzhiyun sor907d_get_caps(struct nv50_disp *disp, struct nouveau_encoder *outp, int or)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	struct nouveau_bo *bo = disp->sync;
49*4882a593Smuzhiyun 	const int off = or * 2;
50*4882a593Smuzhiyun 	outp->caps.dp_interlace =
51*4882a593Smuzhiyun 		NVBO_RV32(bo, off, NV907D_CORE_NOTIFIER_3, CAPABILITIES_CAP_SOR0_20, DP_INTERLACE);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun const struct nv50_outp_func
55*4882a593Smuzhiyun sor907d = {
56*4882a593Smuzhiyun 	.ctrl = sor907d_ctrl,
57*4882a593Smuzhiyun 	.get_caps = sor907d_get_caps,
58*4882a593Smuzhiyun };
59