1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2009 Red Hat Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun *
22*4882a593Smuzhiyun * Author: Ben Skeggs
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <drm/drm_crtc_helper.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #include "nouveau_drv.h"
28*4882a593Smuzhiyun #include "nouveau_reg.h"
29*4882a593Smuzhiyun #include "hw.h"
30*4882a593Smuzhiyun #include "nouveau_encoder.h"
31*4882a593Smuzhiyun #include "nouveau_connector.h"
32*4882a593Smuzhiyun #include "nouveau_bo.h"
33*4882a593Smuzhiyun #include "nouveau_gem.h"
34*4882a593Smuzhiyun #include "nouveau_chan.h"
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #include <nvif/if0004.h>
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun struct nouveau_connector *
nv04_encoder_get_connector(struct nouveau_encoder * encoder)39*4882a593Smuzhiyun nv04_encoder_get_connector(struct nouveau_encoder *encoder)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun struct drm_device *dev = to_drm_encoder(encoder)->dev;
42*4882a593Smuzhiyun struct drm_connector *connector;
43*4882a593Smuzhiyun struct drm_connector_list_iter conn_iter;
44*4882a593Smuzhiyun struct nouveau_connector *nv_connector = NULL;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun drm_connector_list_iter_begin(dev, &conn_iter);
47*4882a593Smuzhiyun drm_for_each_connector_iter(connector, &conn_iter) {
48*4882a593Smuzhiyun if (connector->encoder == to_drm_encoder(encoder))
49*4882a593Smuzhiyun nv_connector = nouveau_connector(connector);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun drm_connector_list_iter_end(&conn_iter);
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun return nv_connector;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun static void
nv04_display_fini(struct drm_device * dev,bool runtime,bool suspend)57*4882a593Smuzhiyun nv04_display_fini(struct drm_device *dev, bool runtime, bool suspend)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(dev);
60*4882a593Smuzhiyun struct nv04_display *disp = nv04_display(dev);
61*4882a593Smuzhiyun struct drm_crtc *crtc;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* Disable flip completion events. */
64*4882a593Smuzhiyun nvif_notify_put(&disp->flip);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /* Disable vblank interrupts. */
67*4882a593Smuzhiyun NVWriteCRTC(dev, 0, NV_PCRTC_INTR_EN_0, 0);
68*4882a593Smuzhiyun if (nv_two_heads(dev))
69*4882a593Smuzhiyun NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun if (!runtime)
72*4882a593Smuzhiyun cancel_work_sync(&drm->hpd_work);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun if (!suspend)
75*4882a593Smuzhiyun return;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /* Un-pin FB and cursors so they'll be evicted to system memory. */
78*4882a593Smuzhiyun list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
79*4882a593Smuzhiyun struct drm_framebuffer *fb = crtc->primary->fb;
80*4882a593Smuzhiyun struct nouveau_bo *nvbo;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun if (!fb || !fb->obj[0])
83*4882a593Smuzhiyun continue;
84*4882a593Smuzhiyun nvbo = nouveau_gem_object(fb->obj[0]);
85*4882a593Smuzhiyun nouveau_bo_unpin(nvbo);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
89*4882a593Smuzhiyun struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
90*4882a593Smuzhiyun if (nv_crtc->cursor.nvbo) {
91*4882a593Smuzhiyun if (nv_crtc->cursor.set_offset)
92*4882a593Smuzhiyun nouveau_bo_unmap(nv_crtc->cursor.nvbo);
93*4882a593Smuzhiyun nouveau_bo_unpin(nv_crtc->cursor.nvbo);
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun static int
nv04_display_init(struct drm_device * dev,bool resume,bool runtime)99*4882a593Smuzhiyun nv04_display_init(struct drm_device *dev, bool resume, bool runtime)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun struct nv04_display *disp = nv04_display(dev);
102*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(dev);
103*4882a593Smuzhiyun struct nouveau_encoder *encoder;
104*4882a593Smuzhiyun struct drm_crtc *crtc;
105*4882a593Smuzhiyun int ret;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* meh.. modeset apparently doesn't setup all the regs and depends
108*4882a593Smuzhiyun * on pre-existing state, for now load the state of the card *before*
109*4882a593Smuzhiyun * nouveau was loaded, and then do a modeset.
110*4882a593Smuzhiyun *
111*4882a593Smuzhiyun * best thing to do probably is to make save/restore routines not
112*4882a593Smuzhiyun * save/restore "pre-load" state, but more general so we can save
113*4882a593Smuzhiyun * on suspend too.
114*4882a593Smuzhiyun */
115*4882a593Smuzhiyun list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
116*4882a593Smuzhiyun struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
117*4882a593Smuzhiyun nv_crtc->save(&nv_crtc->base);
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun list_for_each_entry(encoder, &dev->mode_config.encoder_list, base.base.head)
121*4882a593Smuzhiyun encoder->enc_save(&encoder->base.base);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun /* Enable flip completion events. */
124*4882a593Smuzhiyun nvif_notify_get(&disp->flip);
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (!resume)
127*4882a593Smuzhiyun return 0;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /* Re-pin FB/cursors. */
130*4882a593Smuzhiyun list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
131*4882a593Smuzhiyun struct drm_framebuffer *fb = crtc->primary->fb;
132*4882a593Smuzhiyun struct nouveau_bo *nvbo;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun if (!fb || !fb->obj[0])
135*4882a593Smuzhiyun continue;
136*4882a593Smuzhiyun nvbo = nouveau_gem_object(fb->obj[0]);
137*4882a593Smuzhiyun ret = nouveau_bo_pin(nvbo, NOUVEAU_GEM_DOMAIN_VRAM, true);
138*4882a593Smuzhiyun if (ret)
139*4882a593Smuzhiyun NV_ERROR(drm, "Could not pin framebuffer\n");
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
143*4882a593Smuzhiyun struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
144*4882a593Smuzhiyun if (!nv_crtc->cursor.nvbo)
145*4882a593Smuzhiyun continue;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun ret = nouveau_bo_pin(nv_crtc->cursor.nvbo,
148*4882a593Smuzhiyun NOUVEAU_GEM_DOMAIN_VRAM, true);
149*4882a593Smuzhiyun if (!ret && nv_crtc->cursor.set_offset)
150*4882a593Smuzhiyun ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
151*4882a593Smuzhiyun if (ret)
152*4882a593Smuzhiyun NV_ERROR(drm, "Could not pin/map cursor.\n");
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /* Force CLUT to get re-loaded during modeset. */
156*4882a593Smuzhiyun list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
157*4882a593Smuzhiyun struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun nv_crtc->lut.depth = 0;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun /* This should ensure we don't hit a locking problem when someone
163*4882a593Smuzhiyun * wakes us up via a connector. We should never go into suspend
164*4882a593Smuzhiyun * while the display is on anyways.
165*4882a593Smuzhiyun */
166*4882a593Smuzhiyun if (runtime)
167*4882a593Smuzhiyun return 0;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /* Restore mode. */
170*4882a593Smuzhiyun drm_helper_resume_force_mode(dev);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
173*4882a593Smuzhiyun struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun if (!nv_crtc->cursor.nvbo)
176*4882a593Smuzhiyun continue;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun if (nv_crtc->cursor.set_offset)
179*4882a593Smuzhiyun nv_crtc->cursor.set_offset(nv_crtc,
180*4882a593Smuzhiyun nv_crtc->cursor.nvbo->offset);
181*4882a593Smuzhiyun nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
182*4882a593Smuzhiyun nv_crtc->cursor_saved_y);
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun return 0;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun static void
nv04_display_destroy(struct drm_device * dev)189*4882a593Smuzhiyun nv04_display_destroy(struct drm_device *dev)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun struct nv04_display *disp = nv04_display(dev);
192*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(dev);
193*4882a593Smuzhiyun struct nouveau_encoder *encoder;
194*4882a593Smuzhiyun struct nouveau_crtc *nv_crtc;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /* Restore state */
197*4882a593Smuzhiyun list_for_each_entry(encoder, &dev->mode_config.encoder_list, base.base.head)
198*4882a593Smuzhiyun encoder->enc_restore(&encoder->base.base);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun list_for_each_entry(nv_crtc, &dev->mode_config.crtc_list, base.head)
201*4882a593Smuzhiyun nv_crtc->restore(&nv_crtc->base);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun nouveau_hw_save_vga_fonts(dev, 0);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun nvif_notify_dtor(&disp->flip);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun nouveau_display(dev)->priv = NULL;
208*4882a593Smuzhiyun vfree(disp);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun nvif_object_unmap(&drm->client.device.object);
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun int
nv04_display_create(struct drm_device * dev)214*4882a593Smuzhiyun nv04_display_create(struct drm_device *dev)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun struct nouveau_drm *drm = nouveau_drm(dev);
217*4882a593Smuzhiyun struct nvkm_i2c *i2c = nvxx_i2c(&drm->client.device);
218*4882a593Smuzhiyun struct dcb_table *dcb = &drm->vbios.dcb;
219*4882a593Smuzhiyun struct drm_connector *connector, *ct;
220*4882a593Smuzhiyun struct drm_encoder *encoder;
221*4882a593Smuzhiyun struct nouveau_encoder *nv_encoder;
222*4882a593Smuzhiyun struct nouveau_crtc *crtc;
223*4882a593Smuzhiyun struct nv04_display *disp;
224*4882a593Smuzhiyun int i, ret;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun disp = vzalloc(sizeof(*disp));
227*4882a593Smuzhiyun if (!disp)
228*4882a593Smuzhiyun return -ENOMEM;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun nvif_object_map(&drm->client.device.object, NULL, 0);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun nouveau_display(dev)->priv = disp;
233*4882a593Smuzhiyun nouveau_display(dev)->dtor = nv04_display_destroy;
234*4882a593Smuzhiyun nouveau_display(dev)->init = nv04_display_init;
235*4882a593Smuzhiyun nouveau_display(dev)->fini = nv04_display_fini;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun /* Pre-nv50 doesn't support atomic, so don't expose the ioctls */
238*4882a593Smuzhiyun dev->driver_features &= ~DRIVER_ATOMIC;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun /* Request page flip completion event. */
241*4882a593Smuzhiyun if (drm->channel) {
242*4882a593Smuzhiyun nvif_notify_ctor(&drm->channel->nvsw, "kmsFlip", nv04_flip_complete,
243*4882a593Smuzhiyun false, NV04_NVSW_NTFY_UEVENT,
244*4882a593Smuzhiyun NULL, 0, 0, &disp->flip);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun nouveau_hw_save_vga_fonts(dev, 1);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun nv04_crtc_create(dev, 0);
250*4882a593Smuzhiyun if (nv_two_heads(dev))
251*4882a593Smuzhiyun nv04_crtc_create(dev, 1);
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun for (i = 0; i < dcb->entries; i++) {
254*4882a593Smuzhiyun struct dcb_output *dcbent = &dcb->entry[i];
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun connector = nouveau_connector_create(dev, dcbent);
257*4882a593Smuzhiyun if (IS_ERR(connector))
258*4882a593Smuzhiyun continue;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun switch (dcbent->type) {
261*4882a593Smuzhiyun case DCB_OUTPUT_ANALOG:
262*4882a593Smuzhiyun ret = nv04_dac_create(connector, dcbent);
263*4882a593Smuzhiyun break;
264*4882a593Smuzhiyun case DCB_OUTPUT_LVDS:
265*4882a593Smuzhiyun case DCB_OUTPUT_TMDS:
266*4882a593Smuzhiyun ret = nv04_dfp_create(connector, dcbent);
267*4882a593Smuzhiyun break;
268*4882a593Smuzhiyun case DCB_OUTPUT_TV:
269*4882a593Smuzhiyun if (dcbent->location == DCB_LOC_ON_CHIP)
270*4882a593Smuzhiyun ret = nv17_tv_create(connector, dcbent);
271*4882a593Smuzhiyun else
272*4882a593Smuzhiyun ret = nv04_tv_create(connector, dcbent);
273*4882a593Smuzhiyun break;
274*4882a593Smuzhiyun default:
275*4882a593Smuzhiyun NV_WARN(drm, "DCB type %d not known\n", dcbent->type);
276*4882a593Smuzhiyun continue;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun if (ret)
280*4882a593Smuzhiyun continue;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun list_for_each_entry_safe(connector, ct,
284*4882a593Smuzhiyun &dev->mode_config.connector_list, head) {
285*4882a593Smuzhiyun if (!connector->possible_encoders) {
286*4882a593Smuzhiyun NV_WARN(drm, "%s has no encoders, removing\n",
287*4882a593Smuzhiyun connector->name);
288*4882a593Smuzhiyun connector->funcs->destroy(connector);
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
293*4882a593Smuzhiyun struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
294*4882a593Smuzhiyun struct nvkm_i2c_bus *bus =
295*4882a593Smuzhiyun nvkm_i2c_bus_find(i2c, nv_encoder->dcb->i2c_index);
296*4882a593Smuzhiyun nv_encoder->i2c = bus ? &bus->i2c : NULL;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun /* Save previous state */
300*4882a593Smuzhiyun list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head)
301*4882a593Smuzhiyun crtc->save(&crtc->base);
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun list_for_each_entry(nv_encoder, &dev->mode_config.encoder_list, base.base.head)
304*4882a593Smuzhiyun nv_encoder->enc_save(&nv_encoder->base.base);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun nouveau_overlay_init(dev);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun return 0;
309*4882a593Smuzhiyun }
310