1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2010 Juergen Beisert, Pengutronix 4*4882a593Smuzhiyun * Copyright (C) 2016 Marek Vasut <marex@denx.de> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * i.MX23/i.MX28/i.MX6SX MXSFB LCD controller driver. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __MXSFB_REGS_H__ 10*4882a593Smuzhiyun #define __MXSFB_REGS_H__ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define REG_SET 4 13*4882a593Smuzhiyun #define REG_CLR 8 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define LCDC_CTRL 0x00 16*4882a593Smuzhiyun #define LCDC_CTRL1 0x10 17*4882a593Smuzhiyun #define LCDC_V3_TRANSFER_COUNT 0x20 18*4882a593Smuzhiyun #define LCDC_V4_CTRL2 0x20 19*4882a593Smuzhiyun #define LCDC_V4_TRANSFER_COUNT 0x30 20*4882a593Smuzhiyun #define LCDC_V4_CUR_BUF 0x40 21*4882a593Smuzhiyun #define LCDC_V4_NEXT_BUF 0x50 22*4882a593Smuzhiyun #define LCDC_V3_CUR_BUF 0x30 23*4882a593Smuzhiyun #define LCDC_V3_NEXT_BUF 0x40 24*4882a593Smuzhiyun #define LCDC_VDCTRL0 0x70 25*4882a593Smuzhiyun #define LCDC_VDCTRL1 0x80 26*4882a593Smuzhiyun #define LCDC_VDCTRL2 0x90 27*4882a593Smuzhiyun #define LCDC_VDCTRL3 0xa0 28*4882a593Smuzhiyun #define LCDC_VDCTRL4 0xb0 29*4882a593Smuzhiyun #define LCDC_V4_DEBUG0 0x1d0 30*4882a593Smuzhiyun #define LCDC_V3_DEBUG0 0x1f0 31*4882a593Smuzhiyun #define LCDC_AS_CTRL 0x210 32*4882a593Smuzhiyun #define LCDC_AS_BUF 0x220 33*4882a593Smuzhiyun #define LCDC_AS_NEXT_BUF 0x230 34*4882a593Smuzhiyun #define LCDC_AS_CLRKEYLOW 0x240 35*4882a593Smuzhiyun #define LCDC_AS_CLRKEYHIGH 0x250 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define CTRL_SFTRST BIT(31) 38*4882a593Smuzhiyun #define CTRL_CLKGATE BIT(30) 39*4882a593Smuzhiyun #define CTRL_BYPASS_COUNT BIT(19) 40*4882a593Smuzhiyun #define CTRL_VSYNC_MODE BIT(18) 41*4882a593Smuzhiyun #define CTRL_DOTCLK_MODE BIT(17) 42*4882a593Smuzhiyun #define CTRL_DATA_SELECT BIT(16) 43*4882a593Smuzhiyun #define CTRL_BUS_WIDTH_16 (0 << 10) 44*4882a593Smuzhiyun #define CTRL_BUS_WIDTH_8 (1 << 10) 45*4882a593Smuzhiyun #define CTRL_BUS_WIDTH_18 (2 << 10) 46*4882a593Smuzhiyun #define CTRL_BUS_WIDTH_24 (3 << 10) 47*4882a593Smuzhiyun #define CTRL_BUS_WIDTH_MASK (0x3 << 10) 48*4882a593Smuzhiyun #define CTRL_WORD_LENGTH_16 (0 << 8) 49*4882a593Smuzhiyun #define CTRL_WORD_LENGTH_8 (1 << 8) 50*4882a593Smuzhiyun #define CTRL_WORD_LENGTH_18 (2 << 8) 51*4882a593Smuzhiyun #define CTRL_WORD_LENGTH_24 (3 << 8) 52*4882a593Smuzhiyun #define CTRL_MASTER BIT(5) 53*4882a593Smuzhiyun #define CTRL_DF16 BIT(3) 54*4882a593Smuzhiyun #define CTRL_DF18 BIT(2) 55*4882a593Smuzhiyun #define CTRL_DF24 BIT(1) 56*4882a593Smuzhiyun #define CTRL_RUN BIT(0) 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #define CTRL1_RECOVER_ON_UNDERFLOW BIT(24) 59*4882a593Smuzhiyun #define CTRL1_FIFO_CLEAR BIT(21) 60*4882a593Smuzhiyun #define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16) 61*4882a593Smuzhiyun #define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf) 62*4882a593Smuzhiyun #define CTRL1_CUR_FRAME_DONE_IRQ_EN BIT(13) 63*4882a593Smuzhiyun #define CTRL1_CUR_FRAME_DONE_IRQ BIT(9) 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #define CTRL2_SET_OUTSTANDING_REQS_1 0 66*4882a593Smuzhiyun #define CTRL2_SET_OUTSTANDING_REQS_2 (0x1 << 21) 67*4882a593Smuzhiyun #define CTRL2_SET_OUTSTANDING_REQS_4 (0x2 << 21) 68*4882a593Smuzhiyun #define CTRL2_SET_OUTSTANDING_REQS_8 (0x3 << 21) 69*4882a593Smuzhiyun #define CTRL2_SET_OUTSTANDING_REQS_16 (0x4 << 21) 70*4882a593Smuzhiyun #define CTRL2_SET_OUTSTANDING_REQS_MASK (0x7 << 21) 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16) 73*4882a593Smuzhiyun #define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff) 74*4882a593Smuzhiyun #define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff) 75*4882a593Smuzhiyun #define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun #define VDCTRL0_ENABLE_PRESENT BIT(28) 78*4882a593Smuzhiyun #define VDCTRL0_VSYNC_ACT_HIGH BIT(27) 79*4882a593Smuzhiyun #define VDCTRL0_HSYNC_ACT_HIGH BIT(26) 80*4882a593Smuzhiyun #define VDCTRL0_DOTCLK_ACT_FALLING BIT(25) 81*4882a593Smuzhiyun #define VDCTRL0_ENABLE_ACT_HIGH BIT(24) 82*4882a593Smuzhiyun #define VDCTRL0_VSYNC_PERIOD_UNIT BIT(21) 83*4882a593Smuzhiyun #define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT BIT(20) 84*4882a593Smuzhiyun #define VDCTRL0_HALF_LINE BIT(19) 85*4882a593Smuzhiyun #define VDCTRL0_HALF_LINE_MODE BIT(18) 86*4882a593Smuzhiyun #define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff) 87*4882a593Smuzhiyun #define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff) 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff) 90*4882a593Smuzhiyun #define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff) 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #define VDCTRL3_MUX_SYNC_SIGNALS BIT(29) 93*4882a593Smuzhiyun #define VDCTRL3_VSYNC_ONLY BIT(28) 94*4882a593Smuzhiyun #define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16) 95*4882a593Smuzhiyun #define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff) 96*4882a593Smuzhiyun #define SET_VERT_WAIT_CNT(x) ((x) & 0xffff) 97*4882a593Smuzhiyun #define GET_VERT_WAIT_CNT(x) ((x) & 0xffff) 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun #define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */ 100*4882a593Smuzhiyun #define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */ 101*4882a593Smuzhiyun #define VDCTRL4_SYNC_SIGNALS_ON BIT(18) 102*4882a593Smuzhiyun #define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff) 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun #define DEBUG0_HSYNC BIT(26) 105*4882a593Smuzhiyun #define DEBUG0_VSYNC BIT(25) 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun #define AS_CTRL_PS_DISABLE BIT(23) 108*4882a593Smuzhiyun #define AS_CTRL_ALPHA_INVERT BIT(20) 109*4882a593Smuzhiyun #define AS_CTRL_ALPHA(a) (((a) & 0xff) << 8) 110*4882a593Smuzhiyun #define AS_CTRL_FORMAT_RGB565 (0xe << 4) 111*4882a593Smuzhiyun #define AS_CTRL_FORMAT_RGB444 (0xd << 4) 112*4882a593Smuzhiyun #define AS_CTRL_FORMAT_RGB555 (0xc << 4) 113*4882a593Smuzhiyun #define AS_CTRL_FORMAT_ARGB4444 (0x9 << 4) 114*4882a593Smuzhiyun #define AS_CTRL_FORMAT_ARGB1555 (0x8 << 4) 115*4882a593Smuzhiyun #define AS_CTRL_FORMAT_RGB888 (0x4 << 4) 116*4882a593Smuzhiyun #define AS_CTRL_FORMAT_ARGB8888 (0x0 << 4) 117*4882a593Smuzhiyun #define AS_CTRL_ENABLE_COLORKEY BIT(3) 118*4882a593Smuzhiyun #define AS_CTRL_ALPHA_CTRL_ROP (3 << 1) 119*4882a593Smuzhiyun #define AS_CTRL_ALPHA_CTRL_MULTIPLY (2 << 1) 120*4882a593Smuzhiyun #define AS_CTRL_ALPHA_CTRL_OVERRIDE (1 << 1) 121*4882a593Smuzhiyun #define AS_CTRL_ALPHA_CTRL_EMBEDDED (0 << 1) 122*4882a593Smuzhiyun #define AS_CTRL_AS_ENABLE BIT(0) 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun #define MXSFB_MIN_XRES 120 125*4882a593Smuzhiyun #define MXSFB_MIN_YRES 120 126*4882a593Smuzhiyun #define MXSFB_MAX_XRES 0xffff 127*4882a593Smuzhiyun #define MXSFB_MAX_YRES 0xffff 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun #endif /* __MXSFB_REGS_H__ */ 130