1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2016, The Linux Foundation. All rights reserved.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/of_device.h>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include "hdmi.h"
9*4882a593Smuzhiyun
msm_hdmi_phy_resource_init(struct hdmi_phy * phy)10*4882a593Smuzhiyun static int msm_hdmi_phy_resource_init(struct hdmi_phy *phy)
11*4882a593Smuzhiyun {
12*4882a593Smuzhiyun struct hdmi_phy_cfg *cfg = phy->cfg;
13*4882a593Smuzhiyun struct device *dev = &phy->pdev->dev;
14*4882a593Smuzhiyun int i, ret;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun phy->regs = devm_kcalloc(dev, cfg->num_regs, sizeof(phy->regs[0]),
17*4882a593Smuzhiyun GFP_KERNEL);
18*4882a593Smuzhiyun if (!phy->regs)
19*4882a593Smuzhiyun return -ENOMEM;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun phy->clks = devm_kcalloc(dev, cfg->num_clks, sizeof(phy->clks[0]),
22*4882a593Smuzhiyun GFP_KERNEL);
23*4882a593Smuzhiyun if (!phy->clks)
24*4882a593Smuzhiyun return -ENOMEM;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun for (i = 0; i < cfg->num_regs; i++) {
27*4882a593Smuzhiyun struct regulator *reg;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun reg = devm_regulator_get(dev, cfg->reg_names[i]);
30*4882a593Smuzhiyun if (IS_ERR(reg)) {
31*4882a593Smuzhiyun ret = PTR_ERR(reg);
32*4882a593Smuzhiyun if (ret != -EPROBE_DEFER) {
33*4882a593Smuzhiyun DRM_DEV_ERROR(dev,
34*4882a593Smuzhiyun "failed to get phy regulator: %s (%d)\n",
35*4882a593Smuzhiyun cfg->reg_names[i], ret);
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun return ret;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun phy->regs[i] = reg;
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun for (i = 0; i < cfg->num_clks; i++) {
45*4882a593Smuzhiyun struct clk *clk;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun clk = msm_clk_get(phy->pdev, cfg->clk_names[i]);
48*4882a593Smuzhiyun if (IS_ERR(clk)) {
49*4882a593Smuzhiyun ret = PTR_ERR(clk);
50*4882a593Smuzhiyun DRM_DEV_ERROR(dev, "failed to get phy clock: %s (%d)\n",
51*4882a593Smuzhiyun cfg->clk_names[i], ret);
52*4882a593Smuzhiyun return ret;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun phy->clks[i] = clk;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun return 0;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
msm_hdmi_phy_resource_enable(struct hdmi_phy * phy)61*4882a593Smuzhiyun int msm_hdmi_phy_resource_enable(struct hdmi_phy *phy)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct hdmi_phy_cfg *cfg = phy->cfg;
64*4882a593Smuzhiyun struct device *dev = &phy->pdev->dev;
65*4882a593Smuzhiyun int i, ret = 0;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun pm_runtime_get_sync(dev);
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun for (i = 0; i < cfg->num_regs; i++) {
70*4882a593Smuzhiyun ret = regulator_enable(phy->regs[i]);
71*4882a593Smuzhiyun if (ret)
72*4882a593Smuzhiyun DRM_DEV_ERROR(dev, "failed to enable regulator: %s (%d)\n",
73*4882a593Smuzhiyun cfg->reg_names[i], ret);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun for (i = 0; i < cfg->num_clks; i++) {
77*4882a593Smuzhiyun ret = clk_prepare_enable(phy->clks[i]);
78*4882a593Smuzhiyun if (ret)
79*4882a593Smuzhiyun DRM_DEV_ERROR(dev, "failed to enable clock: %s (%d)\n",
80*4882a593Smuzhiyun cfg->clk_names[i], ret);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return ret;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
msm_hdmi_phy_resource_disable(struct hdmi_phy * phy)86*4882a593Smuzhiyun void msm_hdmi_phy_resource_disable(struct hdmi_phy *phy)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun struct hdmi_phy_cfg *cfg = phy->cfg;
89*4882a593Smuzhiyun struct device *dev = &phy->pdev->dev;
90*4882a593Smuzhiyun int i;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun for (i = cfg->num_clks - 1; i >= 0; i--)
93*4882a593Smuzhiyun clk_disable_unprepare(phy->clks[i]);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun for (i = cfg->num_regs - 1; i >= 0; i--)
96*4882a593Smuzhiyun regulator_disable(phy->regs[i]);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun pm_runtime_put_sync(dev);
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
msm_hdmi_phy_powerup(struct hdmi_phy * phy,unsigned long int pixclock)101*4882a593Smuzhiyun void msm_hdmi_phy_powerup(struct hdmi_phy *phy, unsigned long int pixclock)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun if (!phy || !phy->cfg->powerup)
104*4882a593Smuzhiyun return;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun phy->cfg->powerup(phy, pixclock);
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
msm_hdmi_phy_powerdown(struct hdmi_phy * phy)109*4882a593Smuzhiyun void msm_hdmi_phy_powerdown(struct hdmi_phy *phy)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun if (!phy || !phy->cfg->powerdown)
112*4882a593Smuzhiyun return;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun phy->cfg->powerdown(phy);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
msm_hdmi_phy_pll_init(struct platform_device * pdev,enum hdmi_phy_type type)117*4882a593Smuzhiyun static int msm_hdmi_phy_pll_init(struct platform_device *pdev,
118*4882a593Smuzhiyun enum hdmi_phy_type type)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun int ret;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun switch (type) {
123*4882a593Smuzhiyun case MSM_HDMI_PHY_8960:
124*4882a593Smuzhiyun ret = msm_hdmi_pll_8960_init(pdev);
125*4882a593Smuzhiyun break;
126*4882a593Smuzhiyun case MSM_HDMI_PHY_8996:
127*4882a593Smuzhiyun ret = msm_hdmi_pll_8996_init(pdev);
128*4882a593Smuzhiyun break;
129*4882a593Smuzhiyun /*
130*4882a593Smuzhiyun * we don't have PLL support for these, don't report an error for now
131*4882a593Smuzhiyun */
132*4882a593Smuzhiyun case MSM_HDMI_PHY_8x60:
133*4882a593Smuzhiyun case MSM_HDMI_PHY_8x74:
134*4882a593Smuzhiyun default:
135*4882a593Smuzhiyun ret = 0;
136*4882a593Smuzhiyun break;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return ret;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
msm_hdmi_phy_probe(struct platform_device * pdev)142*4882a593Smuzhiyun static int msm_hdmi_phy_probe(struct platform_device *pdev)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun struct device *dev = &pdev->dev;
145*4882a593Smuzhiyun struct hdmi_phy *phy;
146*4882a593Smuzhiyun int ret;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
149*4882a593Smuzhiyun if (!phy)
150*4882a593Smuzhiyun return -ENODEV;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun phy->cfg = (struct hdmi_phy_cfg *)of_device_get_match_data(dev);
153*4882a593Smuzhiyun if (!phy->cfg)
154*4882a593Smuzhiyun return -ENODEV;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun phy->mmio = msm_ioremap(pdev, "hdmi_phy", "HDMI_PHY");
157*4882a593Smuzhiyun if (IS_ERR(phy->mmio)) {
158*4882a593Smuzhiyun DRM_DEV_ERROR(dev, "%s: failed to map phy base\n", __func__);
159*4882a593Smuzhiyun return -ENOMEM;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun phy->pdev = pdev;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun ret = msm_hdmi_phy_resource_init(phy);
165*4882a593Smuzhiyun if (ret)
166*4882a593Smuzhiyun return ret;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun pm_runtime_enable(&pdev->dev);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun ret = msm_hdmi_phy_resource_enable(phy);
171*4882a593Smuzhiyun if (ret)
172*4882a593Smuzhiyun return ret;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun ret = msm_hdmi_phy_pll_init(pdev, phy->cfg->type);
175*4882a593Smuzhiyun if (ret) {
176*4882a593Smuzhiyun DRM_DEV_ERROR(dev, "couldn't init PLL\n");
177*4882a593Smuzhiyun msm_hdmi_phy_resource_disable(phy);
178*4882a593Smuzhiyun return ret;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun msm_hdmi_phy_resource_disable(phy);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun platform_set_drvdata(pdev, phy);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun return 0;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
msm_hdmi_phy_remove(struct platform_device * pdev)188*4882a593Smuzhiyun static int msm_hdmi_phy_remove(struct platform_device *pdev)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun pm_runtime_disable(&pdev->dev);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun return 0;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun static const struct of_device_id msm_hdmi_phy_dt_match[] = {
196*4882a593Smuzhiyun { .compatible = "qcom,hdmi-phy-8660",
197*4882a593Smuzhiyun .data = &msm_hdmi_phy_8x60_cfg },
198*4882a593Smuzhiyun { .compatible = "qcom,hdmi-phy-8960",
199*4882a593Smuzhiyun .data = &msm_hdmi_phy_8960_cfg },
200*4882a593Smuzhiyun { .compatible = "qcom,hdmi-phy-8974",
201*4882a593Smuzhiyun .data = &msm_hdmi_phy_8x74_cfg },
202*4882a593Smuzhiyun { .compatible = "qcom,hdmi-phy-8084",
203*4882a593Smuzhiyun .data = &msm_hdmi_phy_8x74_cfg },
204*4882a593Smuzhiyun { .compatible = "qcom,hdmi-phy-8996",
205*4882a593Smuzhiyun .data = &msm_hdmi_phy_8996_cfg },
206*4882a593Smuzhiyun {}
207*4882a593Smuzhiyun };
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun static struct platform_driver msm_hdmi_phy_platform_driver = {
210*4882a593Smuzhiyun .probe = msm_hdmi_phy_probe,
211*4882a593Smuzhiyun .remove = msm_hdmi_phy_remove,
212*4882a593Smuzhiyun .driver = {
213*4882a593Smuzhiyun .name = "msm_hdmi_phy",
214*4882a593Smuzhiyun .of_match_table = msm_hdmi_phy_dt_match,
215*4882a593Smuzhiyun },
216*4882a593Smuzhiyun };
217*4882a593Smuzhiyun
msm_hdmi_phy_driver_register(void)218*4882a593Smuzhiyun void __init msm_hdmi_phy_driver_register(void)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun platform_driver_register(&msm_hdmi_phy_platform_driver);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
msm_hdmi_phy_driver_unregister(void)223*4882a593Smuzhiyun void __exit msm_hdmi_phy_driver_unregister(void)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun platform_driver_unregister(&msm_hdmi_phy_platform_driver);
226*4882a593Smuzhiyun }
227