1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _DP_PANEL_H_ 7*4882a593Smuzhiyun #define _DP_PANEL_H_ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <drm/msm_drm.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include "dp_aux.h" 12*4882a593Smuzhiyun #include "dp_link.h" 13*4882a593Smuzhiyun #include "dp_hpd.h" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun struct edid; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define DPRX_EXTENDED_DPCD_FIELD 0x2200 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define DP_DOWNSTREAM_PORTS 4 20*4882a593Smuzhiyun #define DP_DOWNSTREAM_CAP_SIZE 4 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun struct dp_display_mode { 23*4882a593Smuzhiyun struct drm_display_mode drm_mode; 24*4882a593Smuzhiyun u32 capabilities; 25*4882a593Smuzhiyun u32 bpp; 26*4882a593Smuzhiyun u32 h_active_low; 27*4882a593Smuzhiyun u32 v_active_low; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun struct dp_panel_in { 31*4882a593Smuzhiyun struct device *dev; 32*4882a593Smuzhiyun struct drm_dp_aux *aux; 33*4882a593Smuzhiyun struct dp_link *link; 34*4882a593Smuzhiyun struct dp_catalog *catalog; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun struct dp_panel { 38*4882a593Smuzhiyun /* dpcd raw data */ 39*4882a593Smuzhiyun u8 dpcd[DP_RECEIVER_CAP_SIZE + 1]; 40*4882a593Smuzhiyun u8 ds_cap_info[DP_DOWNSTREAM_PORTS * DP_DOWNSTREAM_CAP_SIZE]; 41*4882a593Smuzhiyun u32 ds_port_cnt; 42*4882a593Smuzhiyun u32 dfp_present; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun struct dp_link_info link_info; 45*4882a593Smuzhiyun struct drm_dp_desc desc; 46*4882a593Smuzhiyun struct edid *edid; 47*4882a593Smuzhiyun struct drm_connector *connector; 48*4882a593Smuzhiyun struct dp_display_mode dp_mode; 49*4882a593Smuzhiyun bool video_test; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun u32 vic; 52*4882a593Smuzhiyun u32 max_pclk_khz; 53*4882a593Smuzhiyun u32 max_dp_lanes; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun u32 max_bw_code; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun int dp_panel_init_panel_info(struct dp_panel *dp_panel); 59*4882a593Smuzhiyun int dp_panel_deinit(struct dp_panel *dp_panel); 60*4882a593Smuzhiyun int dp_panel_timing_cfg(struct dp_panel *dp_panel); 61*4882a593Smuzhiyun void dp_panel_dump_regs(struct dp_panel *dp_panel); 62*4882a593Smuzhiyun int dp_panel_read_sink_caps(struct dp_panel *dp_panel, 63*4882a593Smuzhiyun struct drm_connector *connector); 64*4882a593Smuzhiyun u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel, u32 mode_max_bpp, 65*4882a593Smuzhiyun u32 mode_pclk_khz); 66*4882a593Smuzhiyun int dp_panel_get_modes(struct dp_panel *dp_panel, 67*4882a593Smuzhiyun struct drm_connector *connector, struct dp_display_mode *mode); 68*4882a593Smuzhiyun void dp_panel_handle_sink_request(struct dp_panel *dp_panel); 69*4882a593Smuzhiyun void dp_panel_tpg_config(struct dp_panel *dp_panel, bool enable); 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun /** 72*4882a593Smuzhiyun * is_link_rate_valid() - validates the link rate 73*4882a593Smuzhiyun * @lane_rate: link rate requested by the sink 74*4882a593Smuzhiyun * 75*4882a593Smuzhiyun * Returns true if the requested link rate is supported. 76*4882a593Smuzhiyun */ is_link_rate_valid(u32 bw_code)77*4882a593Smuzhiyunstatic inline bool is_link_rate_valid(u32 bw_code) 78*4882a593Smuzhiyun { 79*4882a593Smuzhiyun return (bw_code == DP_LINK_BW_1_62 || 80*4882a593Smuzhiyun bw_code == DP_LINK_BW_2_7 || 81*4882a593Smuzhiyun bw_code == DP_LINK_BW_5_4 || 82*4882a593Smuzhiyun bw_code == DP_LINK_BW_8_1); 83*4882a593Smuzhiyun } 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /** 86*4882a593Smuzhiyun * dp_link_is_lane_count_valid() - validates the lane count 87*4882a593Smuzhiyun * @lane_count: lane count requested by the sink 88*4882a593Smuzhiyun * 89*4882a593Smuzhiyun * Returns true if the requested lane count is supported. 90*4882a593Smuzhiyun */ is_lane_count_valid(u32 lane_count)91*4882a593Smuzhiyunstatic inline bool is_lane_count_valid(u32 lane_count) 92*4882a593Smuzhiyun { 93*4882a593Smuzhiyun return (lane_count == 1 || 94*4882a593Smuzhiyun lane_count == 2 || 95*4882a593Smuzhiyun lane_count == 4); 96*4882a593Smuzhiyun } 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun struct dp_panel *dp_panel_get(struct dp_panel_in *in); 99*4882a593Smuzhiyun void dp_panel_put(struct dp_panel *dp_panel); 100*4882a593Smuzhiyun #endif /* _DP_PANEL_H_ */ 101