1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2013 Red Hat
4*4882a593Smuzhiyun * Author: Rob Clark <robdclark@gmail.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #ifndef __MDP_KMS_H__
8*4882a593Smuzhiyun #define __MDP_KMS_H__
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/clk.h>
11*4882a593Smuzhiyun #include <linux/platform_device.h>
12*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include "msm_drv.h"
15*4882a593Smuzhiyun #include "msm_kms.h"
16*4882a593Smuzhiyun #include "mdp_common.xml.h"
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun struct mdp_kms;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun struct mdp_kms_funcs {
21*4882a593Smuzhiyun struct msm_kms_funcs base;
22*4882a593Smuzhiyun void (*set_irqmask)(struct mdp_kms *mdp_kms, uint32_t irqmask,
23*4882a593Smuzhiyun uint32_t old_irqmask);
24*4882a593Smuzhiyun };
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun struct mdp_kms {
27*4882a593Smuzhiyun struct msm_kms base;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun const struct mdp_kms_funcs *funcs;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* irq handling: */
32*4882a593Smuzhiyun bool in_irq;
33*4882a593Smuzhiyun struct list_head irq_list; /* list of mdp4_irq */
34*4882a593Smuzhiyun uint32_t vblank_mask; /* irq bits set for userspace vblank */
35*4882a593Smuzhiyun uint32_t cur_irq_mask; /* current irq mask */
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun #define to_mdp_kms(x) container_of(x, struct mdp_kms, base)
38*4882a593Smuzhiyun
mdp_kms_init(struct mdp_kms * mdp_kms,const struct mdp_kms_funcs * funcs)39*4882a593Smuzhiyun static inline void mdp_kms_init(struct mdp_kms *mdp_kms,
40*4882a593Smuzhiyun const struct mdp_kms_funcs *funcs)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun mdp_kms->funcs = funcs;
43*4882a593Smuzhiyun INIT_LIST_HEAD(&mdp_kms->irq_list);
44*4882a593Smuzhiyun msm_kms_init(&mdp_kms->base, &funcs->base);
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /*
48*4882a593Smuzhiyun * irq helpers:
49*4882a593Smuzhiyun */
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* For transiently registering for different MDP irqs that various parts
52*4882a593Smuzhiyun * of the KMS code need during setup/configuration. These are not
53*4882a593Smuzhiyun * necessarily the same as what drm_vblank_get/put() are requesting, and
54*4882a593Smuzhiyun * the hysteresis in drm_vblank_put() is not necessarily desirable for
55*4882a593Smuzhiyun * internal housekeeping related irq usage.
56*4882a593Smuzhiyun */
57*4882a593Smuzhiyun struct mdp_irq {
58*4882a593Smuzhiyun struct list_head node;
59*4882a593Smuzhiyun uint32_t irqmask;
60*4882a593Smuzhiyun bool registered;
61*4882a593Smuzhiyun void (*irq)(struct mdp_irq *irq, uint32_t irqstatus);
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun void mdp_dispatch_irqs(struct mdp_kms *mdp_kms, uint32_t status);
65*4882a593Smuzhiyun void mdp_update_vblank_mask(struct mdp_kms *mdp_kms, uint32_t mask, bool enable);
66*4882a593Smuzhiyun void mdp_irq_wait(struct mdp_kms *mdp_kms, uint32_t irqmask);
67*4882a593Smuzhiyun void mdp_irq_register(struct mdp_kms *mdp_kms, struct mdp_irq *irq);
68*4882a593Smuzhiyun void mdp_irq_unregister(struct mdp_kms *mdp_kms, struct mdp_irq *irq);
69*4882a593Smuzhiyun void mdp_irq_update(struct mdp_kms *mdp_kms);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /*
72*4882a593Smuzhiyun * pixel format helpers:
73*4882a593Smuzhiyun */
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun struct mdp_format {
76*4882a593Smuzhiyun struct msm_format base;
77*4882a593Smuzhiyun enum mdp_bpc bpc_r, bpc_g, bpc_b;
78*4882a593Smuzhiyun enum mdp_bpc_alpha bpc_a;
79*4882a593Smuzhiyun uint8_t unpack[4];
80*4882a593Smuzhiyun bool alpha_enable, unpack_tight;
81*4882a593Smuzhiyun uint8_t cpp, unpack_count;
82*4882a593Smuzhiyun enum mdp_fetch_type fetch_type;
83*4882a593Smuzhiyun enum mdp_chroma_samp_type chroma_sample;
84*4882a593Smuzhiyun bool is_yuv;
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun #define to_mdp_format(x) container_of(x, struct mdp_format, base)
87*4882a593Smuzhiyun #define MDP_FORMAT_IS_YUV(mdp_format) ((mdp_format)->is_yuv)
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun uint32_t mdp_get_formats(uint32_t *formats, uint32_t max_formats, bool rgb_only);
90*4882a593Smuzhiyun const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format, uint64_t modifier);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /* MDP capabilities */
93*4882a593Smuzhiyun #define MDP_CAP_SMP BIT(0) /* Shared Memory Pool */
94*4882a593Smuzhiyun #define MDP_CAP_DSC BIT(1) /* VESA Display Stream Compression */
95*4882a593Smuzhiyun #define MDP_CAP_CDM BIT(2) /* Chroma Down Module (HDMI 2.0 YUV) */
96*4882a593Smuzhiyun #define MDP_CAP_SRC_SPLIT BIT(3) /* Source Split of SSPPs */
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* MDP pipe capabilities */
99*4882a593Smuzhiyun #define MDP_PIPE_CAP_HFLIP BIT(0)
100*4882a593Smuzhiyun #define MDP_PIPE_CAP_VFLIP BIT(1)
101*4882a593Smuzhiyun #define MDP_PIPE_CAP_SCALE BIT(2)
102*4882a593Smuzhiyun #define MDP_PIPE_CAP_CSC BIT(3)
103*4882a593Smuzhiyun #define MDP_PIPE_CAP_DECIMATION BIT(4)
104*4882a593Smuzhiyun #define MDP_PIPE_CAP_SW_PIX_EXT BIT(5)
105*4882a593Smuzhiyun #define MDP_PIPE_CAP_CURSOR BIT(6)
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* MDP layer mixer caps */
108*4882a593Smuzhiyun #define MDP_LM_CAP_DISPLAY BIT(0)
109*4882a593Smuzhiyun #define MDP_LM_CAP_WB BIT(1)
110*4882a593Smuzhiyun #define MDP_LM_CAP_PAIR BIT(2)
111*4882a593Smuzhiyun
pipe_supports_yuv(uint32_t pipe_caps)112*4882a593Smuzhiyun static inline bool pipe_supports_yuv(uint32_t pipe_caps)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun return (pipe_caps & MDP_PIPE_CAP_SCALE) &&
115*4882a593Smuzhiyun (pipe_caps & MDP_PIPE_CAP_CSC);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun enum csc_type {
119*4882a593Smuzhiyun CSC_RGB2RGB = 0,
120*4882a593Smuzhiyun CSC_YUV2RGB,
121*4882a593Smuzhiyun CSC_RGB2YUV,
122*4882a593Smuzhiyun CSC_YUV2YUV,
123*4882a593Smuzhiyun CSC_MAX
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun struct csc_cfg {
127*4882a593Smuzhiyun enum csc_type type;
128*4882a593Smuzhiyun uint32_t matrix[9];
129*4882a593Smuzhiyun uint32_t pre_bias[3];
130*4882a593Smuzhiyun uint32_t post_bias[3];
131*4882a593Smuzhiyun uint32_t pre_clamp[6];
132*4882a593Smuzhiyun uint32_t post_clamp[6];
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun struct csc_cfg *mdp_get_default_csc_cfg(enum csc_type);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun #endif /* __MDP_KMS_H__ */
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