1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2012 Red Hat Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun * copy of this software and associated documentation files (the
6*4882a593Smuzhiyun * "Software"), to deal in the Software without restriction, including
7*4882a593Smuzhiyun * without limitation the rights to use, copy, modify, merge, publish,
8*4882a593Smuzhiyun * distribute, sub license, and/or sell copies of the Software, and to
9*4882a593Smuzhiyun * permit persons to whom the Software is furnished to do so, subject to
10*4882a593Smuzhiyun * the following conditions:
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15*4882a593Smuzhiyun * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16*4882a593Smuzhiyun * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17*4882a593Smuzhiyun * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18*4882a593Smuzhiyun * USE OR OTHER DEALINGS IN THE SOFTWARE.
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the
21*4882a593Smuzhiyun * next paragraph) shall be included in all copies or substantial portions
22*4882a593Smuzhiyun * of the Software.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun * Authors: Dave Airlie <airlied@redhat.com>
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include <linux/export.h>
30*4882a593Smuzhiyun #include <linux/i2c-algo-bit.h>
31*4882a593Smuzhiyun #include <linux/i2c.h>
32*4882a593Smuzhiyun #include <linux/pci.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include "mgag200_drv.h"
35*4882a593Smuzhiyun
mga_i2c_read_gpio(struct mga_device * mdev)36*4882a593Smuzhiyun static int mga_i2c_read_gpio(struct mga_device *mdev)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun WREG8(DAC_INDEX, MGA1064_GEN_IO_DATA);
39*4882a593Smuzhiyun return RREG8(DAC_DATA);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
mga_i2c_set_gpio(struct mga_device * mdev,int mask,int val)42*4882a593Smuzhiyun static void mga_i2c_set_gpio(struct mga_device *mdev, int mask, int val)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun int tmp;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun WREG8(DAC_INDEX, MGA1064_GEN_IO_CTL);
47*4882a593Smuzhiyun tmp = (RREG8(DAC_DATA) & mask) | val;
48*4882a593Smuzhiyun WREG_DAC(MGA1064_GEN_IO_CTL, tmp);
49*4882a593Smuzhiyun WREG_DAC(MGA1064_GEN_IO_DATA, 0);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
mga_i2c_set(struct mga_device * mdev,int mask,int state)52*4882a593Smuzhiyun static inline void mga_i2c_set(struct mga_device *mdev, int mask, int state)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun if (state)
55*4882a593Smuzhiyun state = 0;
56*4882a593Smuzhiyun else
57*4882a593Smuzhiyun state = mask;
58*4882a593Smuzhiyun mga_i2c_set_gpio(mdev, ~mask, state);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
mga_gpio_setsda(void * data,int state)61*4882a593Smuzhiyun static void mga_gpio_setsda(void *data, int state)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct mga_i2c_chan *i2c = data;
64*4882a593Smuzhiyun struct mga_device *mdev = to_mga_device(i2c->dev);
65*4882a593Smuzhiyun mga_i2c_set(mdev, i2c->data, state);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
mga_gpio_setscl(void * data,int state)68*4882a593Smuzhiyun static void mga_gpio_setscl(void *data, int state)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun struct mga_i2c_chan *i2c = data;
71*4882a593Smuzhiyun struct mga_device *mdev = to_mga_device(i2c->dev);
72*4882a593Smuzhiyun mga_i2c_set(mdev, i2c->clock, state);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
mga_gpio_getsda(void * data)75*4882a593Smuzhiyun static int mga_gpio_getsda(void *data)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun struct mga_i2c_chan *i2c = data;
78*4882a593Smuzhiyun struct mga_device *mdev = to_mga_device(i2c->dev);
79*4882a593Smuzhiyun return (mga_i2c_read_gpio(mdev) & i2c->data) ? 1 : 0;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
mga_gpio_getscl(void * data)82*4882a593Smuzhiyun static int mga_gpio_getscl(void *data)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun struct mga_i2c_chan *i2c = data;
85*4882a593Smuzhiyun struct mga_device *mdev = to_mga_device(i2c->dev);
86*4882a593Smuzhiyun return (mga_i2c_read_gpio(mdev) & i2c->clock) ? 1 : 0;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
mgag200_i2c_create(struct drm_device * dev)89*4882a593Smuzhiyun struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun struct mga_device *mdev = to_mga_device(dev);
92*4882a593Smuzhiyun struct mga_i2c_chan *i2c;
93*4882a593Smuzhiyun int ret;
94*4882a593Smuzhiyun int data, clock;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun WREG_DAC(MGA1064_GEN_IO_CTL2, 1);
97*4882a593Smuzhiyun WREG_DAC(MGA1064_GEN_IO_DATA, 0xff);
98*4882a593Smuzhiyun WREG_DAC(MGA1064_GEN_IO_CTL, 0);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun switch (mdev->type) {
101*4882a593Smuzhiyun case G200_SE_A:
102*4882a593Smuzhiyun case G200_SE_B:
103*4882a593Smuzhiyun case G200_EV:
104*4882a593Smuzhiyun case G200_WB:
105*4882a593Smuzhiyun case G200_EW3:
106*4882a593Smuzhiyun data = 1;
107*4882a593Smuzhiyun clock = 2;
108*4882a593Smuzhiyun break;
109*4882a593Smuzhiyun case G200_EH:
110*4882a593Smuzhiyun case G200_EH3:
111*4882a593Smuzhiyun case G200_ER:
112*4882a593Smuzhiyun data = 2;
113*4882a593Smuzhiyun clock = 1;
114*4882a593Smuzhiyun break;
115*4882a593Smuzhiyun default:
116*4882a593Smuzhiyun data = 2;
117*4882a593Smuzhiyun clock = 8;
118*4882a593Smuzhiyun break;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun i2c = kzalloc(sizeof(struct mga_i2c_chan), GFP_KERNEL);
122*4882a593Smuzhiyun if (!i2c)
123*4882a593Smuzhiyun return NULL;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun i2c->data = data;
126*4882a593Smuzhiyun i2c->clock = clock;
127*4882a593Smuzhiyun i2c->adapter.owner = THIS_MODULE;
128*4882a593Smuzhiyun i2c->adapter.class = I2C_CLASS_DDC;
129*4882a593Smuzhiyun i2c->adapter.dev.parent = &dev->pdev->dev;
130*4882a593Smuzhiyun i2c->dev = dev;
131*4882a593Smuzhiyun i2c_set_adapdata(&i2c->adapter, i2c);
132*4882a593Smuzhiyun snprintf(i2c->adapter.name, sizeof(i2c->adapter.name), "mga i2c");
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun i2c->adapter.algo_data = &i2c->bit;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun i2c->bit.udelay = 10;
137*4882a593Smuzhiyun i2c->bit.timeout = 2;
138*4882a593Smuzhiyun i2c->bit.data = i2c;
139*4882a593Smuzhiyun i2c->bit.setsda = mga_gpio_setsda;
140*4882a593Smuzhiyun i2c->bit.setscl = mga_gpio_setscl;
141*4882a593Smuzhiyun i2c->bit.getsda = mga_gpio_getsda;
142*4882a593Smuzhiyun i2c->bit.getscl = mga_gpio_getscl;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun ret = i2c_bit_add_bus(&i2c->adapter);
145*4882a593Smuzhiyun if (ret) {
146*4882a593Smuzhiyun kfree(i2c);
147*4882a593Smuzhiyun i2c = NULL;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun return i2c;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
mgag200_i2c_destroy(struct mga_i2c_chan * i2c)152*4882a593Smuzhiyun void mgag200_i2c_destroy(struct mga_i2c_chan *i2c)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun if (!i2c)
155*4882a593Smuzhiyun return;
156*4882a593Smuzhiyun i2c_del_adapter(&i2c->adapter);
157*4882a593Smuzhiyun kfree(i2c);
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160