xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/mga/mga_warp.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* mga_warp.c -- Matrox G200/G400 WARP engine management -*- linux-c -*-
2*4882a593Smuzhiyun  * Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
5*4882a593Smuzhiyun  * All Rights Reserved.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
8*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
9*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
10*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
12*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * The above copyright notice and this permission notice (including the next
15*4882a593Smuzhiyun  * paragraph) shall be included in all copies or substantial portions of the
16*4882a593Smuzhiyun  * Software.
17*4882a593Smuzhiyun  *
18*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
21*4882a593Smuzhiyun  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
22*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
23*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
24*4882a593Smuzhiyun  * OTHER DEALINGS IN THE SOFTWARE.
25*4882a593Smuzhiyun  *
26*4882a593Smuzhiyun  * Authors:
27*4882a593Smuzhiyun  *    Gareth Hughes <gareth@valinux.com>
28*4882a593Smuzhiyun  */
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include <linux/firmware.h>
31*4882a593Smuzhiyun #include <linux/ihex.h>
32*4882a593Smuzhiyun #include <linux/module.h>
33*4882a593Smuzhiyun #include <linux/platform_device.h>
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #include "mga_drv.h"
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define FIRMWARE_G200 "matrox/g200_warp.fw"
38*4882a593Smuzhiyun #define FIRMWARE_G400 "matrox/g400_warp.fw"
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun MODULE_FIRMWARE(FIRMWARE_G200);
41*4882a593Smuzhiyun MODULE_FIRMWARE(FIRMWARE_G400);
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define MGA_WARP_CODE_ALIGN		256	/* in bytes */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define WARP_UCODE_SIZE(size)		ALIGN(size, MGA_WARP_CODE_ALIGN)
46*4882a593Smuzhiyun 
mga_warp_install_microcode(drm_mga_private_t * dev_priv)47*4882a593Smuzhiyun int mga_warp_install_microcode(drm_mga_private_t *dev_priv)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	unsigned char *vcbase = dev_priv->warp->handle;
50*4882a593Smuzhiyun 	unsigned long pcbase = dev_priv->warp->offset;
51*4882a593Smuzhiyun 	const char *firmware_name;
52*4882a593Smuzhiyun 	struct platform_device *pdev;
53*4882a593Smuzhiyun 	const struct firmware *fw = NULL;
54*4882a593Smuzhiyun 	const struct ihex_binrec *rec;
55*4882a593Smuzhiyun 	unsigned int size;
56*4882a593Smuzhiyun 	int n_pipes, where;
57*4882a593Smuzhiyun 	int rc = 0;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	switch (dev_priv->chipset) {
60*4882a593Smuzhiyun 	case MGA_CARD_TYPE_G400:
61*4882a593Smuzhiyun 	case MGA_CARD_TYPE_G550:
62*4882a593Smuzhiyun 		firmware_name = FIRMWARE_G400;
63*4882a593Smuzhiyun 		n_pipes = MGA_MAX_G400_PIPES;
64*4882a593Smuzhiyun 		break;
65*4882a593Smuzhiyun 	case MGA_CARD_TYPE_G200:
66*4882a593Smuzhiyun 		firmware_name = FIRMWARE_G200;
67*4882a593Smuzhiyun 		n_pipes = MGA_MAX_G200_PIPES;
68*4882a593Smuzhiyun 		break;
69*4882a593Smuzhiyun 	default:
70*4882a593Smuzhiyun 		return -EINVAL;
71*4882a593Smuzhiyun 	}
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	pdev = platform_device_register_simple("mga_warp", 0, NULL, 0);
74*4882a593Smuzhiyun 	if (IS_ERR(pdev)) {
75*4882a593Smuzhiyun 		DRM_ERROR("mga: Failed to register microcode\n");
76*4882a593Smuzhiyun 		return PTR_ERR(pdev);
77*4882a593Smuzhiyun 	}
78*4882a593Smuzhiyun 	rc = request_ihex_firmware(&fw, firmware_name, &pdev->dev);
79*4882a593Smuzhiyun 	platform_device_unregister(pdev);
80*4882a593Smuzhiyun 	if (rc) {
81*4882a593Smuzhiyun 		DRM_ERROR("mga: Failed to load microcode \"%s\"\n",
82*4882a593Smuzhiyun 			  firmware_name);
83*4882a593Smuzhiyun 		return rc;
84*4882a593Smuzhiyun 	}
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	size = 0;
87*4882a593Smuzhiyun 	where = 0;
88*4882a593Smuzhiyun 	for (rec = (const struct ihex_binrec *)fw->data;
89*4882a593Smuzhiyun 	     rec;
90*4882a593Smuzhiyun 	     rec = ihex_next_binrec(rec)) {
91*4882a593Smuzhiyun 		size += WARP_UCODE_SIZE(be16_to_cpu(rec->len));
92*4882a593Smuzhiyun 		where++;
93*4882a593Smuzhiyun 	}
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	if (where != n_pipes) {
96*4882a593Smuzhiyun 		DRM_ERROR("mga: Invalid microcode \"%s\"\n", firmware_name);
97*4882a593Smuzhiyun 		rc = -EINVAL;
98*4882a593Smuzhiyun 		goto out;
99*4882a593Smuzhiyun 	}
100*4882a593Smuzhiyun 	size = PAGE_ALIGN(size);
101*4882a593Smuzhiyun 	DRM_DEBUG("MGA ucode size = %d bytes\n", size);
102*4882a593Smuzhiyun 	if (size > dev_priv->warp->size) {
103*4882a593Smuzhiyun 		DRM_ERROR("microcode too large! (%u > %lu)\n",
104*4882a593Smuzhiyun 			  size, dev_priv->warp->size);
105*4882a593Smuzhiyun 		rc = -ENOMEM;
106*4882a593Smuzhiyun 		goto out;
107*4882a593Smuzhiyun 	}
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	where = 0;
112*4882a593Smuzhiyun 	for (rec = (const struct ihex_binrec *)fw->data;
113*4882a593Smuzhiyun 	     rec;
114*4882a593Smuzhiyun 	     rec = ihex_next_binrec(rec)) {
115*4882a593Smuzhiyun 		unsigned int src_size, dst_size;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 		DRM_DEBUG(" pcbase = 0x%08lx  vcbase = %p\n", pcbase, vcbase);
118*4882a593Smuzhiyun 		dev_priv->warp_pipe_phys[where] = pcbase;
119*4882a593Smuzhiyun 		src_size = be16_to_cpu(rec->len);
120*4882a593Smuzhiyun 		dst_size = WARP_UCODE_SIZE(src_size);
121*4882a593Smuzhiyun 		memcpy(vcbase, rec->data, src_size);
122*4882a593Smuzhiyun 		pcbase += dst_size;
123*4882a593Smuzhiyun 		vcbase += dst_size;
124*4882a593Smuzhiyun 		where++;
125*4882a593Smuzhiyun 	}
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun out:
128*4882a593Smuzhiyun 	release_firmware(fw);
129*4882a593Smuzhiyun 	return rc;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun #define WMISC_EXPECTED		(MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
133*4882a593Smuzhiyun 
mga_warp_init(drm_mga_private_t * dev_priv)134*4882a593Smuzhiyun int mga_warp_init(drm_mga_private_t *dev_priv)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	u32 wmisc;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	/* FIXME: Get rid of these damned magic numbers...
139*4882a593Smuzhiyun 	 */
140*4882a593Smuzhiyun 	switch (dev_priv->chipset) {
141*4882a593Smuzhiyun 	case MGA_CARD_TYPE_G400:
142*4882a593Smuzhiyun 	case MGA_CARD_TYPE_G550:
143*4882a593Smuzhiyun 		MGA_WRITE(MGA_WIADDR2, MGA_WMODE_SUSPEND);
144*4882a593Smuzhiyun 		MGA_WRITE(MGA_WGETMSB, 0x00000E00);
145*4882a593Smuzhiyun 		MGA_WRITE(MGA_WVRTXSZ, 0x00001807);
146*4882a593Smuzhiyun 		MGA_WRITE(MGA_WACCEPTSEQ, 0x18000000);
147*4882a593Smuzhiyun 		break;
148*4882a593Smuzhiyun 	case MGA_CARD_TYPE_G200:
149*4882a593Smuzhiyun 		MGA_WRITE(MGA_WIADDR, MGA_WMODE_SUSPEND);
150*4882a593Smuzhiyun 		MGA_WRITE(MGA_WGETMSB, 0x1606);
151*4882a593Smuzhiyun 		MGA_WRITE(MGA_WVRTXSZ, 7);
152*4882a593Smuzhiyun 		break;
153*4882a593Smuzhiyun 	default:
154*4882a593Smuzhiyun 		return -EINVAL;
155*4882a593Smuzhiyun 	}
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	MGA_WRITE(MGA_WMISC, (MGA_WUCODECACHE_ENABLE |
158*4882a593Smuzhiyun 			      MGA_WMASTER_ENABLE | MGA_WCACHEFLUSH_ENABLE));
159*4882a593Smuzhiyun 	wmisc = MGA_READ(MGA_WMISC);
160*4882a593Smuzhiyun 	if (wmisc != WMISC_EXPECTED) {
161*4882a593Smuzhiyun 		DRM_ERROR("WARP engine config failed! 0x%x != 0x%x\n",
162*4882a593Smuzhiyun 			  wmisc, WMISC_EXPECTED);
163*4882a593Smuzhiyun 		return -EINVAL;
164*4882a593Smuzhiyun 	}
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	return 0;
167*4882a593Smuzhiyun }
168