1*4882a593Smuzhiyun /* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
2*4882a593Smuzhiyun */
3*4882a593Smuzhiyun /*
4*4882a593Smuzhiyun * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * The Weather Channel (TM) funded Tungsten Graphics to develop the
7*4882a593Smuzhiyun * initial release of the Radeon 8500 driver under the XFree86 license.
8*4882a593Smuzhiyun * This notice must be preserved.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
11*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
12*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
13*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
14*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
15*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the next
18*4882a593Smuzhiyun * paragraph) shall be included in all copies or substantial portions of the
19*4882a593Smuzhiyun * Software.
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
24*4882a593Smuzhiyun * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
25*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
26*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27*4882a593Smuzhiyun * DEALINGS IN THE SOFTWARE.
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun * Authors:
30*4882a593Smuzhiyun * Keith Whitwell <keith@tungstengraphics.com>
31*4882a593Smuzhiyun * Eric Anholt <anholt@FreeBSD.org>
32*4882a593Smuzhiyun */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include "mga_drv.h"
35*4882a593Smuzhiyun
mga_get_vblank_counter(struct drm_device * dev,unsigned int pipe)36*4882a593Smuzhiyun u32 mga_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun const drm_mga_private_t *const dev_priv =
39*4882a593Smuzhiyun (drm_mga_private_t *) dev->dev_private;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun if (pipe != 0)
42*4882a593Smuzhiyun return 0;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun return atomic_read(&dev_priv->vbl_received);
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun
mga_driver_irq_handler(int irq,void * arg)48*4882a593Smuzhiyun irqreturn_t mga_driver_irq_handler(int irq, void *arg)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun struct drm_device *dev = (struct drm_device *) arg;
51*4882a593Smuzhiyun drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
52*4882a593Smuzhiyun int status;
53*4882a593Smuzhiyun int handled = 0;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun status = MGA_READ(MGA_STATUS);
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* VBLANK interrupt */
58*4882a593Smuzhiyun if (status & MGA_VLINEPEN) {
59*4882a593Smuzhiyun MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
60*4882a593Smuzhiyun atomic_inc(&dev_priv->vbl_received);
61*4882a593Smuzhiyun drm_handle_vblank(dev, 0);
62*4882a593Smuzhiyun handled = 1;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /* SOFTRAP interrupt */
66*4882a593Smuzhiyun if (status & MGA_SOFTRAPEN) {
67*4882a593Smuzhiyun const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
68*4882a593Smuzhiyun const u32 prim_end = MGA_READ(MGA_PRIMEND);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /* In addition to clearing the interrupt-pending bit, we
74*4882a593Smuzhiyun * have to write to MGA_PRIMEND to re-start the DMA operation.
75*4882a593Smuzhiyun */
76*4882a593Smuzhiyun if ((prim_start & ~0x03) != (prim_end & ~0x03))
77*4882a593Smuzhiyun MGA_WRITE(MGA_PRIMEND, prim_end);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun atomic_inc(&dev_priv->last_fence_retired);
80*4882a593Smuzhiyun wake_up(&dev_priv->fence_queue);
81*4882a593Smuzhiyun handled = 1;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun if (handled)
85*4882a593Smuzhiyun return IRQ_HANDLED;
86*4882a593Smuzhiyun return IRQ_NONE;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
mga_enable_vblank(struct drm_device * dev,unsigned int pipe)89*4882a593Smuzhiyun int mga_enable_vblank(struct drm_device *dev, unsigned int pipe)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun if (pipe != 0) {
94*4882a593Smuzhiyun DRM_ERROR("tried to enable vblank on non-existent crtc %u\n",
95*4882a593Smuzhiyun pipe);
96*4882a593Smuzhiyun return 0;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
100*4882a593Smuzhiyun return 0;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun
mga_disable_vblank(struct drm_device * dev,unsigned int pipe)104*4882a593Smuzhiyun void mga_disable_vblank(struct drm_device *dev, unsigned int pipe)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun if (pipe != 0) {
107*4882a593Smuzhiyun DRM_ERROR("tried to disable vblank on non-existent crtc %u\n",
108*4882a593Smuzhiyun pipe);
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have
112*4882a593Smuzhiyun * a nice hardware counter that tracks the number of refreshes when
113*4882a593Smuzhiyun * the interrupt is disabled, and the kernel doesn't know the refresh
114*4882a593Smuzhiyun * rate to calculate an estimate.
115*4882a593Smuzhiyun */
116*4882a593Smuzhiyun /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
mga_driver_fence_wait(struct drm_device * dev,unsigned int * sequence)119*4882a593Smuzhiyun void mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
122*4882a593Smuzhiyun unsigned int cur_fence;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* Assume that the user has missed the current sequence number
125*4882a593Smuzhiyun * by about a day rather than she wants to wait for years
126*4882a593Smuzhiyun * using fences.
127*4882a593Smuzhiyun */
128*4882a593Smuzhiyun wait_event_timeout(dev_priv->fence_queue,
129*4882a593Smuzhiyun (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
130*4882a593Smuzhiyun - *sequence) <= (1 << 23)),
131*4882a593Smuzhiyun msecs_to_jiffies(3000));
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun *sequence = cur_fence;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
mga_driver_irq_preinstall(struct drm_device * dev)136*4882a593Smuzhiyun void mga_driver_irq_preinstall(struct drm_device *dev)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* Disable *all* interrupts */
141*4882a593Smuzhiyun MGA_WRITE(MGA_IEN, 0);
142*4882a593Smuzhiyun /* Clear bits if they're already high */
143*4882a593Smuzhiyun MGA_WRITE(MGA_ICLEAR, ~0);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
mga_driver_irq_postinstall(struct drm_device * dev)146*4882a593Smuzhiyun int mga_driver_irq_postinstall(struct drm_device *dev)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun init_waitqueue_head(&dev_priv->fence_queue);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* Turn on soft trap interrupt. Vertical blank interrupts are enabled
153*4882a593Smuzhiyun * in mga_enable_vblank.
154*4882a593Smuzhiyun */
155*4882a593Smuzhiyun MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
156*4882a593Smuzhiyun return 0;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
mga_driver_irq_uninstall(struct drm_device * dev)159*4882a593Smuzhiyun void mga_driver_irq_uninstall(struct drm_device *dev)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
162*4882a593Smuzhiyun if (!dev_priv)
163*4882a593Smuzhiyun return;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /* Disable *all* interrupts */
166*4882a593Smuzhiyun MGA_WRITE(MGA_IEN, 0);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun dev->irq_enabled = false;
169*4882a593Smuzhiyun }
170