xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/mediatek/mtk_drm_plane.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2015 MediaTek Inc.
4*4882a593Smuzhiyun  * Author: CK Hu <ck.hu@mediatek.com>
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <drm/drm_atomic.h>
8*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
9*4882a593Smuzhiyun #include <drm/drm_fourcc.h>
10*4882a593Smuzhiyun #include <drm/drm_atomic_uapi.h>
11*4882a593Smuzhiyun #include <drm/drm_plane_helper.h>
12*4882a593Smuzhiyun #include <drm/drm_gem_framebuffer_helper.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include "mtk_drm_crtc.h"
15*4882a593Smuzhiyun #include "mtk_drm_ddp_comp.h"
16*4882a593Smuzhiyun #include "mtk_drm_drv.h"
17*4882a593Smuzhiyun #include "mtk_drm_gem.h"
18*4882a593Smuzhiyun #include "mtk_drm_plane.h"
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun static const u32 formats[] = {
21*4882a593Smuzhiyun 	DRM_FORMAT_XRGB8888,
22*4882a593Smuzhiyun 	DRM_FORMAT_ARGB8888,
23*4882a593Smuzhiyun 	DRM_FORMAT_BGRX8888,
24*4882a593Smuzhiyun 	DRM_FORMAT_BGRA8888,
25*4882a593Smuzhiyun 	DRM_FORMAT_ABGR8888,
26*4882a593Smuzhiyun 	DRM_FORMAT_XBGR8888,
27*4882a593Smuzhiyun 	DRM_FORMAT_RGB888,
28*4882a593Smuzhiyun 	DRM_FORMAT_BGR888,
29*4882a593Smuzhiyun 	DRM_FORMAT_RGB565,
30*4882a593Smuzhiyun 	DRM_FORMAT_UYVY,
31*4882a593Smuzhiyun 	DRM_FORMAT_YUYV,
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun 
mtk_plane_reset(struct drm_plane * plane)34*4882a593Smuzhiyun static void mtk_plane_reset(struct drm_plane *plane)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	struct mtk_plane_state *state;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	if (plane->state) {
39*4882a593Smuzhiyun 		__drm_atomic_helper_plane_destroy_state(plane->state);
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 		state = to_mtk_plane_state(plane->state);
42*4882a593Smuzhiyun 		memset(state, 0, sizeof(*state));
43*4882a593Smuzhiyun 	} else {
44*4882a593Smuzhiyun 		state = kzalloc(sizeof(*state), GFP_KERNEL);
45*4882a593Smuzhiyun 		if (!state)
46*4882a593Smuzhiyun 			return;
47*4882a593Smuzhiyun 		plane->state = &state->base;
48*4882a593Smuzhiyun 	}
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	state->base.plane = plane;
51*4882a593Smuzhiyun 	state->pending.format = DRM_FORMAT_RGB565;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
mtk_plane_duplicate_state(struct drm_plane * plane)54*4882a593Smuzhiyun static struct drm_plane_state *mtk_plane_duplicate_state(struct drm_plane *plane)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	struct mtk_plane_state *old_state = to_mtk_plane_state(plane->state);
57*4882a593Smuzhiyun 	struct mtk_plane_state *state;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	state = kzalloc(sizeof(*state), GFP_KERNEL);
60*4882a593Smuzhiyun 	if (!state)
61*4882a593Smuzhiyun 		return NULL;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	__drm_atomic_helper_plane_duplicate_state(plane, &state->base);
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	WARN_ON(state->base.plane != plane);
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	state->pending = old_state->pending;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	return &state->base;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun 
mtk_drm_plane_destroy_state(struct drm_plane * plane,struct drm_plane_state * state)72*4882a593Smuzhiyun static void mtk_drm_plane_destroy_state(struct drm_plane *plane,
73*4882a593Smuzhiyun 					struct drm_plane_state *state)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	__drm_atomic_helper_plane_destroy_state(state);
76*4882a593Smuzhiyun 	kfree(to_mtk_plane_state(state));
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
mtk_plane_atomic_async_check(struct drm_plane * plane,struct drm_plane_state * state)79*4882a593Smuzhiyun static int mtk_plane_atomic_async_check(struct drm_plane *plane,
80*4882a593Smuzhiyun 					struct drm_plane_state *state)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	struct drm_crtc_state *crtc_state;
83*4882a593Smuzhiyun 	int ret;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	if (plane != state->crtc->cursor)
86*4882a593Smuzhiyun 		return -EINVAL;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	if (!plane->state)
89*4882a593Smuzhiyun 		return -EINVAL;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	if (!plane->state->fb)
92*4882a593Smuzhiyun 		return -EINVAL;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	ret = mtk_drm_crtc_plane_check(state->crtc, plane,
95*4882a593Smuzhiyun 				       to_mtk_plane_state(state));
96*4882a593Smuzhiyun 	if (ret)
97*4882a593Smuzhiyun 		return ret;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	if (state->state)
100*4882a593Smuzhiyun 		crtc_state = drm_atomic_get_existing_crtc_state(state->state,
101*4882a593Smuzhiyun 								state->crtc);
102*4882a593Smuzhiyun 	else /* Special case for asynchronous cursor updates. */
103*4882a593Smuzhiyun 		crtc_state = state->crtc->state;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	return drm_atomic_helper_check_plane_state(plane->state, crtc_state,
106*4882a593Smuzhiyun 						   DRM_PLANE_HELPER_NO_SCALING,
107*4882a593Smuzhiyun 						   DRM_PLANE_HELPER_NO_SCALING,
108*4882a593Smuzhiyun 						   true, true);
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun 
mtk_plane_atomic_async_update(struct drm_plane * plane,struct drm_plane_state * new_state)111*4882a593Smuzhiyun static void mtk_plane_atomic_async_update(struct drm_plane *plane,
112*4882a593Smuzhiyun 					  struct drm_plane_state *new_state)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	struct mtk_plane_state *state = to_mtk_plane_state(plane->state);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	plane->state->crtc_x = new_state->crtc_x;
117*4882a593Smuzhiyun 	plane->state->crtc_y = new_state->crtc_y;
118*4882a593Smuzhiyun 	plane->state->crtc_h = new_state->crtc_h;
119*4882a593Smuzhiyun 	plane->state->crtc_w = new_state->crtc_w;
120*4882a593Smuzhiyun 	plane->state->src_x = new_state->src_x;
121*4882a593Smuzhiyun 	plane->state->src_y = new_state->src_y;
122*4882a593Smuzhiyun 	plane->state->src_h = new_state->src_h;
123*4882a593Smuzhiyun 	plane->state->src_w = new_state->src_w;
124*4882a593Smuzhiyun 	swap(plane->state->fb, new_state->fb);
125*4882a593Smuzhiyun 	state->pending.async_dirty = true;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	mtk_drm_crtc_async_update(new_state->crtc, plane, new_state);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun static const struct drm_plane_funcs mtk_plane_funcs = {
131*4882a593Smuzhiyun 	.update_plane = drm_atomic_helper_update_plane,
132*4882a593Smuzhiyun 	.disable_plane = drm_atomic_helper_disable_plane,
133*4882a593Smuzhiyun 	.destroy = drm_plane_cleanup,
134*4882a593Smuzhiyun 	.reset = mtk_plane_reset,
135*4882a593Smuzhiyun 	.atomic_duplicate_state = mtk_plane_duplicate_state,
136*4882a593Smuzhiyun 	.atomic_destroy_state = mtk_drm_plane_destroy_state,
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun 
mtk_plane_atomic_check(struct drm_plane * plane,struct drm_plane_state * state)139*4882a593Smuzhiyun static int mtk_plane_atomic_check(struct drm_plane *plane,
140*4882a593Smuzhiyun 				  struct drm_plane_state *state)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	struct drm_framebuffer *fb = state->fb;
143*4882a593Smuzhiyun 	struct drm_crtc_state *crtc_state;
144*4882a593Smuzhiyun 	int ret;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	if (!fb)
147*4882a593Smuzhiyun 		return 0;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	if (WARN_ON(!state->crtc))
150*4882a593Smuzhiyun 		return 0;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	ret = mtk_drm_crtc_plane_check(state->crtc, plane,
153*4882a593Smuzhiyun 				       to_mtk_plane_state(state));
154*4882a593Smuzhiyun 	if (ret)
155*4882a593Smuzhiyun 		return ret;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc);
158*4882a593Smuzhiyun 	if (IS_ERR(crtc_state))
159*4882a593Smuzhiyun 		return PTR_ERR(crtc_state);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	return drm_atomic_helper_check_plane_state(state, crtc_state,
162*4882a593Smuzhiyun 						   DRM_PLANE_HELPER_NO_SCALING,
163*4882a593Smuzhiyun 						   DRM_PLANE_HELPER_NO_SCALING,
164*4882a593Smuzhiyun 						   true, true);
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun 
mtk_plane_atomic_disable(struct drm_plane * plane,struct drm_plane_state * old_state)167*4882a593Smuzhiyun static void mtk_plane_atomic_disable(struct drm_plane *plane,
168*4882a593Smuzhiyun 				     struct drm_plane_state *old_state)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun 	struct mtk_plane_state *state = to_mtk_plane_state(plane->state);
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	state->pending.enable = false;
173*4882a593Smuzhiyun 	wmb(); /* Make sure the above parameter is set before update */
174*4882a593Smuzhiyun 	state->pending.dirty = true;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun 
mtk_plane_atomic_update(struct drm_plane * plane,struct drm_plane_state * old_state)177*4882a593Smuzhiyun static void mtk_plane_atomic_update(struct drm_plane *plane,
178*4882a593Smuzhiyun 				    struct drm_plane_state *old_state)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun 	struct mtk_plane_state *state = to_mtk_plane_state(plane->state);
181*4882a593Smuzhiyun 	struct drm_crtc *crtc = plane->state->crtc;
182*4882a593Smuzhiyun 	struct drm_framebuffer *fb = plane->state->fb;
183*4882a593Smuzhiyun 	struct drm_gem_object *gem;
184*4882a593Smuzhiyun 	struct mtk_drm_gem_obj *mtk_gem;
185*4882a593Smuzhiyun 	unsigned int pitch, format;
186*4882a593Smuzhiyun 	dma_addr_t addr;
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	if (!crtc || WARN_ON(!fb))
189*4882a593Smuzhiyun 		return;
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	if (!plane->state->visible) {
192*4882a593Smuzhiyun 		mtk_plane_atomic_disable(plane, old_state);
193*4882a593Smuzhiyun 		return;
194*4882a593Smuzhiyun 	}
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	gem = fb->obj[0];
197*4882a593Smuzhiyun 	mtk_gem = to_mtk_gem_obj(gem);
198*4882a593Smuzhiyun 	addr = mtk_gem->dma_addr;
199*4882a593Smuzhiyun 	pitch = fb->pitches[0];
200*4882a593Smuzhiyun 	format = fb->format->format;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	addr += (plane->state->src.x1 >> 16) * fb->format->cpp[0];
203*4882a593Smuzhiyun 	addr += (plane->state->src.y1 >> 16) * pitch;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	state->pending.enable = true;
206*4882a593Smuzhiyun 	state->pending.pitch = pitch;
207*4882a593Smuzhiyun 	state->pending.format = format;
208*4882a593Smuzhiyun 	state->pending.addr = addr;
209*4882a593Smuzhiyun 	state->pending.x = plane->state->dst.x1;
210*4882a593Smuzhiyun 	state->pending.y = plane->state->dst.y1;
211*4882a593Smuzhiyun 	state->pending.width = drm_rect_width(&plane->state->dst);
212*4882a593Smuzhiyun 	state->pending.height = drm_rect_height(&plane->state->dst);
213*4882a593Smuzhiyun 	state->pending.rotation = plane->state->rotation;
214*4882a593Smuzhiyun 	wmb(); /* Make sure the above parameters are set before update */
215*4882a593Smuzhiyun 	state->pending.dirty = true;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun static const struct drm_plane_helper_funcs mtk_plane_helper_funcs = {
219*4882a593Smuzhiyun 	.prepare_fb = drm_gem_fb_prepare_fb,
220*4882a593Smuzhiyun 	.atomic_check = mtk_plane_atomic_check,
221*4882a593Smuzhiyun 	.atomic_update = mtk_plane_atomic_update,
222*4882a593Smuzhiyun 	.atomic_disable = mtk_plane_atomic_disable,
223*4882a593Smuzhiyun 	.atomic_async_update = mtk_plane_atomic_async_update,
224*4882a593Smuzhiyun 	.atomic_async_check = mtk_plane_atomic_async_check,
225*4882a593Smuzhiyun };
226*4882a593Smuzhiyun 
mtk_plane_init(struct drm_device * dev,struct drm_plane * plane,unsigned long possible_crtcs,enum drm_plane_type type,unsigned int supported_rotations)227*4882a593Smuzhiyun int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane,
228*4882a593Smuzhiyun 		   unsigned long possible_crtcs, enum drm_plane_type type,
229*4882a593Smuzhiyun 		   unsigned int supported_rotations)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun 	int err;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	err = drm_universal_plane_init(dev, plane, possible_crtcs,
234*4882a593Smuzhiyun 				       &mtk_plane_funcs, formats,
235*4882a593Smuzhiyun 				       ARRAY_SIZE(formats), NULL, type, NULL);
236*4882a593Smuzhiyun 	if (err) {
237*4882a593Smuzhiyun 		DRM_ERROR("failed to initialize plane\n");
238*4882a593Smuzhiyun 		return err;
239*4882a593Smuzhiyun 	}
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	if (supported_rotations & ~DRM_MODE_ROTATE_0) {
242*4882a593Smuzhiyun 		err = drm_plane_create_rotation_property(plane,
243*4882a593Smuzhiyun 							 DRM_MODE_ROTATE_0,
244*4882a593Smuzhiyun 							 supported_rotations);
245*4882a593Smuzhiyun 		if (err)
246*4882a593Smuzhiyun 			DRM_INFO("Create rotation property failed\n");
247*4882a593Smuzhiyun 	}
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	drm_plane_helper_add(plane, &mtk_plane_helper_funcs);
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	return 0;
252*4882a593Smuzhiyun }
253