xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/mediatek/mtk_drm_drv.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2015 MediaTek Inc.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #ifndef MTK_DRM_DRV_H
7*4882a593Smuzhiyun #define MTK_DRM_DRV_H
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/io.h>
10*4882a593Smuzhiyun #include "mtk_drm_ddp_comp.h"
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #define MAX_CRTC	3
13*4882a593Smuzhiyun #define MAX_CONNECTOR	2
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun struct device;
16*4882a593Smuzhiyun struct device_node;
17*4882a593Smuzhiyun struct drm_crtc;
18*4882a593Smuzhiyun struct drm_device;
19*4882a593Smuzhiyun struct drm_fb_helper;
20*4882a593Smuzhiyun struct drm_property;
21*4882a593Smuzhiyun struct regmap;
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun struct mtk_mmsys_driver_data {
24*4882a593Smuzhiyun 	const enum mtk_ddp_comp_id *main_path;
25*4882a593Smuzhiyun 	unsigned int main_len;
26*4882a593Smuzhiyun 	const enum mtk_ddp_comp_id *ext_path;
27*4882a593Smuzhiyun 	unsigned int ext_len;
28*4882a593Smuzhiyun 	const enum mtk_ddp_comp_id *third_path;
29*4882a593Smuzhiyun 	unsigned int third_len;
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 	bool shadow_register;
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun struct mtk_drm_private {
35*4882a593Smuzhiyun 	struct drm_device *drm;
36*4882a593Smuzhiyun 	struct device *dma_dev;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	unsigned int num_pipes;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	struct device_node *mutex_node;
41*4882a593Smuzhiyun 	struct device *mutex_dev;
42*4882a593Smuzhiyun 	struct device *mmsys_dev;
43*4882a593Smuzhiyun 	struct device_node *comp_node[DDP_COMPONENT_ID_MAX];
44*4882a593Smuzhiyun 	struct mtk_ddp_comp *ddp_comp[DDP_COMPONENT_ID_MAX];
45*4882a593Smuzhiyun 	const struct mtk_mmsys_driver_data *data;
46*4882a593Smuzhiyun 	struct drm_atomic_state *suspend_state;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	bool dma_parms_allocated;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun extern struct platform_driver mtk_ddp_driver;
52*4882a593Smuzhiyun extern struct platform_driver mtk_disp_color_driver;
53*4882a593Smuzhiyun extern struct platform_driver mtk_disp_ovl_driver;
54*4882a593Smuzhiyun extern struct platform_driver mtk_disp_rdma_driver;
55*4882a593Smuzhiyun extern struct platform_driver mtk_dpi_driver;
56*4882a593Smuzhiyun extern struct platform_driver mtk_dsi_driver;
57*4882a593Smuzhiyun extern struct platform_driver mtk_mipi_tx_driver;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #endif /* MTK_DRM_DRV_H */
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