1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2015 MediaTek Inc. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef MTK_DRM_CRTC_H 7*4882a593Smuzhiyun #define MTK_DRM_CRTC_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <drm/drm_crtc.h> 10*4882a593Smuzhiyun #include "mtk_drm_ddp_comp.h" 11*4882a593Smuzhiyun #include "mtk_drm_plane.h" 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define MTK_LUT_SIZE 512 14*4882a593Smuzhiyun #define MTK_MAX_BPC 10 15*4882a593Smuzhiyun #define MTK_MIN_BPC 3 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun void mtk_drm_crtc_commit(struct drm_crtc *crtc); 18*4882a593Smuzhiyun void mtk_crtc_ddp_irq(struct drm_crtc *crtc, struct mtk_ddp_comp *comp); 19*4882a593Smuzhiyun int mtk_drm_crtc_create(struct drm_device *drm_dev, 20*4882a593Smuzhiyun const enum mtk_ddp_comp_id *path, 21*4882a593Smuzhiyun unsigned int path_len); 22*4882a593Smuzhiyun int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane, 23*4882a593Smuzhiyun struct mtk_plane_state *state); 24*4882a593Smuzhiyun void mtk_drm_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane, 25*4882a593Smuzhiyun struct drm_plane_state *plane_state); 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #endif /* MTK_DRM_CRTC_H */ 28