xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/imx/dcss/dcss-kms.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright 2019 NXP.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <drm/drm_atomic.h>
7*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
8*4882a593Smuzhiyun #include <drm/drm_bridge_connector.h>
9*4882a593Smuzhiyun #include <drm/drm_drv.h>
10*4882a593Smuzhiyun #include <drm/drm_fb_helper.h>
11*4882a593Smuzhiyun #include <drm/drm_gem_cma_helper.h>
12*4882a593Smuzhiyun #include <drm/drm_gem_framebuffer_helper.h>
13*4882a593Smuzhiyun #include <drm/drm_of.h>
14*4882a593Smuzhiyun #include <drm/drm_probe_helper.h>
15*4882a593Smuzhiyun #include <drm/drm_vblank.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include "dcss-dev.h"
18*4882a593Smuzhiyun #include "dcss-kms.h"
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun DEFINE_DRM_GEM_CMA_FOPS(dcss_cma_fops);
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun static const struct drm_mode_config_funcs dcss_drm_mode_config_funcs = {
23*4882a593Smuzhiyun 	.fb_create = drm_gem_fb_create,
24*4882a593Smuzhiyun 	.output_poll_changed = drm_fb_helper_output_poll_changed,
25*4882a593Smuzhiyun 	.atomic_check = drm_atomic_helper_check,
26*4882a593Smuzhiyun 	.atomic_commit = drm_atomic_helper_commit,
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun static struct drm_driver dcss_kms_driver = {
30*4882a593Smuzhiyun 	.driver_features	= DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
31*4882a593Smuzhiyun 	.gem_free_object_unlocked = drm_gem_cma_free_object,
32*4882a593Smuzhiyun 	.gem_vm_ops		= &drm_gem_cma_vm_ops,
33*4882a593Smuzhiyun 	.dumb_create		= drm_gem_cma_dumb_create,
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
36*4882a593Smuzhiyun 	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
37*4882a593Smuzhiyun 	.gem_prime_import	= drm_gem_prime_import,
38*4882a593Smuzhiyun 	.gem_prime_export	= drm_gem_prime_export,
39*4882a593Smuzhiyun 	.gem_prime_get_sg_table	= drm_gem_cma_prime_get_sg_table,
40*4882a593Smuzhiyun 	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
41*4882a593Smuzhiyun 	.gem_prime_vmap		= drm_gem_cma_prime_vmap,
42*4882a593Smuzhiyun 	.gem_prime_vunmap	= drm_gem_cma_prime_vunmap,
43*4882a593Smuzhiyun 	.gem_prime_mmap		= drm_gem_cma_prime_mmap,
44*4882a593Smuzhiyun 	.fops			= &dcss_cma_fops,
45*4882a593Smuzhiyun 	.name			= "imx-dcss",
46*4882a593Smuzhiyun 	.desc			= "i.MX8MQ Display Subsystem",
47*4882a593Smuzhiyun 	.date			= "20190917",
48*4882a593Smuzhiyun 	.major			= 1,
49*4882a593Smuzhiyun 	.minor			= 0,
50*4882a593Smuzhiyun 	.patchlevel		= 0,
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun static const struct drm_mode_config_helper_funcs dcss_mode_config_helpers = {
54*4882a593Smuzhiyun 	.atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun 
dcss_kms_mode_config_init(struct dcss_kms_dev * kms)57*4882a593Smuzhiyun static void dcss_kms_mode_config_init(struct dcss_kms_dev *kms)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	struct drm_mode_config *config = &kms->base.mode_config;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	drm_mode_config_init(&kms->base);
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	config->min_width = 1;
64*4882a593Smuzhiyun 	config->min_height = 1;
65*4882a593Smuzhiyun 	config->max_width = 4096;
66*4882a593Smuzhiyun 	config->max_height = 4096;
67*4882a593Smuzhiyun 	config->allow_fb_modifiers = true;
68*4882a593Smuzhiyun 	config->normalize_zpos = true;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	config->funcs = &dcss_drm_mode_config_funcs;
71*4882a593Smuzhiyun 	config->helper_private = &dcss_mode_config_helpers;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun static const struct drm_encoder_funcs dcss_kms_simple_encoder_funcs = {
75*4882a593Smuzhiyun 	.destroy = drm_encoder_cleanup,
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun 
dcss_kms_bridge_connector_init(struct dcss_kms_dev * kms)78*4882a593Smuzhiyun static int dcss_kms_bridge_connector_init(struct dcss_kms_dev *kms)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	struct drm_device *ddev = &kms->base;
81*4882a593Smuzhiyun 	struct drm_encoder *encoder = &kms->encoder;
82*4882a593Smuzhiyun 	struct drm_crtc *crtc = (struct drm_crtc *)&kms->crtc;
83*4882a593Smuzhiyun 	struct drm_panel *panel;
84*4882a593Smuzhiyun 	struct drm_bridge *bridge;
85*4882a593Smuzhiyun 	int ret;
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	ret = drm_of_find_panel_or_bridge(ddev->dev->of_node, 0, 0,
88*4882a593Smuzhiyun 					  &panel, &bridge);
89*4882a593Smuzhiyun 	if (ret)
90*4882a593Smuzhiyun 		return ret;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	if (!bridge) {
93*4882a593Smuzhiyun 		dev_err(ddev->dev, "No bridge found %d.\n", ret);
94*4882a593Smuzhiyun 		return -ENODEV;
95*4882a593Smuzhiyun 	}
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	encoder->possible_crtcs = drm_crtc_mask(crtc);
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	ret = drm_encoder_init(&kms->base, encoder,
100*4882a593Smuzhiyun 			       &dcss_kms_simple_encoder_funcs,
101*4882a593Smuzhiyun 			       DRM_MODE_ENCODER_NONE, NULL);
102*4882a593Smuzhiyun 	if (ret) {
103*4882a593Smuzhiyun 		dev_err(ddev->dev, "Failed initializing encoder %d.\n", ret);
104*4882a593Smuzhiyun 		return ret;
105*4882a593Smuzhiyun 	}
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	ret = drm_bridge_attach(encoder, bridge, NULL,
108*4882a593Smuzhiyun 				DRM_BRIDGE_ATTACH_NO_CONNECTOR);
109*4882a593Smuzhiyun 	if (ret < 0) {
110*4882a593Smuzhiyun 		dev_err(ddev->dev, "Unable to attach bridge %pOF\n",
111*4882a593Smuzhiyun 			bridge->of_node);
112*4882a593Smuzhiyun 		return ret;
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	kms->connector = drm_bridge_connector_init(ddev, encoder);
116*4882a593Smuzhiyun 	if (IS_ERR(kms->connector)) {
117*4882a593Smuzhiyun 		dev_err(ddev->dev, "Unable to create bridge connector.\n");
118*4882a593Smuzhiyun 		return PTR_ERR(kms->connector);
119*4882a593Smuzhiyun 	}
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	drm_connector_attach_encoder(kms->connector, encoder);
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	return 0;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun 
dcss_kms_attach(struct dcss_dev * dcss)126*4882a593Smuzhiyun struct dcss_kms_dev *dcss_kms_attach(struct dcss_dev *dcss)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	struct dcss_kms_dev *kms;
129*4882a593Smuzhiyun 	struct drm_device *drm;
130*4882a593Smuzhiyun 	struct dcss_crtc *crtc;
131*4882a593Smuzhiyun 	int ret;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	kms = devm_drm_dev_alloc(dcss->dev, &dcss_kms_driver,
134*4882a593Smuzhiyun 				 struct dcss_kms_dev, base);
135*4882a593Smuzhiyun 	if (IS_ERR(kms))
136*4882a593Smuzhiyun 		return kms;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	drm = &kms->base;
139*4882a593Smuzhiyun 	crtc = &kms->crtc;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	drm->dev_private = dcss;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	dcss_kms_mode_config_init(kms);
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	ret = drm_vblank_init(drm, 1);
146*4882a593Smuzhiyun 	if (ret)
147*4882a593Smuzhiyun 		goto cleanup_mode_config;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	drm->irq_enabled = true;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	ret = dcss_kms_bridge_connector_init(kms);
152*4882a593Smuzhiyun 	if (ret)
153*4882a593Smuzhiyun 		goto cleanup_mode_config;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	ret = dcss_crtc_init(crtc, drm);
156*4882a593Smuzhiyun 	if (ret)
157*4882a593Smuzhiyun 		goto cleanup_mode_config;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	drm_mode_config_reset(drm);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	drm_kms_helper_poll_init(drm);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	drm_bridge_connector_enable_hpd(kms->connector);
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	ret = drm_dev_register(drm, 0);
166*4882a593Smuzhiyun 	if (ret)
167*4882a593Smuzhiyun 		goto cleanup_crtc;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	drm_fbdev_generic_setup(drm, 32);
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	return kms;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun cleanup_crtc:
174*4882a593Smuzhiyun 	drm_bridge_connector_disable_hpd(kms->connector);
175*4882a593Smuzhiyun 	drm_kms_helper_poll_fini(drm);
176*4882a593Smuzhiyun 	dcss_crtc_deinit(crtc, drm);
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun cleanup_mode_config:
179*4882a593Smuzhiyun 	drm_mode_config_cleanup(drm);
180*4882a593Smuzhiyun 	drm->dev_private = NULL;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	return ERR_PTR(ret);
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun 
dcss_kms_detach(struct dcss_kms_dev * kms)185*4882a593Smuzhiyun void dcss_kms_detach(struct dcss_kms_dev *kms)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun 	struct drm_device *drm = &kms->base;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	drm_dev_unregister(drm);
190*4882a593Smuzhiyun 	drm_bridge_connector_disable_hpd(kms->connector);
191*4882a593Smuzhiyun 	drm_kms_helper_poll_fini(drm);
192*4882a593Smuzhiyun 	drm_atomic_helper_shutdown(drm);
193*4882a593Smuzhiyun 	drm_crtc_vblank_off(&kms->crtc.base);
194*4882a593Smuzhiyun 	drm->irq_enabled = false;
195*4882a593Smuzhiyun 	drm_mode_config_cleanup(drm);
196*4882a593Smuzhiyun 	dcss_crtc_deinit(&kms->crtc, drm);
197*4882a593Smuzhiyun 	drm->dev_private = NULL;
198*4882a593Smuzhiyun }
199