1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2019 NXP.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
7*4882a593Smuzhiyun #include <drm/drm_vblank.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <linux/pm_runtime.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "dcss-dev.h"
12*4882a593Smuzhiyun #include "dcss-kms.h"
13*4882a593Smuzhiyun
dcss_enable_vblank(struct drm_crtc * crtc)14*4882a593Smuzhiyun static int dcss_enable_vblank(struct drm_crtc *crtc)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,
17*4882a593Smuzhiyun base);
18*4882a593Smuzhiyun struct dcss_dev *dcss = crtc->dev->dev_private;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun dcss_dtg_vblank_irq_enable(dcss->dtg, true);
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun dcss_dtg_ctxld_kick_irq_enable(dcss->dtg, true);
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun enable_irq(dcss_crtc->irq);
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun return 0;
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
dcss_disable_vblank(struct drm_crtc * crtc)29*4882a593Smuzhiyun static void dcss_disable_vblank(struct drm_crtc *crtc)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,
32*4882a593Smuzhiyun base);
33*4882a593Smuzhiyun struct dcss_dev *dcss = dcss_crtc->base.dev->dev_private;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun disable_irq_nosync(dcss_crtc->irq);
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun dcss_dtg_vblank_irq_enable(dcss->dtg, false);
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun if (dcss_crtc->disable_ctxld_kick_irq)
40*4882a593Smuzhiyun dcss_dtg_ctxld_kick_irq_enable(dcss->dtg, false);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static const struct drm_crtc_funcs dcss_crtc_funcs = {
44*4882a593Smuzhiyun .set_config = drm_atomic_helper_set_config,
45*4882a593Smuzhiyun .destroy = drm_crtc_cleanup,
46*4882a593Smuzhiyun .page_flip = drm_atomic_helper_page_flip,
47*4882a593Smuzhiyun .reset = drm_atomic_helper_crtc_reset,
48*4882a593Smuzhiyun .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
49*4882a593Smuzhiyun .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
50*4882a593Smuzhiyun .enable_vblank = dcss_enable_vblank,
51*4882a593Smuzhiyun .disable_vblank = dcss_disable_vblank,
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun
dcss_crtc_atomic_begin(struct drm_crtc * crtc,struct drm_crtc_state * old_crtc_state)54*4882a593Smuzhiyun static void dcss_crtc_atomic_begin(struct drm_crtc *crtc,
55*4882a593Smuzhiyun struct drm_crtc_state *old_crtc_state)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun drm_crtc_vblank_on(crtc);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
dcss_crtc_atomic_flush(struct drm_crtc * crtc,struct drm_crtc_state * old_crtc_state)60*4882a593Smuzhiyun static void dcss_crtc_atomic_flush(struct drm_crtc *crtc,
61*4882a593Smuzhiyun struct drm_crtc_state *old_crtc_state)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,
64*4882a593Smuzhiyun base);
65*4882a593Smuzhiyun struct dcss_dev *dcss = dcss_crtc->base.dev->dev_private;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun spin_lock_irq(&crtc->dev->event_lock);
68*4882a593Smuzhiyun if (crtc->state->event) {
69*4882a593Smuzhiyun WARN_ON(drm_crtc_vblank_get(crtc));
70*4882a593Smuzhiyun drm_crtc_arm_vblank_event(crtc, crtc->state->event);
71*4882a593Smuzhiyun crtc->state->event = NULL;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun spin_unlock_irq(&crtc->dev->event_lock);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun if (dcss_dtg_is_enabled(dcss->dtg))
76*4882a593Smuzhiyun dcss_ctxld_enable(dcss->ctxld);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
dcss_crtc_atomic_enable(struct drm_crtc * crtc,struct drm_crtc_state * old_crtc_state)79*4882a593Smuzhiyun static void dcss_crtc_atomic_enable(struct drm_crtc *crtc,
80*4882a593Smuzhiyun struct drm_crtc_state *old_crtc_state)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,
83*4882a593Smuzhiyun base);
84*4882a593Smuzhiyun struct dcss_dev *dcss = dcss_crtc->base.dev->dev_private;
85*4882a593Smuzhiyun struct drm_display_mode *mode = &crtc->state->adjusted_mode;
86*4882a593Smuzhiyun struct drm_display_mode *old_mode = &old_crtc_state->adjusted_mode;
87*4882a593Smuzhiyun struct videomode vm;
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun drm_display_mode_to_videomode(mode, &vm);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun pm_runtime_get_sync(dcss->dev);
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun vm.pixelclock = mode->crtc_clock * 1000;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun dcss_ss_subsam_set(dcss->ss);
96*4882a593Smuzhiyun dcss_dtg_css_set(dcss->dtg);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (!drm_mode_equal(mode, old_mode) || !old_crtc_state->active) {
99*4882a593Smuzhiyun dcss_dtg_sync_set(dcss->dtg, &vm);
100*4882a593Smuzhiyun dcss_ss_sync_set(dcss->ss, &vm,
101*4882a593Smuzhiyun mode->flags & DRM_MODE_FLAG_PHSYNC,
102*4882a593Smuzhiyun mode->flags & DRM_MODE_FLAG_PVSYNC);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun dcss_enable_dtg_and_ss(dcss);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun dcss_ctxld_enable(dcss->ctxld);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun /* Allow CTXLD kick interrupt to be disabled when VBLANK is disabled. */
110*4882a593Smuzhiyun dcss_crtc->disable_ctxld_kick_irq = true;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
dcss_crtc_atomic_disable(struct drm_crtc * crtc,struct drm_crtc_state * old_crtc_state)113*4882a593Smuzhiyun static void dcss_crtc_atomic_disable(struct drm_crtc *crtc,
114*4882a593Smuzhiyun struct drm_crtc_state *old_crtc_state)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,
117*4882a593Smuzhiyun base);
118*4882a593Smuzhiyun struct dcss_dev *dcss = dcss_crtc->base.dev->dev_private;
119*4882a593Smuzhiyun struct drm_display_mode *mode = &crtc->state->adjusted_mode;
120*4882a593Smuzhiyun struct drm_display_mode *old_mode = &old_crtc_state->adjusted_mode;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun spin_lock_irq(&crtc->dev->event_lock);
125*4882a593Smuzhiyun if (crtc->state->event) {
126*4882a593Smuzhiyun drm_crtc_send_vblank_event(crtc, crtc->state->event);
127*4882a593Smuzhiyun crtc->state->event = NULL;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun spin_unlock_irq(&crtc->dev->event_lock);
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun dcss_dtg_ctxld_kick_irq_enable(dcss->dtg, true);
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun reinit_completion(&dcss->disable_completion);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun dcss_disable_dtg_and_ss(dcss);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun dcss_ctxld_enable(dcss->ctxld);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun if (!drm_mode_equal(mode, old_mode) || !crtc->state->active)
140*4882a593Smuzhiyun if (!wait_for_completion_timeout(&dcss->disable_completion,
141*4882a593Smuzhiyun msecs_to_jiffies(100)))
142*4882a593Smuzhiyun dev_err(dcss->dev, "Shutting off DTG timed out.\n");
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /*
145*4882a593Smuzhiyun * Do not shut off CTXLD kick interrupt when shutting VBLANK off. It
146*4882a593Smuzhiyun * will be needed to commit the last changes, before going to suspend.
147*4882a593Smuzhiyun */
148*4882a593Smuzhiyun dcss_crtc->disable_ctxld_kick_irq = false;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun drm_crtc_vblank_off(crtc);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun pm_runtime_mark_last_busy(dcss->dev);
153*4882a593Smuzhiyun pm_runtime_put_autosuspend(dcss->dev);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun static const struct drm_crtc_helper_funcs dcss_helper_funcs = {
157*4882a593Smuzhiyun .atomic_begin = dcss_crtc_atomic_begin,
158*4882a593Smuzhiyun .atomic_flush = dcss_crtc_atomic_flush,
159*4882a593Smuzhiyun .atomic_enable = dcss_crtc_atomic_enable,
160*4882a593Smuzhiyun .atomic_disable = dcss_crtc_atomic_disable,
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun
dcss_crtc_irq_handler(int irq,void * dev_id)163*4882a593Smuzhiyun static irqreturn_t dcss_crtc_irq_handler(int irq, void *dev_id)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun struct dcss_crtc *dcss_crtc = dev_id;
166*4882a593Smuzhiyun struct dcss_dev *dcss = dcss_crtc->base.dev->dev_private;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (!dcss_dtg_vblank_irq_valid(dcss->dtg))
169*4882a593Smuzhiyun return IRQ_NONE;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun if (dcss_ctxld_is_flushed(dcss->ctxld))
172*4882a593Smuzhiyun drm_crtc_handle_vblank(&dcss_crtc->base);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun dcss_dtg_vblank_irq_clear(dcss->dtg);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun return IRQ_HANDLED;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
dcss_crtc_init(struct dcss_crtc * crtc,struct drm_device * drm)179*4882a593Smuzhiyun int dcss_crtc_init(struct dcss_crtc *crtc, struct drm_device *drm)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun struct dcss_dev *dcss = drm->dev_private;
182*4882a593Smuzhiyun struct platform_device *pdev = to_platform_device(dcss->dev);
183*4882a593Smuzhiyun int ret;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun crtc->plane[0] = dcss_plane_init(drm, drm_crtc_mask(&crtc->base),
186*4882a593Smuzhiyun DRM_PLANE_TYPE_PRIMARY, 0);
187*4882a593Smuzhiyun if (IS_ERR(crtc->plane[0]))
188*4882a593Smuzhiyun return PTR_ERR(crtc->plane[0]);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun crtc->base.port = dcss->of_port;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun drm_crtc_helper_add(&crtc->base, &dcss_helper_funcs);
193*4882a593Smuzhiyun ret = drm_crtc_init_with_planes(drm, &crtc->base, &crtc->plane[0]->base,
194*4882a593Smuzhiyun NULL, &dcss_crtc_funcs, NULL);
195*4882a593Smuzhiyun if (ret) {
196*4882a593Smuzhiyun dev_err(dcss->dev, "failed to init crtc\n");
197*4882a593Smuzhiyun return ret;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun crtc->irq = platform_get_irq_byname(pdev, "vblank");
201*4882a593Smuzhiyun if (crtc->irq < 0)
202*4882a593Smuzhiyun return crtc->irq;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun ret = request_irq(crtc->irq, dcss_crtc_irq_handler,
205*4882a593Smuzhiyun 0, "dcss_drm", crtc);
206*4882a593Smuzhiyun if (ret) {
207*4882a593Smuzhiyun dev_err(dcss->dev, "irq request failed with %d.\n", ret);
208*4882a593Smuzhiyun return ret;
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun disable_irq(crtc->irq);
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun return 0;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
dcss_crtc_deinit(struct dcss_crtc * crtc,struct drm_device * drm)216*4882a593Smuzhiyun void dcss_crtc_deinit(struct dcss_crtc *crtc, struct drm_device *drm)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun free_irq(crtc->irq, crtc);
219*4882a593Smuzhiyun }
220