1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright © 2015 Intel Corporation 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a 5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"), 6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation 7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the 9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions: 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the next 12*4882a593Smuzhiyun * paragraph) shall be included in all copies or substantial portions of the 13*4882a593Smuzhiyun * Software. 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18*4882a593Smuzhiyun * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19*4882a593Smuzhiyun * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21*4882a593Smuzhiyun * IN THE SOFTWARE. 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #ifndef _I915_PARAMS_H_ 26*4882a593Smuzhiyun #define _I915_PARAMS_H_ 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #include <linux/bitops.h> 29*4882a593Smuzhiyun #include <linux/cache.h> /* for __read_mostly */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun struct drm_printer; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #define ENABLE_GUC_SUBMISSION BIT(0) 34*4882a593Smuzhiyun #define ENABLE_GUC_LOAD_HUC BIT(1) 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /* 37*4882a593Smuzhiyun * Invoke param, a function-like macro, for each i915 param, with arguments: 38*4882a593Smuzhiyun * 39*4882a593Smuzhiyun * param(type, name, value, mode) 40*4882a593Smuzhiyun * 41*4882a593Smuzhiyun * type: parameter type, one of {bool, int, unsigned int, unsigned long, char *} 42*4882a593Smuzhiyun * name: name of the parameter 43*4882a593Smuzhiyun * value: initial/default value of the parameter 44*4882a593Smuzhiyun * mode: debugfs file permissions, one of {0400, 0600, 0}, use 0 to not create 45*4882a593Smuzhiyun * debugfs file 46*4882a593Smuzhiyun */ 47*4882a593Smuzhiyun #define I915_PARAMS_FOR_EACH(param) \ 48*4882a593Smuzhiyun param(char *, vbt_firmware, NULL, 0400) \ 49*4882a593Smuzhiyun param(int, modeset, -1, 0400) \ 50*4882a593Smuzhiyun param(int, lvds_channel_mode, 0, 0400) \ 51*4882a593Smuzhiyun param(int, panel_use_ssc, -1, 0600) \ 52*4882a593Smuzhiyun param(int, vbt_sdvo_panel_type, -1, 0400) \ 53*4882a593Smuzhiyun param(int, enable_dc, -1, 0400) \ 54*4882a593Smuzhiyun param(int, enable_fbc, -1, 0600) \ 55*4882a593Smuzhiyun param(int, enable_psr, -1, 0600) \ 56*4882a593Smuzhiyun param(bool, psr_safest_params, false, 0600) \ 57*4882a593Smuzhiyun param(bool, enable_psr2_sel_fetch, false, 0600) \ 58*4882a593Smuzhiyun param(int, disable_power_well, -1, 0400) \ 59*4882a593Smuzhiyun param(int, enable_ips, 1, 0600) \ 60*4882a593Smuzhiyun param(int, invert_brightness, 0, 0600) \ 61*4882a593Smuzhiyun param(int, enable_guc, 0, 0400) \ 62*4882a593Smuzhiyun param(int, guc_log_level, -1, 0400) \ 63*4882a593Smuzhiyun param(char *, guc_firmware_path, NULL, 0400) \ 64*4882a593Smuzhiyun param(char *, huc_firmware_path, NULL, 0400) \ 65*4882a593Smuzhiyun param(char *, dmc_firmware_path, NULL, 0400) \ 66*4882a593Smuzhiyun param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \ 67*4882a593Smuzhiyun param(int, edp_vswing, 0, 0400) \ 68*4882a593Smuzhiyun param(unsigned int, reset, 3, 0600) \ 69*4882a593Smuzhiyun param(unsigned int, inject_probe_failure, 0, 0) \ 70*4882a593Smuzhiyun param(int, fastboot, -1, 0600) \ 71*4882a593Smuzhiyun param(int, enable_dpcd_backlight, -1, 0600) \ 72*4882a593Smuzhiyun param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE, 0400) \ 73*4882a593Smuzhiyun param(unsigned long, fake_lmem_start, 0, 0400) \ 74*4882a593Smuzhiyun /* leave bools at the end to not create holes */ \ 75*4882a593Smuzhiyun param(bool, enable_hangcheck, true, 0600) \ 76*4882a593Smuzhiyun param(bool, load_detect_test, false, 0600) \ 77*4882a593Smuzhiyun param(bool, force_reset_modeset_test, false, 0600) \ 78*4882a593Smuzhiyun param(bool, error_capture, true, 0600) \ 79*4882a593Smuzhiyun param(bool, disable_display, false, 0400) \ 80*4882a593Smuzhiyun param(bool, verbose_state_checks, true, 0) \ 81*4882a593Smuzhiyun param(bool, nuclear_pageflip, false, 0400) \ 82*4882a593Smuzhiyun param(bool, enable_dp_mst, true, 0600) \ 83*4882a593Smuzhiyun param(bool, enable_gvt, false, 0400) 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun #define MEMBER(T, member, ...) T member; 86*4882a593Smuzhiyun struct i915_params { 87*4882a593Smuzhiyun I915_PARAMS_FOR_EACH(MEMBER); 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun #undef MEMBER 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun extern struct i915_params i915_modparams __read_mostly; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun void i915_params_dump(const struct i915_params *params, struct drm_printer *p); 94*4882a593Smuzhiyun void i915_params_copy(struct i915_params *dest, const struct i915_params *src); 95*4882a593Smuzhiyun void i915_params_free(struct i915_params *params); 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun #endif 98*4882a593Smuzhiyun 99