1*4882a593Smuzhiyun /* SPDX-License-Identifier: MIT */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright © 2020 Intel Corporation 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __I915_GEM_GTT_H__ 7*4882a593Smuzhiyun #define __I915_GEM_GTT_H__ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/io-mapping.h> 10*4882a593Smuzhiyun #include <linux/types.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #include <drm/drm_mm.h> 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #include "gt/intel_gtt.h" 15*4882a593Smuzhiyun #include "i915_scatterlist.h" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun struct drm_i915_gem_object; 18*4882a593Smuzhiyun struct i915_address_space; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun int __must_check i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj, 21*4882a593Smuzhiyun struct sg_table *pages); 22*4882a593Smuzhiyun void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj, 23*4882a593Smuzhiyun struct sg_table *pages); 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun int i915_gem_gtt_reserve(struct i915_address_space *vm, 26*4882a593Smuzhiyun struct drm_mm_node *node, 27*4882a593Smuzhiyun u64 size, u64 offset, unsigned long color, 28*4882a593Smuzhiyun unsigned int flags); 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun int i915_gem_gtt_insert(struct i915_address_space *vm, 31*4882a593Smuzhiyun struct drm_mm_node *node, 32*4882a593Smuzhiyun u64 size, u64 alignment, unsigned long color, 33*4882a593Smuzhiyun u64 start, u64 end, unsigned int flags); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* Flags used by pin/bind&friends. */ 36*4882a593Smuzhiyun #define PIN_NOEVICT BIT_ULL(0) 37*4882a593Smuzhiyun #define PIN_NOSEARCH BIT_ULL(1) 38*4882a593Smuzhiyun #define PIN_NONBLOCK BIT_ULL(2) 39*4882a593Smuzhiyun #define PIN_MAPPABLE BIT_ULL(3) 40*4882a593Smuzhiyun #define PIN_ZONE_4G BIT_ULL(4) 41*4882a593Smuzhiyun #define PIN_HIGH BIT_ULL(5) 42*4882a593Smuzhiyun #define PIN_OFFSET_BIAS BIT_ULL(6) 43*4882a593Smuzhiyun #define PIN_OFFSET_FIXED BIT_ULL(7) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define PIN_GLOBAL BIT_ULL(10) /* I915_VMA_GLOBAL_BIND */ 46*4882a593Smuzhiyun #define PIN_USER BIT_ULL(11) /* I915_VMA_LOCAL_BIND */ 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define PIN_OFFSET_MASK I915_GTT_PAGE_MASK 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #endif 51