1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the next
12*4882a593Smuzhiyun * paragraph) shall be included in all copies or substantial portions of the
13*4882a593Smuzhiyun * Software.
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18*4882a593Smuzhiyun * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19*4882a593Smuzhiyun * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20*4882a593Smuzhiyun * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21*4882a593Smuzhiyun * SOFTWARE.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * Authors:
24*4882a593Smuzhiyun * Zhi Wang <zhi.a.wang@intel.com>
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun * Contributors:
27*4882a593Smuzhiyun * Changbin Du <changbin.du@intel.com>
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun */
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include <linux/firmware.h>
32*4882a593Smuzhiyun #include <linux/crc32.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include "i915_drv.h"
35*4882a593Smuzhiyun #include "gvt.h"
36*4882a593Smuzhiyun #include "i915_pvinfo.h"
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define FIRMWARE_VERSION (0x0)
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun struct gvt_firmware_header {
41*4882a593Smuzhiyun u64 magic;
42*4882a593Smuzhiyun u32 crc32; /* protect the data after this field */
43*4882a593Smuzhiyun u32 version;
44*4882a593Smuzhiyun u64 cfg_space_size;
45*4882a593Smuzhiyun u64 cfg_space_offset; /* offset in the file */
46*4882a593Smuzhiyun u64 mmio_size;
47*4882a593Smuzhiyun u64 mmio_offset; /* offset in the file */
48*4882a593Smuzhiyun unsigned char data[1];
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define dev_to_drm_minor(d) dev_get_drvdata((d))
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun static ssize_t
gvt_firmware_read(struct file * filp,struct kobject * kobj,struct bin_attribute * attr,char * buf,loff_t offset,size_t count)54*4882a593Smuzhiyun gvt_firmware_read(struct file *filp, struct kobject *kobj,
55*4882a593Smuzhiyun struct bin_attribute *attr, char *buf,
56*4882a593Smuzhiyun loff_t offset, size_t count)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun memcpy(buf, attr->private + offset, count);
59*4882a593Smuzhiyun return count;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun static struct bin_attribute firmware_attr = {
63*4882a593Smuzhiyun .attr = {.name = "gvt_firmware", .mode = (S_IRUSR)},
64*4882a593Smuzhiyun .read = gvt_firmware_read,
65*4882a593Smuzhiyun .write = NULL,
66*4882a593Smuzhiyun .mmap = NULL,
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
mmio_snapshot_handler(struct intel_gvt * gvt,u32 offset,void * data)69*4882a593Smuzhiyun static int mmio_snapshot_handler(struct intel_gvt *gvt, u32 offset, void *data)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun *(u32 *)(data + offset) = intel_uncore_read_notrace(gvt->gt->uncore,
72*4882a593Smuzhiyun _MMIO(offset));
73*4882a593Smuzhiyun return 0;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
expose_firmware_sysfs(struct intel_gvt * gvt)76*4882a593Smuzhiyun static int expose_firmware_sysfs(struct intel_gvt *gvt)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct intel_gvt_device_info *info = &gvt->device_info;
79*4882a593Smuzhiyun struct pci_dev *pdev = gvt->gt->i915->drm.pdev;
80*4882a593Smuzhiyun struct gvt_firmware_header *h;
81*4882a593Smuzhiyun void *firmware;
82*4882a593Smuzhiyun void *p;
83*4882a593Smuzhiyun unsigned long size, crc32_start;
84*4882a593Smuzhiyun int i, ret;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun size = sizeof(*h) + info->mmio_size + info->cfg_space_size;
87*4882a593Smuzhiyun firmware = vzalloc(size);
88*4882a593Smuzhiyun if (!firmware)
89*4882a593Smuzhiyun return -ENOMEM;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun h = firmware;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun h->magic = VGT_MAGIC;
94*4882a593Smuzhiyun h->version = FIRMWARE_VERSION;
95*4882a593Smuzhiyun h->cfg_space_size = info->cfg_space_size;
96*4882a593Smuzhiyun h->cfg_space_offset = offsetof(struct gvt_firmware_header, data);
97*4882a593Smuzhiyun h->mmio_size = info->mmio_size;
98*4882a593Smuzhiyun h->mmio_offset = h->cfg_space_offset + h->cfg_space_size;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun p = firmware + h->cfg_space_offset;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun for (i = 0; i < h->cfg_space_size; i += 4)
103*4882a593Smuzhiyun pci_read_config_dword(pdev, i, p + i);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun memcpy(gvt->firmware.cfg_space, p, info->cfg_space_size);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun p = firmware + h->mmio_offset;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun /* Take a snapshot of hw mmio registers. */
110*4882a593Smuzhiyun intel_gvt_for_each_tracked_mmio(gvt, mmio_snapshot_handler, p);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun memcpy(gvt->firmware.mmio, p, info->mmio_size);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun crc32_start = offsetof(struct gvt_firmware_header, crc32) + 4;
115*4882a593Smuzhiyun h->crc32 = crc32_le(0, firmware + crc32_start, size - crc32_start);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun firmware_attr.size = size;
118*4882a593Smuzhiyun firmware_attr.private = firmware;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun ret = device_create_bin_file(&pdev->dev, &firmware_attr);
121*4882a593Smuzhiyun if (ret) {
122*4882a593Smuzhiyun vfree(firmware);
123*4882a593Smuzhiyun return ret;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun return 0;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
clean_firmware_sysfs(struct intel_gvt * gvt)128*4882a593Smuzhiyun static void clean_firmware_sysfs(struct intel_gvt *gvt)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun struct pci_dev *pdev = gvt->gt->i915->drm.pdev;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun device_remove_bin_file(&pdev->dev, &firmware_attr);
133*4882a593Smuzhiyun vfree(firmware_attr.private);
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /**
137*4882a593Smuzhiyun * intel_gvt_free_firmware - free GVT firmware
138*4882a593Smuzhiyun * @gvt: intel gvt device
139*4882a593Smuzhiyun *
140*4882a593Smuzhiyun */
intel_gvt_free_firmware(struct intel_gvt * gvt)141*4882a593Smuzhiyun void intel_gvt_free_firmware(struct intel_gvt *gvt)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun if (!gvt->firmware.firmware_loaded)
144*4882a593Smuzhiyun clean_firmware_sysfs(gvt);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun kfree(gvt->firmware.cfg_space);
147*4882a593Smuzhiyun vfree(gvt->firmware.mmio);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
verify_firmware(struct intel_gvt * gvt,const struct firmware * fw)150*4882a593Smuzhiyun static int verify_firmware(struct intel_gvt *gvt,
151*4882a593Smuzhiyun const struct firmware *fw)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun struct intel_gvt_device_info *info = &gvt->device_info;
154*4882a593Smuzhiyun struct pci_dev *pdev = gvt->gt->i915->drm.pdev;
155*4882a593Smuzhiyun struct gvt_firmware_header *h;
156*4882a593Smuzhiyun unsigned long id, crc32_start;
157*4882a593Smuzhiyun const void *mem;
158*4882a593Smuzhiyun const char *item;
159*4882a593Smuzhiyun u64 file, request;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun h = (struct gvt_firmware_header *)fw->data;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun crc32_start = offsetofend(struct gvt_firmware_header, crc32);
164*4882a593Smuzhiyun mem = fw->data + crc32_start;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun #define VERIFY(s, a, b) do { \
167*4882a593Smuzhiyun item = (s); file = (u64)(a); request = (u64)(b); \
168*4882a593Smuzhiyun if ((a) != (b)) \
169*4882a593Smuzhiyun goto invalid_firmware; \
170*4882a593Smuzhiyun } while (0)
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun VERIFY("magic number", h->magic, VGT_MAGIC);
173*4882a593Smuzhiyun VERIFY("version", h->version, FIRMWARE_VERSION);
174*4882a593Smuzhiyun VERIFY("crc32", h->crc32, crc32_le(0, mem, fw->size - crc32_start));
175*4882a593Smuzhiyun VERIFY("cfg space size", h->cfg_space_size, info->cfg_space_size);
176*4882a593Smuzhiyun VERIFY("mmio size", h->mmio_size, info->mmio_size);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun mem = (fw->data + h->cfg_space_offset);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun id = *(u16 *)(mem + PCI_VENDOR_ID);
181*4882a593Smuzhiyun VERIFY("vender id", id, pdev->vendor);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun id = *(u16 *)(mem + PCI_DEVICE_ID);
184*4882a593Smuzhiyun VERIFY("device id", id, pdev->device);
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun id = *(u8 *)(mem + PCI_REVISION_ID);
187*4882a593Smuzhiyun VERIFY("revision id", id, pdev->revision);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun #undef VERIFY
190*4882a593Smuzhiyun return 0;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun invalid_firmware:
193*4882a593Smuzhiyun gvt_dbg_core("Invalid firmware: %s [file] 0x%llx [request] 0x%llx\n",
194*4882a593Smuzhiyun item, file, request);
195*4882a593Smuzhiyun return -EINVAL;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun #define GVT_FIRMWARE_PATH "i915/gvt"
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun /**
201*4882a593Smuzhiyun * intel_gvt_load_firmware - load GVT firmware
202*4882a593Smuzhiyun * @gvt: intel gvt device
203*4882a593Smuzhiyun *
204*4882a593Smuzhiyun */
intel_gvt_load_firmware(struct intel_gvt * gvt)205*4882a593Smuzhiyun int intel_gvt_load_firmware(struct intel_gvt *gvt)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun struct intel_gvt_device_info *info = &gvt->device_info;
208*4882a593Smuzhiyun struct pci_dev *pdev = gvt->gt->i915->drm.pdev;
209*4882a593Smuzhiyun struct intel_gvt_firmware *firmware = &gvt->firmware;
210*4882a593Smuzhiyun struct gvt_firmware_header *h;
211*4882a593Smuzhiyun const struct firmware *fw;
212*4882a593Smuzhiyun char *path;
213*4882a593Smuzhiyun void *mem;
214*4882a593Smuzhiyun int ret;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun path = kmalloc(PATH_MAX, GFP_KERNEL);
217*4882a593Smuzhiyun if (!path)
218*4882a593Smuzhiyun return -ENOMEM;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun mem = kmalloc(info->cfg_space_size, GFP_KERNEL);
221*4882a593Smuzhiyun if (!mem) {
222*4882a593Smuzhiyun kfree(path);
223*4882a593Smuzhiyun return -ENOMEM;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun firmware->cfg_space = mem;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun mem = vmalloc(info->mmio_size);
229*4882a593Smuzhiyun if (!mem) {
230*4882a593Smuzhiyun kfree(path);
231*4882a593Smuzhiyun kfree(firmware->cfg_space);
232*4882a593Smuzhiyun return -ENOMEM;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun firmware->mmio = mem;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun sprintf(path, "%s/vid_0x%04x_did_0x%04x_rid_0x%02x.golden_hw_state",
238*4882a593Smuzhiyun GVT_FIRMWARE_PATH, pdev->vendor, pdev->device,
239*4882a593Smuzhiyun pdev->revision);
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun gvt_dbg_core("request hw state firmware %s...\n", path);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun ret = request_firmware(&fw, path, &gvt->gt->i915->drm.pdev->dev);
244*4882a593Smuzhiyun kfree(path);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun if (ret)
247*4882a593Smuzhiyun goto expose_firmware;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun gvt_dbg_core("success.\n");
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun ret = verify_firmware(gvt, fw);
252*4882a593Smuzhiyun if (ret)
253*4882a593Smuzhiyun goto out_free_fw;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun gvt_dbg_core("verified.\n");
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun h = (struct gvt_firmware_header *)fw->data;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun memcpy(firmware->cfg_space, fw->data + h->cfg_space_offset,
260*4882a593Smuzhiyun h->cfg_space_size);
261*4882a593Smuzhiyun memcpy(firmware->mmio, fw->data + h->mmio_offset,
262*4882a593Smuzhiyun h->mmio_size);
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun release_firmware(fw);
265*4882a593Smuzhiyun firmware->firmware_loaded = true;
266*4882a593Smuzhiyun return 0;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun out_free_fw:
269*4882a593Smuzhiyun release_firmware(fw);
270*4882a593Smuzhiyun expose_firmware:
271*4882a593Smuzhiyun expose_firmware_sysfs(gvt);
272*4882a593Smuzhiyun return 0;
273*4882a593Smuzhiyun }
274