1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright © 2016 Intel Corporation
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the next
12*4882a593Smuzhiyun * paragraph) shall be included in all copies or substantial portions of the
13*4882a593Smuzhiyun * Software.
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18*4882a593Smuzhiyun * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19*4882a593Smuzhiyun * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21*4882a593Smuzhiyun * IN THE SOFTWARE.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #ifndef I915_TIMELINE_H
26*4882a593Smuzhiyun #define I915_TIMELINE_H
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #include <linux/lockdep.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include "i915_active.h"
31*4882a593Smuzhiyun #include "i915_syncmap.h"
32*4882a593Smuzhiyun #include "intel_timeline_types.h"
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun struct intel_timeline *
35*4882a593Smuzhiyun __intel_timeline_create(struct intel_gt *gt,
36*4882a593Smuzhiyun struct i915_vma *global_hwsp,
37*4882a593Smuzhiyun unsigned int offset);
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static inline struct intel_timeline *
intel_timeline_create(struct intel_gt * gt)40*4882a593Smuzhiyun intel_timeline_create(struct intel_gt *gt)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun return __intel_timeline_create(gt, NULL, 0);
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun static inline struct intel_timeline *
intel_timeline_create_from_engine(struct intel_engine_cs * engine,unsigned int offset)46*4882a593Smuzhiyun intel_timeline_create_from_engine(struct intel_engine_cs *engine,
47*4882a593Smuzhiyun unsigned int offset)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun return __intel_timeline_create(engine->gt,
50*4882a593Smuzhiyun engine->status_page.vma,
51*4882a593Smuzhiyun offset);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun static inline struct intel_timeline *
intel_timeline_get(struct intel_timeline * timeline)55*4882a593Smuzhiyun intel_timeline_get(struct intel_timeline *timeline)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun kref_get(&timeline->kref);
58*4882a593Smuzhiyun return timeline;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun void __intel_timeline_free(struct kref *kref);
intel_timeline_put(struct intel_timeline * timeline)62*4882a593Smuzhiyun static inline void intel_timeline_put(struct intel_timeline *timeline)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun kref_put(&timeline->kref, __intel_timeline_free);
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
__intel_timeline_sync_set(struct intel_timeline * tl,u64 context,u32 seqno)67*4882a593Smuzhiyun static inline int __intel_timeline_sync_set(struct intel_timeline *tl,
68*4882a593Smuzhiyun u64 context, u32 seqno)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun return i915_syncmap_set(&tl->sync, context, seqno);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
intel_timeline_sync_set(struct intel_timeline * tl,const struct dma_fence * fence)73*4882a593Smuzhiyun static inline int intel_timeline_sync_set(struct intel_timeline *tl,
74*4882a593Smuzhiyun const struct dma_fence *fence)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun return __intel_timeline_sync_set(tl, fence->context, fence->seqno);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
__intel_timeline_sync_is_later(struct intel_timeline * tl,u64 context,u32 seqno)79*4882a593Smuzhiyun static inline bool __intel_timeline_sync_is_later(struct intel_timeline *tl,
80*4882a593Smuzhiyun u64 context, u32 seqno)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun return i915_syncmap_is_later(&tl->sync, context, seqno);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
intel_timeline_sync_is_later(struct intel_timeline * tl,const struct dma_fence * fence)85*4882a593Smuzhiyun static inline bool intel_timeline_sync_is_later(struct intel_timeline *tl,
86*4882a593Smuzhiyun const struct dma_fence *fence)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun return __intel_timeline_sync_is_later(tl, fence->context, fence->seqno);
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun void __intel_timeline_pin(struct intel_timeline *tl);
92*4882a593Smuzhiyun int intel_timeline_pin(struct intel_timeline *tl, struct i915_gem_ww_ctx *ww);
93*4882a593Smuzhiyun void intel_timeline_enter(struct intel_timeline *tl);
94*4882a593Smuzhiyun int intel_timeline_get_seqno(struct intel_timeline *tl,
95*4882a593Smuzhiyun struct i915_request *rq,
96*4882a593Smuzhiyun u32 *seqno);
97*4882a593Smuzhiyun void intel_timeline_exit(struct intel_timeline *tl);
98*4882a593Smuzhiyun void intel_timeline_unpin(struct intel_timeline *tl);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun void intel_timeline_reset_seqno(const struct intel_timeline *tl);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun int intel_timeline_read_hwsp(struct i915_request *from,
103*4882a593Smuzhiyun struct i915_request *until,
104*4882a593Smuzhiyun u32 *hwsp_offset);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun void intel_gt_init_timelines(struct intel_gt *gt);
107*4882a593Smuzhiyun void intel_gt_fini_timelines(struct intel_gt *gt);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun #endif
110