1*4882a593Smuzhiyun /* SPDX-License-Identifier: MIT */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright © 2019 Intel Corporation
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #ifndef __INTEL_GT__
7*4882a593Smuzhiyun #define __INTEL_GT__
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include "intel_engine_types.h"
10*4882a593Smuzhiyun #include "intel_gt_types.h"
11*4882a593Smuzhiyun #include "intel_reset.h"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun struct drm_i915_private;
14*4882a593Smuzhiyun struct drm_printer;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define GT_TRACE(gt, fmt, ...) do { \
17*4882a593Smuzhiyun const struct intel_gt *gt__ __maybe_unused = (gt); \
18*4882a593Smuzhiyun GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev), \
19*4882a593Smuzhiyun ##__VA_ARGS__); \
20*4882a593Smuzhiyun } while (0)
21*4882a593Smuzhiyun
uc_to_gt(struct intel_uc * uc)22*4882a593Smuzhiyun static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun return container_of(uc, struct intel_gt, uc);
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun
guc_to_gt(struct intel_guc * guc)27*4882a593Smuzhiyun static inline struct intel_gt *guc_to_gt(struct intel_guc *guc)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun return container_of(guc, struct intel_gt, uc.guc);
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
huc_to_gt(struct intel_huc * huc)32*4882a593Smuzhiyun static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun return container_of(huc, struct intel_gt, uc.huc);
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
38*4882a593Smuzhiyun void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt);
39*4882a593Smuzhiyun int intel_gt_init_mmio(struct intel_gt *gt);
40*4882a593Smuzhiyun int __must_check intel_gt_init_hw(struct intel_gt *gt);
41*4882a593Smuzhiyun int intel_gt_init(struct intel_gt *gt);
42*4882a593Smuzhiyun void intel_gt_driver_register(struct intel_gt *gt);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun void intel_gt_driver_unregister(struct intel_gt *gt);
45*4882a593Smuzhiyun void intel_gt_driver_remove(struct intel_gt *gt);
46*4882a593Smuzhiyun void intel_gt_driver_release(struct intel_gt *gt);
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun void intel_gt_driver_late_release(struct intel_gt *gt);
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun void intel_gt_check_and_clear_faults(struct intel_gt *gt);
51*4882a593Smuzhiyun void intel_gt_clear_error_registers(struct intel_gt *gt,
52*4882a593Smuzhiyun intel_engine_mask_t engine_mask);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun void intel_gt_flush_ggtt_writes(struct intel_gt *gt);
55*4882a593Smuzhiyun void intel_gt_chipset_flush(struct intel_gt *gt);
56*4882a593Smuzhiyun
intel_gt_scratch_offset(const struct intel_gt * gt,enum intel_gt_scratch_field field)57*4882a593Smuzhiyun static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt,
58*4882a593Smuzhiyun enum intel_gt_scratch_field field)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun return i915_ggtt_offset(gt->scratch) + field;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
intel_gt_has_unrecoverable_error(const struct intel_gt * gt)63*4882a593Smuzhiyun static inline bool intel_gt_has_unrecoverable_error(const struct intel_gt *gt)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun return test_bit(I915_WEDGED_ON_INIT, >->reset.flags) ||
66*4882a593Smuzhiyun test_bit(I915_WEDGED_ON_FINI, >->reset.flags);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
intel_gt_is_wedged(const struct intel_gt * gt)69*4882a593Smuzhiyun static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun GEM_BUG_ON(intel_gt_has_unrecoverable_error(gt) &&
72*4882a593Smuzhiyun !test_bit(I915_WEDGED, >->reset.flags));
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun return unlikely(test_bit(I915_WEDGED, >->reset.flags));
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun void intel_gt_info_print(const struct intel_gt_info *info,
78*4882a593Smuzhiyun struct drm_printer *p);
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun void intel_gt_invalidate_tlbs(struct intel_gt *gt);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun #endif /* __INTEL_GT_H__ */
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