xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/display/intel_vga.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: MIT
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright © 2019 Intel Corporation
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/pci.h>
7*4882a593Smuzhiyun #include <linux/vgaarb.h>
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <drm/i915_drm.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include "i915_drv.h"
12*4882a593Smuzhiyun #include "intel_de.h"
13*4882a593Smuzhiyun #include "intel_vga.h"
14*4882a593Smuzhiyun 
intel_vga_cntrl_reg(struct drm_i915_private * i915)15*4882a593Smuzhiyun static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun 	if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
18*4882a593Smuzhiyun 		return VLV_VGACNTRL;
19*4882a593Smuzhiyun 	else if (INTEL_GEN(i915) >= 5)
20*4882a593Smuzhiyun 		return CPU_VGACNTRL;
21*4882a593Smuzhiyun 	else
22*4882a593Smuzhiyun 		return VGACNTRL;
23*4882a593Smuzhiyun }
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /* Disable the VGA plane that we never use */
intel_vga_disable(struct drm_i915_private * dev_priv)26*4882a593Smuzhiyun void intel_vga_disable(struct drm_i915_private *dev_priv)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun 	struct pci_dev *pdev = dev_priv->drm.pdev;
29*4882a593Smuzhiyun 	i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
30*4882a593Smuzhiyun 	u8 sr1;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	/* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */
33*4882a593Smuzhiyun 	vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
34*4882a593Smuzhiyun 	outb(SR01, VGA_SR_INDEX);
35*4882a593Smuzhiyun 	sr1 = inb(VGA_SR_DATA);
36*4882a593Smuzhiyun 	outb(sr1 | 1 << 5, VGA_SR_DATA);
37*4882a593Smuzhiyun 	vga_put(pdev, VGA_RSRC_LEGACY_IO);
38*4882a593Smuzhiyun 	udelay(300);
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	intel_de_write(dev_priv, vga_reg, VGA_DISP_DISABLE);
41*4882a593Smuzhiyun 	intel_de_posting_read(dev_priv, vga_reg);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun 
intel_vga_redisable_power_on(struct drm_i915_private * dev_priv)44*4882a593Smuzhiyun void intel_vga_redisable_power_on(struct drm_i915_private *dev_priv)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv);
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	if (!(intel_de_read(dev_priv, vga_reg) & VGA_DISP_DISABLE)) {
49*4882a593Smuzhiyun 		drm_dbg_kms(&dev_priv->drm,
50*4882a593Smuzhiyun 			    "Something enabled VGA plane, disabling it\n");
51*4882a593Smuzhiyun 		intel_vga_disable(dev_priv);
52*4882a593Smuzhiyun 	}
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun 
intel_vga_redisable(struct drm_i915_private * i915)55*4882a593Smuzhiyun void intel_vga_redisable(struct drm_i915_private *i915)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	intel_wakeref_t wakeref;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	/*
60*4882a593Smuzhiyun 	 * This function can be called both from intel_modeset_setup_hw_state or
61*4882a593Smuzhiyun 	 * at a very early point in our resume sequence, where the power well
62*4882a593Smuzhiyun 	 * structures are not yet restored. Since this function is at a very
63*4882a593Smuzhiyun 	 * paranoid "someone might have enabled VGA while we were not looking"
64*4882a593Smuzhiyun 	 * level, just check if the power well is enabled instead of trying to
65*4882a593Smuzhiyun 	 * follow the "don't touch the power well if we don't need it" policy
66*4882a593Smuzhiyun 	 * the rest of the driver uses.
67*4882a593Smuzhiyun 	 */
68*4882a593Smuzhiyun 	wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA);
69*4882a593Smuzhiyun 	if (!wakeref)
70*4882a593Smuzhiyun 		return;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	intel_vga_redisable_power_on(i915);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
intel_vga_reset_io_mem(struct drm_i915_private * i915)77*4882a593Smuzhiyun void intel_vga_reset_io_mem(struct drm_i915_private *i915)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	struct pci_dev *pdev = i915->drm.pdev;
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	/*
82*4882a593Smuzhiyun 	 * After we re-enable the power well, if we touch VGA register 0x3d5
83*4882a593Smuzhiyun 	 * we'll get unclaimed register interrupts. This stops after we write
84*4882a593Smuzhiyun 	 * anything to the VGA MSR register. The vgacon module uses this
85*4882a593Smuzhiyun 	 * register all the time, so if we unbind our driver and, as a
86*4882a593Smuzhiyun 	 * consequence, bind vgacon, we'll get stuck in an infinite loop at
87*4882a593Smuzhiyun 	 * console_unlock(). So make here we touch the VGA MSR register, making
88*4882a593Smuzhiyun 	 * sure vgacon can keep working normally without triggering interrupts
89*4882a593Smuzhiyun 	 * and error messages.
90*4882a593Smuzhiyun 	 */
91*4882a593Smuzhiyun 	vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
92*4882a593Smuzhiyun 	outb(inb(VGA_MSR_READ), VGA_MSR_WRITE);
93*4882a593Smuzhiyun 	vga_put(pdev, VGA_RSRC_LEGACY_IO);
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun static int
intel_vga_set_state(struct drm_i915_private * i915,bool enable_decode)97*4882a593Smuzhiyun intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	unsigned int reg = INTEL_GEN(i915) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
100*4882a593Smuzhiyun 	u16 gmch_ctrl;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	if (pci_read_config_word(i915->bridge_dev, reg, &gmch_ctrl)) {
103*4882a593Smuzhiyun 		drm_err(&i915->drm, "failed to read control word\n");
104*4882a593Smuzhiyun 		return -EIO;
105*4882a593Smuzhiyun 	}
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
108*4882a593Smuzhiyun 		return 0;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (enable_decode)
111*4882a593Smuzhiyun 		gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
112*4882a593Smuzhiyun 	else
113*4882a593Smuzhiyun 		gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	if (pci_write_config_word(i915->bridge_dev, reg, gmch_ctrl)) {
116*4882a593Smuzhiyun 		drm_err(&i915->drm, "failed to write control word\n");
117*4882a593Smuzhiyun 		return -EIO;
118*4882a593Smuzhiyun 	}
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	return 0;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun static unsigned int
intel_vga_set_decode(void * cookie,bool enable_decode)124*4882a593Smuzhiyun intel_vga_set_decode(void *cookie, bool enable_decode)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun 	struct drm_i915_private *i915 = cookie;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	intel_vga_set_state(i915, enable_decode);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	if (enable_decode)
131*4882a593Smuzhiyun 		return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
132*4882a593Smuzhiyun 		       VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
133*4882a593Smuzhiyun 	else
134*4882a593Smuzhiyun 		return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun 
intel_vga_register(struct drm_i915_private * i915)137*4882a593Smuzhiyun int intel_vga_register(struct drm_i915_private *i915)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun 	struct pci_dev *pdev = i915->drm.pdev;
140*4882a593Smuzhiyun 	int ret;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	/*
143*4882a593Smuzhiyun 	 * If we have > 1 VGA cards, then we need to arbitrate access to the
144*4882a593Smuzhiyun 	 * common VGA resources.
145*4882a593Smuzhiyun 	 *
146*4882a593Smuzhiyun 	 * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
147*4882a593Smuzhiyun 	 * then we do not take part in VGA arbitration and the
148*4882a593Smuzhiyun 	 * vga_client_register() fails with -ENODEV.
149*4882a593Smuzhiyun 	 */
150*4882a593Smuzhiyun 	ret = vga_client_register(pdev, i915, NULL, intel_vga_set_decode);
151*4882a593Smuzhiyun 	if (ret && ret != -ENODEV)
152*4882a593Smuzhiyun 		return ret;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	return 0;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
intel_vga_unregister(struct drm_i915_private * i915)157*4882a593Smuzhiyun void intel_vga_unregister(struct drm_i915_private *i915)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	struct pci_dev *pdev = i915->drm.pdev;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	vga_client_register(pdev, NULL, NULL, NULL);
162*4882a593Smuzhiyun }
163