1*4882a593Smuzhiyun /* SPDX-License-Identifier: MIT */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright © 2019 Intel Corporation
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #ifndef __INTEL_SPRITE_H__
7*4882a593Smuzhiyun #define __INTEL_SPRITE_H__
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/types.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "intel_display.h"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun struct drm_device;
14*4882a593Smuzhiyun struct drm_display_mode;
15*4882a593Smuzhiyun struct drm_file;
16*4882a593Smuzhiyun struct drm_i915_private;
17*4882a593Smuzhiyun struct intel_crtc_state;
18*4882a593Smuzhiyun struct intel_plane_state;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
21*4882a593Smuzhiyun int usecs);
22*4882a593Smuzhiyun struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,
23*4882a593Smuzhiyun enum pipe pipe, int plane);
24*4882a593Smuzhiyun int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
25*4882a593Smuzhiyun struct drm_file *file_priv);
26*4882a593Smuzhiyun void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state);
27*4882a593Smuzhiyun void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state);
28*4882a593Smuzhiyun int intel_plane_check_stride(const struct intel_plane_state *plane_state);
29*4882a593Smuzhiyun int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state);
30*4882a593Smuzhiyun int chv_plane_check_rotation(const struct intel_plane_state *plane_state);
31*4882a593Smuzhiyun struct intel_plane *
32*4882a593Smuzhiyun skl_universal_plane_create(struct drm_i915_private *dev_priv,
33*4882a593Smuzhiyun enum pipe pipe, enum plane_id plane_id);
34*4882a593Smuzhiyun
icl_hdr_plane_mask(void)35*4882a593Smuzhiyun static inline u8 icl_hdr_plane_mask(void)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun return BIT(PLANE_PRIMARY) |
38*4882a593Smuzhiyun BIT(PLANE_SPRITE0) | BIT(PLANE_SPRITE1);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun bool icl_is_nv12_y_plane(struct drm_i915_private *dev_priv,
42*4882a593Smuzhiyun enum plane_id plane_id);
43*4882a593Smuzhiyun bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun int ivb_plane_min_cdclk(const struct intel_crtc_state *crtc_state,
46*4882a593Smuzhiyun const struct intel_plane_state *plane_state);
47*4882a593Smuzhiyun int hsw_plane_min_cdclk(const struct intel_crtc_state *crtc_state,
48*4882a593Smuzhiyun const struct intel_plane_state *plane_state);
49*4882a593Smuzhiyun int vlv_plane_min_cdclk(const struct intel_crtc_state *crtc_state,
50*4882a593Smuzhiyun const struct intel_plane_state *plane_state);
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun #endif /* __INTEL_SPRITE_H__ */
53