1*4882a593Smuzhiyun /* SPDX-License-Identifier: MIT */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright © 2019 Intel Corporation 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __INTEL_PSR_H__ 7*4882a593Smuzhiyun #define __INTEL_PSR_H__ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include "intel_frontbuffer.h" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun struct drm_connector; 12*4882a593Smuzhiyun struct drm_connector_state; 13*4882a593Smuzhiyun struct drm_i915_private; 14*4882a593Smuzhiyun struct intel_crtc_state; 15*4882a593Smuzhiyun struct intel_dp; 16*4882a593Smuzhiyun struct intel_crtc; 17*4882a593Smuzhiyun struct intel_atomic_state; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support) 20*4882a593Smuzhiyun void intel_psr_init_dpcd(struct intel_dp *intel_dp); 21*4882a593Smuzhiyun void intel_psr_enable(struct intel_dp *intel_dp, 22*4882a593Smuzhiyun const struct intel_crtc_state *crtc_state, 23*4882a593Smuzhiyun const struct drm_connector_state *conn_state); 24*4882a593Smuzhiyun void intel_psr_disable(struct intel_dp *intel_dp, 25*4882a593Smuzhiyun const struct intel_crtc_state *old_crtc_state); 26*4882a593Smuzhiyun void intel_psr_update(struct intel_dp *intel_dp, 27*4882a593Smuzhiyun const struct intel_crtc_state *crtc_state, 28*4882a593Smuzhiyun const struct drm_connector_state *conn_state); 29*4882a593Smuzhiyun int intel_psr_debug_set(struct drm_i915_private *dev_priv, u64 value); 30*4882a593Smuzhiyun void intel_psr_invalidate(struct drm_i915_private *dev_priv, 31*4882a593Smuzhiyun unsigned frontbuffer_bits, 32*4882a593Smuzhiyun enum fb_op_origin origin); 33*4882a593Smuzhiyun void intel_psr_flush(struct drm_i915_private *dev_priv, 34*4882a593Smuzhiyun unsigned frontbuffer_bits, 35*4882a593Smuzhiyun enum fb_op_origin origin); 36*4882a593Smuzhiyun void intel_psr_init(struct drm_i915_private *dev_priv); 37*4882a593Smuzhiyun void intel_psr_compute_config(struct intel_dp *intel_dp, 38*4882a593Smuzhiyun struct intel_crtc_state *crtc_state); 39*4882a593Smuzhiyun void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32 psr_iir); 40*4882a593Smuzhiyun void intel_psr_short_pulse(struct intel_dp *intel_dp); 41*4882a593Smuzhiyun int intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state, 42*4882a593Smuzhiyun u32 *out_value); 43*4882a593Smuzhiyun bool intel_psr_enabled(struct intel_dp *intel_dp); 44*4882a593Smuzhiyun void intel_psr_atomic_check(struct drm_connector *connector, 45*4882a593Smuzhiyun struct drm_connector_state *old_state, 46*4882a593Smuzhiyun struct drm_connector_state *new_state); 47*4882a593Smuzhiyun void intel_psr_set_force_mode_changed(struct intel_dp *intel_dp); 48*4882a593Smuzhiyun void intel_psr2_sel_fetch_update(struct intel_atomic_state *state, 49*4882a593Smuzhiyun struct intel_crtc *crtc); 50*4882a593Smuzhiyun void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state); 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun #endif /* __INTEL_PSR_H__ */ 53