1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2008 Intel Corporation <hong.liu@intel.com>
3*4882a593Smuzhiyun * Copyright 2008 Red Hat <mjg@redhat.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining
6*4882a593Smuzhiyun * a copy of this software and associated documentation files (the
7*4882a593Smuzhiyun * "Software"), to deal in the Software without restriction, including
8*4882a593Smuzhiyun * without limitation the rights to use, copy, modify, merge, publish,
9*4882a593Smuzhiyun * distribute, sub license, and/or sell copies of the Software, and to
10*4882a593Smuzhiyun * permit persons to whom the Software is furnished to do so, subject to
11*4882a593Smuzhiyun * the following conditions:
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the
14*4882a593Smuzhiyun * next paragraph) shall be included in all copies or substantial
15*4882a593Smuzhiyun * portions of the Software.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20*4882a593Smuzhiyun * NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE
21*4882a593Smuzhiyun * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
22*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
23*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24*4882a593Smuzhiyun * SOFTWARE.
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun */
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #include <linux/acpi.h>
29*4882a593Smuzhiyun #include <linux/dmi.h>
30*4882a593Smuzhiyun #include <linux/firmware.h>
31*4882a593Smuzhiyun #include <acpi/video.h>
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include "display/intel_panel.h"
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #include "i915_drv.h"
36*4882a593Smuzhiyun #include "intel_acpi.h"
37*4882a593Smuzhiyun #include "intel_display_types.h"
38*4882a593Smuzhiyun #include "intel_opregion.h"
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define OPREGION_HEADER_OFFSET 0
41*4882a593Smuzhiyun #define OPREGION_ACPI_OFFSET 0x100
42*4882a593Smuzhiyun #define ACPI_CLID 0x01ac /* current lid state indicator */
43*4882a593Smuzhiyun #define ACPI_CDCK 0x01b0 /* current docking state indicator */
44*4882a593Smuzhiyun #define OPREGION_SWSCI_OFFSET 0x200
45*4882a593Smuzhiyun #define OPREGION_ASLE_OFFSET 0x300
46*4882a593Smuzhiyun #define OPREGION_VBT_OFFSET 0x400
47*4882a593Smuzhiyun #define OPREGION_ASLE_EXT_OFFSET 0x1C00
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define OPREGION_SIGNATURE "IntelGraphicsMem"
50*4882a593Smuzhiyun #define MBOX_ACPI (1<<0)
51*4882a593Smuzhiyun #define MBOX_SWSCI (1<<1)
52*4882a593Smuzhiyun #define MBOX_ASLE (1<<2)
53*4882a593Smuzhiyun #define MBOX_ASLE_EXT (1<<4)
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun struct opregion_header {
56*4882a593Smuzhiyun u8 signature[16];
57*4882a593Smuzhiyun u32 size;
58*4882a593Smuzhiyun struct {
59*4882a593Smuzhiyun u8 rsvd;
60*4882a593Smuzhiyun u8 revision;
61*4882a593Smuzhiyun u8 minor;
62*4882a593Smuzhiyun u8 major;
63*4882a593Smuzhiyun } __packed over;
64*4882a593Smuzhiyun u8 bios_ver[32];
65*4882a593Smuzhiyun u8 vbios_ver[16];
66*4882a593Smuzhiyun u8 driver_ver[16];
67*4882a593Smuzhiyun u32 mboxes;
68*4882a593Smuzhiyun u32 driver_model;
69*4882a593Smuzhiyun u32 pcon;
70*4882a593Smuzhiyun u8 dver[32];
71*4882a593Smuzhiyun u8 rsvd[124];
72*4882a593Smuzhiyun } __packed;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* OpRegion mailbox #1: public ACPI methods */
75*4882a593Smuzhiyun struct opregion_acpi {
76*4882a593Smuzhiyun u32 drdy; /* driver readiness */
77*4882a593Smuzhiyun u32 csts; /* notification status */
78*4882a593Smuzhiyun u32 cevt; /* current event */
79*4882a593Smuzhiyun u8 rsvd1[20];
80*4882a593Smuzhiyun u32 didl[8]; /* supported display devices ID list */
81*4882a593Smuzhiyun u32 cpdl[8]; /* currently presented display list */
82*4882a593Smuzhiyun u32 cadl[8]; /* currently active display list */
83*4882a593Smuzhiyun u32 nadl[8]; /* next active devices list */
84*4882a593Smuzhiyun u32 aslp; /* ASL sleep time-out */
85*4882a593Smuzhiyun u32 tidx; /* toggle table index */
86*4882a593Smuzhiyun u32 chpd; /* current hotplug enable indicator */
87*4882a593Smuzhiyun u32 clid; /* current lid state*/
88*4882a593Smuzhiyun u32 cdck; /* current docking state */
89*4882a593Smuzhiyun u32 sxsw; /* Sx state resume */
90*4882a593Smuzhiyun u32 evts; /* ASL supported events */
91*4882a593Smuzhiyun u32 cnot; /* current OS notification */
92*4882a593Smuzhiyun u32 nrdy; /* driver status */
93*4882a593Smuzhiyun u32 did2[7]; /* extended supported display devices ID list */
94*4882a593Smuzhiyun u32 cpd2[7]; /* extended attached display devices list */
95*4882a593Smuzhiyun u8 rsvd2[4];
96*4882a593Smuzhiyun } __packed;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* OpRegion mailbox #2: SWSCI */
99*4882a593Smuzhiyun struct opregion_swsci {
100*4882a593Smuzhiyun u32 scic; /* SWSCI command|status|data */
101*4882a593Smuzhiyun u32 parm; /* command parameters */
102*4882a593Smuzhiyun u32 dslp; /* driver sleep time-out */
103*4882a593Smuzhiyun u8 rsvd[244];
104*4882a593Smuzhiyun } __packed;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* OpRegion mailbox #3: ASLE */
107*4882a593Smuzhiyun struct opregion_asle {
108*4882a593Smuzhiyun u32 ardy; /* driver readiness */
109*4882a593Smuzhiyun u32 aslc; /* ASLE interrupt command */
110*4882a593Smuzhiyun u32 tche; /* technology enabled indicator */
111*4882a593Smuzhiyun u32 alsi; /* current ALS illuminance reading */
112*4882a593Smuzhiyun u32 bclp; /* backlight brightness to set */
113*4882a593Smuzhiyun u32 pfit; /* panel fitting state */
114*4882a593Smuzhiyun u32 cblv; /* current brightness level */
115*4882a593Smuzhiyun u16 bclm[20]; /* backlight level duty cycle mapping table */
116*4882a593Smuzhiyun u32 cpfm; /* current panel fitting mode */
117*4882a593Smuzhiyun u32 epfm; /* enabled panel fitting modes */
118*4882a593Smuzhiyun u8 plut[74]; /* panel LUT and identifier */
119*4882a593Smuzhiyun u32 pfmb; /* PWM freq and min brightness */
120*4882a593Smuzhiyun u32 cddv; /* color correction default values */
121*4882a593Smuzhiyun u32 pcft; /* power conservation features */
122*4882a593Smuzhiyun u32 srot; /* supported rotation angles */
123*4882a593Smuzhiyun u32 iuer; /* IUER events */
124*4882a593Smuzhiyun u64 fdss;
125*4882a593Smuzhiyun u32 fdsp;
126*4882a593Smuzhiyun u32 stat;
127*4882a593Smuzhiyun u64 rvda; /* Physical (2.0) or relative from opregion (2.1+)
128*4882a593Smuzhiyun * address of raw VBT data. */
129*4882a593Smuzhiyun u32 rvds; /* Size of raw vbt data */
130*4882a593Smuzhiyun u8 rsvd[58];
131*4882a593Smuzhiyun } __packed;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* OpRegion mailbox #5: ASLE ext */
134*4882a593Smuzhiyun struct opregion_asle_ext {
135*4882a593Smuzhiyun u32 phed; /* Panel Header */
136*4882a593Smuzhiyun u8 bddc[256]; /* Panel EDID */
137*4882a593Smuzhiyun u8 rsvd[764];
138*4882a593Smuzhiyun } __packed;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* Driver readiness indicator */
141*4882a593Smuzhiyun #define ASLE_ARDY_READY (1 << 0)
142*4882a593Smuzhiyun #define ASLE_ARDY_NOT_READY (0 << 0)
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /* ASLE Interrupt Command (ASLC) bits */
145*4882a593Smuzhiyun #define ASLC_SET_ALS_ILLUM (1 << 0)
146*4882a593Smuzhiyun #define ASLC_SET_BACKLIGHT (1 << 1)
147*4882a593Smuzhiyun #define ASLC_SET_PFIT (1 << 2)
148*4882a593Smuzhiyun #define ASLC_SET_PWM_FREQ (1 << 3)
149*4882a593Smuzhiyun #define ASLC_SUPPORTED_ROTATION_ANGLES (1 << 4)
150*4882a593Smuzhiyun #define ASLC_BUTTON_ARRAY (1 << 5)
151*4882a593Smuzhiyun #define ASLC_CONVERTIBLE_INDICATOR (1 << 6)
152*4882a593Smuzhiyun #define ASLC_DOCKING_INDICATOR (1 << 7)
153*4882a593Smuzhiyun #define ASLC_ISCT_STATE_CHANGE (1 << 8)
154*4882a593Smuzhiyun #define ASLC_REQ_MSK 0x1ff
155*4882a593Smuzhiyun /* response bits */
156*4882a593Smuzhiyun #define ASLC_ALS_ILLUM_FAILED (1 << 10)
157*4882a593Smuzhiyun #define ASLC_BACKLIGHT_FAILED (1 << 12)
158*4882a593Smuzhiyun #define ASLC_PFIT_FAILED (1 << 14)
159*4882a593Smuzhiyun #define ASLC_PWM_FREQ_FAILED (1 << 16)
160*4882a593Smuzhiyun #define ASLC_ROTATION_ANGLES_FAILED (1 << 18)
161*4882a593Smuzhiyun #define ASLC_BUTTON_ARRAY_FAILED (1 << 20)
162*4882a593Smuzhiyun #define ASLC_CONVERTIBLE_FAILED (1 << 22)
163*4882a593Smuzhiyun #define ASLC_DOCKING_FAILED (1 << 24)
164*4882a593Smuzhiyun #define ASLC_ISCT_STATE_FAILED (1 << 26)
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun /* Technology enabled indicator */
167*4882a593Smuzhiyun #define ASLE_TCHE_ALS_EN (1 << 0)
168*4882a593Smuzhiyun #define ASLE_TCHE_BLC_EN (1 << 1)
169*4882a593Smuzhiyun #define ASLE_TCHE_PFIT_EN (1 << 2)
170*4882a593Smuzhiyun #define ASLE_TCHE_PFMB_EN (1 << 3)
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun /* ASLE backlight brightness to set */
173*4882a593Smuzhiyun #define ASLE_BCLP_VALID (1<<31)
174*4882a593Smuzhiyun #define ASLE_BCLP_MSK (~(1<<31))
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun /* ASLE panel fitting request */
177*4882a593Smuzhiyun #define ASLE_PFIT_VALID (1<<31)
178*4882a593Smuzhiyun #define ASLE_PFIT_CENTER (1<<0)
179*4882a593Smuzhiyun #define ASLE_PFIT_STRETCH_TEXT (1<<1)
180*4882a593Smuzhiyun #define ASLE_PFIT_STRETCH_GFX (1<<2)
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun /* PWM frequency and minimum brightness */
183*4882a593Smuzhiyun #define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
184*4882a593Smuzhiyun #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
185*4882a593Smuzhiyun #define ASLE_PFMB_PWM_MASK (0x7ffffe00)
186*4882a593Smuzhiyun #define ASLE_PFMB_PWM_VALID (1<<31)
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun #define ASLE_CBLV_VALID (1<<31)
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /* IUER */
191*4882a593Smuzhiyun #define ASLE_IUER_DOCKING (1 << 7)
192*4882a593Smuzhiyun #define ASLE_IUER_CONVERTIBLE (1 << 6)
193*4882a593Smuzhiyun #define ASLE_IUER_ROTATION_LOCK_BTN (1 << 4)
194*4882a593Smuzhiyun #define ASLE_IUER_VOLUME_DOWN_BTN (1 << 3)
195*4882a593Smuzhiyun #define ASLE_IUER_VOLUME_UP_BTN (1 << 2)
196*4882a593Smuzhiyun #define ASLE_IUER_WINDOWS_BTN (1 << 1)
197*4882a593Smuzhiyun #define ASLE_IUER_POWER_BTN (1 << 0)
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /* Software System Control Interrupt (SWSCI) */
200*4882a593Smuzhiyun #define SWSCI_SCIC_INDICATOR (1 << 0)
201*4882a593Smuzhiyun #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT 1
202*4882a593Smuzhiyun #define SWSCI_SCIC_MAIN_FUNCTION_MASK (0xf << 1)
203*4882a593Smuzhiyun #define SWSCI_SCIC_SUB_FUNCTION_SHIFT 8
204*4882a593Smuzhiyun #define SWSCI_SCIC_SUB_FUNCTION_MASK (0xff << 8)
205*4882a593Smuzhiyun #define SWSCI_SCIC_EXIT_PARAMETER_SHIFT 8
206*4882a593Smuzhiyun #define SWSCI_SCIC_EXIT_PARAMETER_MASK (0xff << 8)
207*4882a593Smuzhiyun #define SWSCI_SCIC_EXIT_STATUS_SHIFT 5
208*4882a593Smuzhiyun #define SWSCI_SCIC_EXIT_STATUS_MASK (7 << 5)
209*4882a593Smuzhiyun #define SWSCI_SCIC_EXIT_STATUS_SUCCESS 1
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun #define SWSCI_FUNCTION_CODE(main, sub) \
212*4882a593Smuzhiyun ((main) << SWSCI_SCIC_MAIN_FUNCTION_SHIFT | \
213*4882a593Smuzhiyun (sub) << SWSCI_SCIC_SUB_FUNCTION_SHIFT)
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun /* SWSCI: Get BIOS Data (GBDA) */
216*4882a593Smuzhiyun #define SWSCI_GBDA 4
217*4882a593Smuzhiyun #define SWSCI_GBDA_SUPPORTED_CALLS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 0)
218*4882a593Smuzhiyun #define SWSCI_GBDA_REQUESTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 1)
219*4882a593Smuzhiyun #define SWSCI_GBDA_BOOT_DISPLAY_PREF SWSCI_FUNCTION_CODE(SWSCI_GBDA, 4)
220*4882a593Smuzhiyun #define SWSCI_GBDA_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 5)
221*4882a593Smuzhiyun #define SWSCI_GBDA_TV_STANDARD SWSCI_FUNCTION_CODE(SWSCI_GBDA, 6)
222*4882a593Smuzhiyun #define SWSCI_GBDA_INTERNAL_GRAPHICS SWSCI_FUNCTION_CODE(SWSCI_GBDA, 7)
223*4882a593Smuzhiyun #define SWSCI_GBDA_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_GBDA, 10)
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* SWSCI: System BIOS Callbacks (SBCB) */
226*4882a593Smuzhiyun #define SWSCI_SBCB 6
227*4882a593Smuzhiyun #define SWSCI_SBCB_SUPPORTED_CALLBACKS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 0)
228*4882a593Smuzhiyun #define SWSCI_SBCB_INIT_COMPLETION SWSCI_FUNCTION_CODE(SWSCI_SBCB, 1)
229*4882a593Smuzhiyun #define SWSCI_SBCB_PRE_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 3)
230*4882a593Smuzhiyun #define SWSCI_SBCB_POST_HIRES_SET_MODE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 4)
231*4882a593Smuzhiyun #define SWSCI_SBCB_DISPLAY_SWITCH SWSCI_FUNCTION_CODE(SWSCI_SBCB, 5)
232*4882a593Smuzhiyun #define SWSCI_SBCB_SET_TV_FORMAT SWSCI_FUNCTION_CODE(SWSCI_SBCB, 6)
233*4882a593Smuzhiyun #define SWSCI_SBCB_ADAPTER_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 7)
234*4882a593Smuzhiyun #define SWSCI_SBCB_DISPLAY_POWER_STATE SWSCI_FUNCTION_CODE(SWSCI_SBCB, 8)
235*4882a593Smuzhiyun #define SWSCI_SBCB_SET_BOOT_DISPLAY SWSCI_FUNCTION_CODE(SWSCI_SBCB, 9)
236*4882a593Smuzhiyun #define SWSCI_SBCB_SET_PANEL_DETAILS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 10)
237*4882a593Smuzhiyun #define SWSCI_SBCB_SET_INTERNAL_GFX SWSCI_FUNCTION_CODE(SWSCI_SBCB, 11)
238*4882a593Smuzhiyun #define SWSCI_SBCB_POST_HIRES_TO_DOS_FS SWSCI_FUNCTION_CODE(SWSCI_SBCB, 16)
239*4882a593Smuzhiyun #define SWSCI_SBCB_SUSPEND_RESUME SWSCI_FUNCTION_CODE(SWSCI_SBCB, 17)
240*4882a593Smuzhiyun #define SWSCI_SBCB_SET_SPREAD_SPECTRUM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 18)
241*4882a593Smuzhiyun #define SWSCI_SBCB_POST_VBE_PM SWSCI_FUNCTION_CODE(SWSCI_SBCB, 19)
242*4882a593Smuzhiyun #define SWSCI_SBCB_ENABLE_DISABLE_AUDIO SWSCI_FUNCTION_CODE(SWSCI_SBCB, 21)
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun #define MAX_DSLP 1500
245*4882a593Smuzhiyun
swsci(struct drm_i915_private * dev_priv,u32 function,u32 parm,u32 * parm_out)246*4882a593Smuzhiyun static int swsci(struct drm_i915_private *dev_priv,
247*4882a593Smuzhiyun u32 function, u32 parm, u32 *parm_out)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun struct opregion_swsci *swsci = dev_priv->opregion.swsci;
250*4882a593Smuzhiyun struct pci_dev *pdev = dev_priv->drm.pdev;
251*4882a593Smuzhiyun u32 main_function, sub_function, scic;
252*4882a593Smuzhiyun u16 swsci_val;
253*4882a593Smuzhiyun u32 dslp;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun if (!swsci)
256*4882a593Smuzhiyun return -ENODEV;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun main_function = (function & SWSCI_SCIC_MAIN_FUNCTION_MASK) >>
259*4882a593Smuzhiyun SWSCI_SCIC_MAIN_FUNCTION_SHIFT;
260*4882a593Smuzhiyun sub_function = (function & SWSCI_SCIC_SUB_FUNCTION_MASK) >>
261*4882a593Smuzhiyun SWSCI_SCIC_SUB_FUNCTION_SHIFT;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun /* Check if we can call the function. See swsci_setup for details. */
264*4882a593Smuzhiyun if (main_function == SWSCI_SBCB) {
265*4882a593Smuzhiyun if ((dev_priv->opregion.swsci_sbcb_sub_functions &
266*4882a593Smuzhiyun (1 << sub_function)) == 0)
267*4882a593Smuzhiyun return -EINVAL;
268*4882a593Smuzhiyun } else if (main_function == SWSCI_GBDA) {
269*4882a593Smuzhiyun if ((dev_priv->opregion.swsci_gbda_sub_functions &
270*4882a593Smuzhiyun (1 << sub_function)) == 0)
271*4882a593Smuzhiyun return -EINVAL;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun /* Driver sleep timeout in ms. */
275*4882a593Smuzhiyun dslp = swsci->dslp;
276*4882a593Smuzhiyun if (!dslp) {
277*4882a593Smuzhiyun /* The spec says 2ms should be the default, but it's too small
278*4882a593Smuzhiyun * for some machines. */
279*4882a593Smuzhiyun dslp = 50;
280*4882a593Smuzhiyun } else if (dslp > MAX_DSLP) {
281*4882a593Smuzhiyun /* Hey bios, trust must be earned. */
282*4882a593Smuzhiyun DRM_INFO_ONCE("ACPI BIOS requests an excessive sleep of %u ms, "
283*4882a593Smuzhiyun "using %u ms instead\n", dslp, MAX_DSLP);
284*4882a593Smuzhiyun dslp = MAX_DSLP;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun /* The spec tells us to do this, but we are the only user... */
288*4882a593Smuzhiyun scic = swsci->scic;
289*4882a593Smuzhiyun if (scic & SWSCI_SCIC_INDICATOR) {
290*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "SWSCI request already in progress\n");
291*4882a593Smuzhiyun return -EBUSY;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun scic = function | SWSCI_SCIC_INDICATOR;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun swsci->parm = parm;
297*4882a593Smuzhiyun swsci->scic = scic;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun /* Ensure SCI event is selected and event trigger is cleared. */
300*4882a593Smuzhiyun pci_read_config_word(pdev, SWSCI, &swsci_val);
301*4882a593Smuzhiyun if (!(swsci_val & SWSCI_SCISEL) || (swsci_val & SWSCI_GSSCIE)) {
302*4882a593Smuzhiyun swsci_val |= SWSCI_SCISEL;
303*4882a593Smuzhiyun swsci_val &= ~SWSCI_GSSCIE;
304*4882a593Smuzhiyun pci_write_config_word(pdev, SWSCI, swsci_val);
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun /* Use event trigger to tell bios to check the mail. */
308*4882a593Smuzhiyun swsci_val |= SWSCI_GSSCIE;
309*4882a593Smuzhiyun pci_write_config_word(pdev, SWSCI, swsci_val);
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun /* Poll for the result. */
312*4882a593Smuzhiyun #define C (((scic = swsci->scic) & SWSCI_SCIC_INDICATOR) == 0)
313*4882a593Smuzhiyun if (wait_for(C, dslp)) {
314*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "SWSCI request timed out\n");
315*4882a593Smuzhiyun return -ETIMEDOUT;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun scic = (scic & SWSCI_SCIC_EXIT_STATUS_MASK) >>
319*4882a593Smuzhiyun SWSCI_SCIC_EXIT_STATUS_SHIFT;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun /* Note: scic == 0 is an error! */
322*4882a593Smuzhiyun if (scic != SWSCI_SCIC_EXIT_STATUS_SUCCESS) {
323*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "SWSCI request error %u\n", scic);
324*4882a593Smuzhiyun return -EIO;
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun if (parm_out)
328*4882a593Smuzhiyun *parm_out = swsci->parm;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun return 0;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun #undef C
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun #define DISPLAY_TYPE_CRT 0
336*4882a593Smuzhiyun #define DISPLAY_TYPE_TV 1
337*4882a593Smuzhiyun #define DISPLAY_TYPE_EXTERNAL_FLAT_PANEL 2
338*4882a593Smuzhiyun #define DISPLAY_TYPE_INTERNAL_FLAT_PANEL 3
339*4882a593Smuzhiyun
intel_opregion_notify_encoder(struct intel_encoder * intel_encoder,bool enable)340*4882a593Smuzhiyun int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder,
341*4882a593Smuzhiyun bool enable)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
344*4882a593Smuzhiyun u32 parm = 0;
345*4882a593Smuzhiyun u32 type = 0;
346*4882a593Smuzhiyun u32 port;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun /* don't care about old stuff for now */
349*4882a593Smuzhiyun if (!HAS_DDI(dev_priv))
350*4882a593Smuzhiyun return 0;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun if (intel_encoder->type == INTEL_OUTPUT_DSI)
353*4882a593Smuzhiyun port = 0;
354*4882a593Smuzhiyun else
355*4882a593Smuzhiyun port = intel_encoder->port;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun if (port == PORT_E) {
358*4882a593Smuzhiyun port = 0;
359*4882a593Smuzhiyun } else {
360*4882a593Smuzhiyun parm |= 1 << port;
361*4882a593Smuzhiyun port++;
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun /*
365*4882a593Smuzhiyun * The port numbering and mapping here is bizarre. The now-obsolete
366*4882a593Smuzhiyun * swsci spec supports ports numbered [0..4]. Port E is handled as a
367*4882a593Smuzhiyun * special case, but port F and beyond are not. The functionality is
368*4882a593Smuzhiyun * supposed to be obsolete for new platforms. Just bail out if the port
369*4882a593Smuzhiyun * number is out of bounds after mapping.
370*4882a593Smuzhiyun */
371*4882a593Smuzhiyun if (port > 4) {
372*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm,
373*4882a593Smuzhiyun "[ENCODER:%d:%s] port %c (index %u) out of bounds for display power state notification\n",
374*4882a593Smuzhiyun intel_encoder->base.base.id, intel_encoder->base.name,
375*4882a593Smuzhiyun port_name(intel_encoder->port), port);
376*4882a593Smuzhiyun return -EINVAL;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun if (!enable)
380*4882a593Smuzhiyun parm |= 4 << 8;
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun switch (intel_encoder->type) {
383*4882a593Smuzhiyun case INTEL_OUTPUT_ANALOG:
384*4882a593Smuzhiyun type = DISPLAY_TYPE_CRT;
385*4882a593Smuzhiyun break;
386*4882a593Smuzhiyun case INTEL_OUTPUT_DDI:
387*4882a593Smuzhiyun case INTEL_OUTPUT_DP:
388*4882a593Smuzhiyun case INTEL_OUTPUT_HDMI:
389*4882a593Smuzhiyun case INTEL_OUTPUT_DP_MST:
390*4882a593Smuzhiyun type = DISPLAY_TYPE_EXTERNAL_FLAT_PANEL;
391*4882a593Smuzhiyun break;
392*4882a593Smuzhiyun case INTEL_OUTPUT_EDP:
393*4882a593Smuzhiyun case INTEL_OUTPUT_DSI:
394*4882a593Smuzhiyun type = DISPLAY_TYPE_INTERNAL_FLAT_PANEL;
395*4882a593Smuzhiyun break;
396*4882a593Smuzhiyun default:
397*4882a593Smuzhiyun drm_WARN_ONCE(&dev_priv->drm, 1,
398*4882a593Smuzhiyun "unsupported intel_encoder type %d\n",
399*4882a593Smuzhiyun intel_encoder->type);
400*4882a593Smuzhiyun return -EINVAL;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun parm |= type << (16 + port * 3);
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun return swsci(dev_priv, SWSCI_SBCB_DISPLAY_POWER_STATE, parm, NULL);
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun static const struct {
409*4882a593Smuzhiyun pci_power_t pci_power_state;
410*4882a593Smuzhiyun u32 parm;
411*4882a593Smuzhiyun } power_state_map[] = {
412*4882a593Smuzhiyun { PCI_D0, 0x00 },
413*4882a593Smuzhiyun { PCI_D1, 0x01 },
414*4882a593Smuzhiyun { PCI_D2, 0x02 },
415*4882a593Smuzhiyun { PCI_D3hot, 0x04 },
416*4882a593Smuzhiyun { PCI_D3cold, 0x04 },
417*4882a593Smuzhiyun };
418*4882a593Smuzhiyun
intel_opregion_notify_adapter(struct drm_i915_private * dev_priv,pci_power_t state)419*4882a593Smuzhiyun int intel_opregion_notify_adapter(struct drm_i915_private *dev_priv,
420*4882a593Smuzhiyun pci_power_t state)
421*4882a593Smuzhiyun {
422*4882a593Smuzhiyun int i;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun if (!HAS_DDI(dev_priv))
425*4882a593Smuzhiyun return 0;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(power_state_map); i++) {
428*4882a593Smuzhiyun if (state == power_state_map[i].pci_power_state)
429*4882a593Smuzhiyun return swsci(dev_priv, SWSCI_SBCB_ADAPTER_POWER_STATE,
430*4882a593Smuzhiyun power_state_map[i].parm, NULL);
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun return -EINVAL;
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun
asle_set_backlight(struct drm_i915_private * dev_priv,u32 bclp)436*4882a593Smuzhiyun static u32 asle_set_backlight(struct drm_i915_private *dev_priv, u32 bclp)
437*4882a593Smuzhiyun {
438*4882a593Smuzhiyun struct intel_connector *connector;
439*4882a593Smuzhiyun struct drm_connector_list_iter conn_iter;
440*4882a593Smuzhiyun struct opregion_asle *asle = dev_priv->opregion.asle;
441*4882a593Smuzhiyun struct drm_device *dev = &dev_priv->drm;
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "bclp = 0x%08x\n", bclp);
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun if (acpi_video_get_backlight_type() == acpi_backlight_native) {
446*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm,
447*4882a593Smuzhiyun "opregion backlight request ignored\n");
448*4882a593Smuzhiyun return 0;
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun if (!(bclp & ASLE_BCLP_VALID))
452*4882a593Smuzhiyun return ASLC_BACKLIGHT_FAILED;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun bclp &= ASLE_BCLP_MSK;
455*4882a593Smuzhiyun if (bclp > 255)
456*4882a593Smuzhiyun return ASLC_BACKLIGHT_FAILED;
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun /*
461*4882a593Smuzhiyun * Update backlight on all connectors that support backlight (usually
462*4882a593Smuzhiyun * only one).
463*4882a593Smuzhiyun */
464*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm, "updating opregion backlight %d/255\n",
465*4882a593Smuzhiyun bclp);
466*4882a593Smuzhiyun drm_connector_list_iter_begin(dev, &conn_iter);
467*4882a593Smuzhiyun for_each_intel_connector_iter(connector, &conn_iter)
468*4882a593Smuzhiyun intel_panel_set_backlight_acpi(connector->base.state, bclp, 255);
469*4882a593Smuzhiyun drm_connector_list_iter_end(&conn_iter);
470*4882a593Smuzhiyun asle->cblv = DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun drm_modeset_unlock(&dev->mode_config.connection_mutex);
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun return 0;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun
asle_set_als_illum(struct drm_i915_private * dev_priv,u32 alsi)478*4882a593Smuzhiyun static u32 asle_set_als_illum(struct drm_i915_private *dev_priv, u32 alsi)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun /* alsi is the current ALS reading in lux. 0 indicates below sensor
481*4882a593Smuzhiyun range, 0xffff indicates above sensor range. 1-0xfffe are valid */
482*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "Illum is not supported\n");
483*4882a593Smuzhiyun return ASLC_ALS_ILLUM_FAILED;
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun
asle_set_pwm_freq(struct drm_i915_private * dev_priv,u32 pfmb)486*4882a593Smuzhiyun static u32 asle_set_pwm_freq(struct drm_i915_private *dev_priv, u32 pfmb)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "PWM freq is not supported\n");
489*4882a593Smuzhiyun return ASLC_PWM_FREQ_FAILED;
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun
asle_set_pfit(struct drm_i915_private * dev_priv,u32 pfit)492*4882a593Smuzhiyun static u32 asle_set_pfit(struct drm_i915_private *dev_priv, u32 pfit)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun /* Panel fitting is currently controlled by the X code, so this is a
495*4882a593Smuzhiyun noop until modesetting support works fully */
496*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "Pfit is not supported\n");
497*4882a593Smuzhiyun return ASLC_PFIT_FAILED;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun
asle_set_supported_rotation_angles(struct drm_i915_private * dev_priv,u32 srot)500*4882a593Smuzhiyun static u32 asle_set_supported_rotation_angles(struct drm_i915_private *dev_priv, u32 srot)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "SROT is not supported\n");
503*4882a593Smuzhiyun return ASLC_ROTATION_ANGLES_FAILED;
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun
asle_set_button_array(struct drm_i915_private * dev_priv,u32 iuer)506*4882a593Smuzhiyun static u32 asle_set_button_array(struct drm_i915_private *dev_priv, u32 iuer)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun if (!iuer)
509*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
510*4882a593Smuzhiyun "Button array event is not supported (nothing)\n");
511*4882a593Smuzhiyun if (iuer & ASLE_IUER_ROTATION_LOCK_BTN)
512*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
513*4882a593Smuzhiyun "Button array event is not supported (rotation lock)\n");
514*4882a593Smuzhiyun if (iuer & ASLE_IUER_VOLUME_DOWN_BTN)
515*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
516*4882a593Smuzhiyun "Button array event is not supported (volume down)\n");
517*4882a593Smuzhiyun if (iuer & ASLE_IUER_VOLUME_UP_BTN)
518*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
519*4882a593Smuzhiyun "Button array event is not supported (volume up)\n");
520*4882a593Smuzhiyun if (iuer & ASLE_IUER_WINDOWS_BTN)
521*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
522*4882a593Smuzhiyun "Button array event is not supported (windows)\n");
523*4882a593Smuzhiyun if (iuer & ASLE_IUER_POWER_BTN)
524*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
525*4882a593Smuzhiyun "Button array event is not supported (power)\n");
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun return ASLC_BUTTON_ARRAY_FAILED;
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun
asle_set_convertible(struct drm_i915_private * dev_priv,u32 iuer)530*4882a593Smuzhiyun static u32 asle_set_convertible(struct drm_i915_private *dev_priv, u32 iuer)
531*4882a593Smuzhiyun {
532*4882a593Smuzhiyun if (iuer & ASLE_IUER_CONVERTIBLE)
533*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
534*4882a593Smuzhiyun "Convertible is not supported (clamshell)\n");
535*4882a593Smuzhiyun else
536*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
537*4882a593Smuzhiyun "Convertible is not supported (slate)\n");
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun return ASLC_CONVERTIBLE_FAILED;
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun
asle_set_docking(struct drm_i915_private * dev_priv,u32 iuer)542*4882a593Smuzhiyun static u32 asle_set_docking(struct drm_i915_private *dev_priv, u32 iuer)
543*4882a593Smuzhiyun {
544*4882a593Smuzhiyun if (iuer & ASLE_IUER_DOCKING)
545*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "Docking is not supported (docked)\n");
546*4882a593Smuzhiyun else
547*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
548*4882a593Smuzhiyun "Docking is not supported (undocked)\n");
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun return ASLC_DOCKING_FAILED;
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
asle_isct_state(struct drm_i915_private * dev_priv)553*4882a593Smuzhiyun static u32 asle_isct_state(struct drm_i915_private *dev_priv)
554*4882a593Smuzhiyun {
555*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "ISCT is not supported\n");
556*4882a593Smuzhiyun return ASLC_ISCT_STATE_FAILED;
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun
asle_work(struct work_struct * work)559*4882a593Smuzhiyun static void asle_work(struct work_struct *work)
560*4882a593Smuzhiyun {
561*4882a593Smuzhiyun struct intel_opregion *opregion =
562*4882a593Smuzhiyun container_of(work, struct intel_opregion, asle_work);
563*4882a593Smuzhiyun struct drm_i915_private *dev_priv =
564*4882a593Smuzhiyun container_of(opregion, struct drm_i915_private, opregion);
565*4882a593Smuzhiyun struct opregion_asle *asle = dev_priv->opregion.asle;
566*4882a593Smuzhiyun u32 aslc_stat = 0;
567*4882a593Smuzhiyun u32 aslc_req;
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun if (!asle)
570*4882a593Smuzhiyun return;
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun aslc_req = asle->aslc;
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun if (!(aslc_req & ASLC_REQ_MSK)) {
575*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
576*4882a593Smuzhiyun "No request on ASLC interrupt 0x%08x\n", aslc_req);
577*4882a593Smuzhiyun return;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun if (aslc_req & ASLC_SET_ALS_ILLUM)
581*4882a593Smuzhiyun aslc_stat |= asle_set_als_illum(dev_priv, asle->alsi);
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun if (aslc_req & ASLC_SET_BACKLIGHT)
584*4882a593Smuzhiyun aslc_stat |= asle_set_backlight(dev_priv, asle->bclp);
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun if (aslc_req & ASLC_SET_PFIT)
587*4882a593Smuzhiyun aslc_stat |= asle_set_pfit(dev_priv, asle->pfit);
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun if (aslc_req & ASLC_SET_PWM_FREQ)
590*4882a593Smuzhiyun aslc_stat |= asle_set_pwm_freq(dev_priv, asle->pfmb);
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun if (aslc_req & ASLC_SUPPORTED_ROTATION_ANGLES)
593*4882a593Smuzhiyun aslc_stat |= asle_set_supported_rotation_angles(dev_priv,
594*4882a593Smuzhiyun asle->srot);
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun if (aslc_req & ASLC_BUTTON_ARRAY)
597*4882a593Smuzhiyun aslc_stat |= asle_set_button_array(dev_priv, asle->iuer);
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun if (aslc_req & ASLC_CONVERTIBLE_INDICATOR)
600*4882a593Smuzhiyun aslc_stat |= asle_set_convertible(dev_priv, asle->iuer);
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun if (aslc_req & ASLC_DOCKING_INDICATOR)
603*4882a593Smuzhiyun aslc_stat |= asle_set_docking(dev_priv, asle->iuer);
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun if (aslc_req & ASLC_ISCT_STATE_CHANGE)
606*4882a593Smuzhiyun aslc_stat |= asle_isct_state(dev_priv);
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun asle->aslc = aslc_stat;
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun
intel_opregion_asle_intr(struct drm_i915_private * dev_priv)611*4882a593Smuzhiyun void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
612*4882a593Smuzhiyun {
613*4882a593Smuzhiyun if (dev_priv->opregion.asle)
614*4882a593Smuzhiyun schedule_work(&dev_priv->opregion.asle_work);
615*4882a593Smuzhiyun }
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun #define ACPI_EV_DISPLAY_SWITCH (1<<0)
618*4882a593Smuzhiyun #define ACPI_EV_LID (1<<1)
619*4882a593Smuzhiyun #define ACPI_EV_DOCK (1<<2)
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun /*
622*4882a593Smuzhiyun * The only video events relevant to opregion are 0x80. These indicate either a
623*4882a593Smuzhiyun * docking event, lid switch or display switch request. In Linux, these are
624*4882a593Smuzhiyun * handled by the dock, button and video drivers.
625*4882a593Smuzhiyun */
intel_opregion_video_event(struct notifier_block * nb,unsigned long val,void * data)626*4882a593Smuzhiyun static int intel_opregion_video_event(struct notifier_block *nb,
627*4882a593Smuzhiyun unsigned long val, void *data)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun struct intel_opregion *opregion = container_of(nb, struct intel_opregion,
630*4882a593Smuzhiyun acpi_notifier);
631*4882a593Smuzhiyun struct acpi_bus_event *event = data;
632*4882a593Smuzhiyun struct opregion_acpi *acpi;
633*4882a593Smuzhiyun int ret = NOTIFY_OK;
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0)
636*4882a593Smuzhiyun return NOTIFY_DONE;
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun acpi = opregion->acpi;
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun if (event->type == 0x80 && ((acpi->cevt & 1) == 0))
641*4882a593Smuzhiyun ret = NOTIFY_BAD;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun acpi->csts = 0;
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun return ret;
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun /*
649*4882a593Smuzhiyun * Initialise the DIDL field in opregion. This passes a list of devices to
650*4882a593Smuzhiyun * the firmware. Values are defined by section B.4.2 of the ACPI specification
651*4882a593Smuzhiyun * (version 3)
652*4882a593Smuzhiyun */
653*4882a593Smuzhiyun
set_did(struct intel_opregion * opregion,int i,u32 val)654*4882a593Smuzhiyun static void set_did(struct intel_opregion *opregion, int i, u32 val)
655*4882a593Smuzhiyun {
656*4882a593Smuzhiyun if (i < ARRAY_SIZE(opregion->acpi->didl)) {
657*4882a593Smuzhiyun opregion->acpi->didl[i] = val;
658*4882a593Smuzhiyun } else {
659*4882a593Smuzhiyun i -= ARRAY_SIZE(opregion->acpi->didl);
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun if (WARN_ON(i >= ARRAY_SIZE(opregion->acpi->did2)))
662*4882a593Smuzhiyun return;
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun opregion->acpi->did2[i] = val;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun
intel_didl_outputs(struct drm_i915_private * dev_priv)668*4882a593Smuzhiyun static void intel_didl_outputs(struct drm_i915_private *dev_priv)
669*4882a593Smuzhiyun {
670*4882a593Smuzhiyun struct intel_opregion *opregion = &dev_priv->opregion;
671*4882a593Smuzhiyun struct intel_connector *connector;
672*4882a593Smuzhiyun struct drm_connector_list_iter conn_iter;
673*4882a593Smuzhiyun int i = 0, max_outputs;
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun /*
676*4882a593Smuzhiyun * In theory, did2, the extended didl, gets added at opregion version
677*4882a593Smuzhiyun * 3.0. In practice, however, we're supposed to set it for earlier
678*4882a593Smuzhiyun * versions as well, since a BIOS that doesn't understand did2 should
679*4882a593Smuzhiyun * not look at it anyway. Use a variable so we can tweak this if a need
680*4882a593Smuzhiyun * arises later.
681*4882a593Smuzhiyun */
682*4882a593Smuzhiyun max_outputs = ARRAY_SIZE(opregion->acpi->didl) +
683*4882a593Smuzhiyun ARRAY_SIZE(opregion->acpi->did2);
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun intel_acpi_device_id_update(dev_priv);
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
688*4882a593Smuzhiyun for_each_intel_connector_iter(connector, &conn_iter) {
689*4882a593Smuzhiyun if (i < max_outputs)
690*4882a593Smuzhiyun set_did(opregion, i, connector->acpi_device_id);
691*4882a593Smuzhiyun i++;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun drm_connector_list_iter_end(&conn_iter);
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm, "%d outputs detected\n", i);
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun if (i > max_outputs)
698*4882a593Smuzhiyun drm_err(&dev_priv->drm,
699*4882a593Smuzhiyun "More than %d outputs in connector list\n",
700*4882a593Smuzhiyun max_outputs);
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun /* If fewer than max outputs, the list must be null terminated */
703*4882a593Smuzhiyun if (i < max_outputs)
704*4882a593Smuzhiyun set_did(opregion, i, 0);
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun
intel_setup_cadls(struct drm_i915_private * dev_priv)707*4882a593Smuzhiyun static void intel_setup_cadls(struct drm_i915_private *dev_priv)
708*4882a593Smuzhiyun {
709*4882a593Smuzhiyun struct intel_opregion *opregion = &dev_priv->opregion;
710*4882a593Smuzhiyun struct intel_connector *connector;
711*4882a593Smuzhiyun struct drm_connector_list_iter conn_iter;
712*4882a593Smuzhiyun int i = 0;
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun /*
715*4882a593Smuzhiyun * Initialize the CADL field from the connector device ids. This is
716*4882a593Smuzhiyun * essentially the same as copying from the DIDL. Technically, this is
717*4882a593Smuzhiyun * not always correct as display outputs may exist, but not active. This
718*4882a593Smuzhiyun * initialization is necessary for some Clevo laptops that check this
719*4882a593Smuzhiyun * field before processing the brightness and display switching hotkeys.
720*4882a593Smuzhiyun *
721*4882a593Smuzhiyun * Note that internal panels should be at the front of the connector
722*4882a593Smuzhiyun * list already, ensuring they're not left out.
723*4882a593Smuzhiyun */
724*4882a593Smuzhiyun drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
725*4882a593Smuzhiyun for_each_intel_connector_iter(connector, &conn_iter) {
726*4882a593Smuzhiyun if (i >= ARRAY_SIZE(opregion->acpi->cadl))
727*4882a593Smuzhiyun break;
728*4882a593Smuzhiyun opregion->acpi->cadl[i++] = connector->acpi_device_id;
729*4882a593Smuzhiyun }
730*4882a593Smuzhiyun drm_connector_list_iter_end(&conn_iter);
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun /* If fewer than 8 active devices, the list must be null terminated */
733*4882a593Smuzhiyun if (i < ARRAY_SIZE(opregion->acpi->cadl))
734*4882a593Smuzhiyun opregion->acpi->cadl[i] = 0;
735*4882a593Smuzhiyun }
736*4882a593Smuzhiyun
swsci_setup(struct drm_i915_private * dev_priv)737*4882a593Smuzhiyun static void swsci_setup(struct drm_i915_private *dev_priv)
738*4882a593Smuzhiyun {
739*4882a593Smuzhiyun struct intel_opregion *opregion = &dev_priv->opregion;
740*4882a593Smuzhiyun bool requested_callbacks = false;
741*4882a593Smuzhiyun u32 tmp;
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun /* Sub-function code 0 is okay, let's allow them. */
744*4882a593Smuzhiyun opregion->swsci_gbda_sub_functions = 1;
745*4882a593Smuzhiyun opregion->swsci_sbcb_sub_functions = 1;
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun /* We use GBDA to ask for supported GBDA calls. */
748*4882a593Smuzhiyun if (swsci(dev_priv, SWSCI_GBDA_SUPPORTED_CALLS, 0, &tmp) == 0) {
749*4882a593Smuzhiyun /* make the bits match the sub-function codes */
750*4882a593Smuzhiyun tmp <<= 1;
751*4882a593Smuzhiyun opregion->swsci_gbda_sub_functions |= tmp;
752*4882a593Smuzhiyun }
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun /*
755*4882a593Smuzhiyun * We also use GBDA to ask for _requested_ SBCB callbacks. The driver
756*4882a593Smuzhiyun * must not call interfaces that are not specifically requested by the
757*4882a593Smuzhiyun * bios.
758*4882a593Smuzhiyun */
759*4882a593Smuzhiyun if (swsci(dev_priv, SWSCI_GBDA_REQUESTED_CALLBACKS, 0, &tmp) == 0) {
760*4882a593Smuzhiyun /* here, the bits already match sub-function codes */
761*4882a593Smuzhiyun opregion->swsci_sbcb_sub_functions |= tmp;
762*4882a593Smuzhiyun requested_callbacks = true;
763*4882a593Smuzhiyun }
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun /*
766*4882a593Smuzhiyun * But we use SBCB to ask for _supported_ SBCB calls. This does not mean
767*4882a593Smuzhiyun * the callback is _requested_. But we still can't call interfaces that
768*4882a593Smuzhiyun * are not requested.
769*4882a593Smuzhiyun */
770*4882a593Smuzhiyun if (swsci(dev_priv, SWSCI_SBCB_SUPPORTED_CALLBACKS, 0, &tmp) == 0) {
771*4882a593Smuzhiyun /* make the bits match the sub-function codes */
772*4882a593Smuzhiyun u32 low = tmp & 0x7ff;
773*4882a593Smuzhiyun u32 high = tmp & ~0xfff; /* bit 11 is reserved */
774*4882a593Smuzhiyun tmp = (high << 4) | (low << 1) | 1;
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun /* best guess what to do with supported wrt requested */
777*4882a593Smuzhiyun if (requested_callbacks) {
778*4882a593Smuzhiyun u32 req = opregion->swsci_sbcb_sub_functions;
779*4882a593Smuzhiyun if ((req & tmp) != req)
780*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
781*4882a593Smuzhiyun "SWSCI BIOS requested (%08x) SBCB callbacks that are not supported (%08x)\n",
782*4882a593Smuzhiyun req, tmp);
783*4882a593Smuzhiyun /* XXX: for now, trust the requested callbacks */
784*4882a593Smuzhiyun /* opregion->swsci_sbcb_sub_functions &= tmp; */
785*4882a593Smuzhiyun } else {
786*4882a593Smuzhiyun opregion->swsci_sbcb_sub_functions |= tmp;
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun }
789*4882a593Smuzhiyun
790*4882a593Smuzhiyun drm_dbg(&dev_priv->drm,
791*4882a593Smuzhiyun "SWSCI GBDA callbacks %08x, SBCB callbacks %08x\n",
792*4882a593Smuzhiyun opregion->swsci_gbda_sub_functions,
793*4882a593Smuzhiyun opregion->swsci_sbcb_sub_functions);
794*4882a593Smuzhiyun }
795*4882a593Smuzhiyun
intel_no_opregion_vbt_callback(const struct dmi_system_id * id)796*4882a593Smuzhiyun static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
797*4882a593Smuzhiyun {
798*4882a593Smuzhiyun DRM_DEBUG_KMS("Falling back to manually reading VBT from "
799*4882a593Smuzhiyun "VBIOS ROM for %s\n", id->ident);
800*4882a593Smuzhiyun return 1;
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun static const struct dmi_system_id intel_no_opregion_vbt[] = {
804*4882a593Smuzhiyun {
805*4882a593Smuzhiyun .callback = intel_no_opregion_vbt_callback,
806*4882a593Smuzhiyun .ident = "ThinkCentre A57",
807*4882a593Smuzhiyun .matches = {
808*4882a593Smuzhiyun DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
809*4882a593Smuzhiyun DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
810*4882a593Smuzhiyun },
811*4882a593Smuzhiyun },
812*4882a593Smuzhiyun { }
813*4882a593Smuzhiyun };
814*4882a593Smuzhiyun
intel_load_vbt_firmware(struct drm_i915_private * dev_priv)815*4882a593Smuzhiyun static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
816*4882a593Smuzhiyun {
817*4882a593Smuzhiyun struct intel_opregion *opregion = &dev_priv->opregion;
818*4882a593Smuzhiyun const struct firmware *fw = NULL;
819*4882a593Smuzhiyun const char *name = dev_priv->params.vbt_firmware;
820*4882a593Smuzhiyun int ret;
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun if (!name || !*name)
823*4882a593Smuzhiyun return -ENOENT;
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun ret = request_firmware(&fw, name, &dev_priv->drm.pdev->dev);
826*4882a593Smuzhiyun if (ret) {
827*4882a593Smuzhiyun drm_err(&dev_priv->drm,
828*4882a593Smuzhiyun "Requesting VBT firmware \"%s\" failed (%d)\n",
829*4882a593Smuzhiyun name, ret);
830*4882a593Smuzhiyun return ret;
831*4882a593Smuzhiyun }
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun if (intel_bios_is_valid_vbt(fw->data, fw->size)) {
834*4882a593Smuzhiyun opregion->vbt_firmware = kmemdup(fw->data, fw->size, GFP_KERNEL);
835*4882a593Smuzhiyun if (opregion->vbt_firmware) {
836*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm,
837*4882a593Smuzhiyun "Found valid VBT firmware \"%s\"\n", name);
838*4882a593Smuzhiyun opregion->vbt = opregion->vbt_firmware;
839*4882a593Smuzhiyun opregion->vbt_size = fw->size;
840*4882a593Smuzhiyun ret = 0;
841*4882a593Smuzhiyun } else {
842*4882a593Smuzhiyun ret = -ENOMEM;
843*4882a593Smuzhiyun }
844*4882a593Smuzhiyun } else {
845*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm, "Invalid VBT firmware \"%s\"\n",
846*4882a593Smuzhiyun name);
847*4882a593Smuzhiyun ret = -EINVAL;
848*4882a593Smuzhiyun }
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun release_firmware(fw);
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun return ret;
853*4882a593Smuzhiyun }
854*4882a593Smuzhiyun
intel_opregion_setup(struct drm_i915_private * dev_priv)855*4882a593Smuzhiyun int intel_opregion_setup(struct drm_i915_private *dev_priv)
856*4882a593Smuzhiyun {
857*4882a593Smuzhiyun struct intel_opregion *opregion = &dev_priv->opregion;
858*4882a593Smuzhiyun struct pci_dev *pdev = dev_priv->drm.pdev;
859*4882a593Smuzhiyun u32 asls, mboxes;
860*4882a593Smuzhiyun char buf[sizeof(OPREGION_SIGNATURE)];
861*4882a593Smuzhiyun int err = 0;
862*4882a593Smuzhiyun void *base;
863*4882a593Smuzhiyun const void *vbt;
864*4882a593Smuzhiyun u32 vbt_size;
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct opregion_header) != 0x100);
867*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct opregion_acpi) != 0x100);
868*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct opregion_swsci) != 0x100);
869*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct opregion_asle) != 0x100);
870*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct opregion_asle_ext) != 0x400);
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun pci_read_config_dword(pdev, ASLS, &asls);
873*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "graphic opregion physical addr: 0x%x\n",
874*4882a593Smuzhiyun asls);
875*4882a593Smuzhiyun if (asls == 0) {
876*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "ACPI OpRegion not supported!\n");
877*4882a593Smuzhiyun return -ENOTSUPP;
878*4882a593Smuzhiyun }
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun INIT_WORK(&opregion->asle_work, asle_work);
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun base = memremap(asls, OPREGION_SIZE, MEMREMAP_WB);
883*4882a593Smuzhiyun if (!base)
884*4882a593Smuzhiyun return -ENOMEM;
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun memcpy(buf, base, sizeof(buf));
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun if (memcmp(buf, OPREGION_SIGNATURE, 16)) {
889*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "opregion signature mismatch\n");
890*4882a593Smuzhiyun err = -EINVAL;
891*4882a593Smuzhiyun goto err_out;
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun opregion->header = base;
894*4882a593Smuzhiyun opregion->lid_state = base + ACPI_CLID;
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "ACPI OpRegion version %u.%u.%u\n",
897*4882a593Smuzhiyun opregion->header->over.major,
898*4882a593Smuzhiyun opregion->header->over.minor,
899*4882a593Smuzhiyun opregion->header->over.revision);
900*4882a593Smuzhiyun
901*4882a593Smuzhiyun mboxes = opregion->header->mboxes;
902*4882a593Smuzhiyun if (mboxes & MBOX_ACPI) {
903*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "Public ACPI methods supported\n");
904*4882a593Smuzhiyun opregion->acpi = base + OPREGION_ACPI_OFFSET;
905*4882a593Smuzhiyun /*
906*4882a593Smuzhiyun * Indicate we handle monitor hotplug events ourselves so we do
907*4882a593Smuzhiyun * not need ACPI notifications for them. Disabling these avoids
908*4882a593Smuzhiyun * triggering the AML code doing the notifation, which may be
909*4882a593Smuzhiyun * broken as Windows also seems to disable these.
910*4882a593Smuzhiyun */
911*4882a593Smuzhiyun opregion->acpi->chpd = 1;
912*4882a593Smuzhiyun }
913*4882a593Smuzhiyun
914*4882a593Smuzhiyun if (mboxes & MBOX_SWSCI) {
915*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "SWSCI supported\n");
916*4882a593Smuzhiyun opregion->swsci = base + OPREGION_SWSCI_OFFSET;
917*4882a593Smuzhiyun swsci_setup(dev_priv);
918*4882a593Smuzhiyun }
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun if (mboxes & MBOX_ASLE) {
921*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "ASLE supported\n");
922*4882a593Smuzhiyun opregion->asle = base + OPREGION_ASLE_OFFSET;
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun opregion->asle->ardy = ASLE_ARDY_NOT_READY;
925*4882a593Smuzhiyun }
926*4882a593Smuzhiyun
927*4882a593Smuzhiyun if (mboxes & MBOX_ASLE_EXT)
928*4882a593Smuzhiyun drm_dbg(&dev_priv->drm, "ASLE extension supported\n");
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun if (intel_load_vbt_firmware(dev_priv) == 0)
931*4882a593Smuzhiyun goto out;
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun if (dmi_check_system(intel_no_opregion_vbt))
934*4882a593Smuzhiyun goto out;
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun if (opregion->header->over.major >= 2 && opregion->asle &&
937*4882a593Smuzhiyun opregion->asle->rvda && opregion->asle->rvds) {
938*4882a593Smuzhiyun resource_size_t rvda = opregion->asle->rvda;
939*4882a593Smuzhiyun
940*4882a593Smuzhiyun /*
941*4882a593Smuzhiyun * opregion 2.0: rvda is the physical VBT address.
942*4882a593Smuzhiyun *
943*4882a593Smuzhiyun * opregion 2.1+: rvda is unsigned, relative offset from
944*4882a593Smuzhiyun * opregion base, and should never point within opregion.
945*4882a593Smuzhiyun */
946*4882a593Smuzhiyun if (opregion->header->over.major > 2 ||
947*4882a593Smuzhiyun opregion->header->over.minor >= 1) {
948*4882a593Smuzhiyun drm_WARN_ON(&dev_priv->drm, rvda < OPREGION_SIZE);
949*4882a593Smuzhiyun
950*4882a593Smuzhiyun rvda += asls;
951*4882a593Smuzhiyun }
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun opregion->rvda = memremap(rvda, opregion->asle->rvds,
954*4882a593Smuzhiyun MEMREMAP_WB);
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun vbt = opregion->rvda;
957*4882a593Smuzhiyun vbt_size = opregion->asle->rvds;
958*4882a593Smuzhiyun if (intel_bios_is_valid_vbt(vbt, vbt_size)) {
959*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm,
960*4882a593Smuzhiyun "Found valid VBT in ACPI OpRegion (RVDA)\n");
961*4882a593Smuzhiyun opregion->vbt = vbt;
962*4882a593Smuzhiyun opregion->vbt_size = vbt_size;
963*4882a593Smuzhiyun goto out;
964*4882a593Smuzhiyun } else {
965*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm,
966*4882a593Smuzhiyun "Invalid VBT in ACPI OpRegion (RVDA)\n");
967*4882a593Smuzhiyun memunmap(opregion->rvda);
968*4882a593Smuzhiyun opregion->rvda = NULL;
969*4882a593Smuzhiyun }
970*4882a593Smuzhiyun }
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun vbt = base + OPREGION_VBT_OFFSET;
973*4882a593Smuzhiyun /*
974*4882a593Smuzhiyun * The VBT specification says that if the ASLE ext mailbox is not used
975*4882a593Smuzhiyun * its area is reserved, but on some CHT boards the VBT extends into the
976*4882a593Smuzhiyun * ASLE ext area. Allow this even though it is against the spec, so we
977*4882a593Smuzhiyun * do not end up rejecting the VBT on those boards (and end up not
978*4882a593Smuzhiyun * finding the LCD panel because of this).
979*4882a593Smuzhiyun */
980*4882a593Smuzhiyun vbt_size = (mboxes & MBOX_ASLE_EXT) ?
981*4882a593Smuzhiyun OPREGION_ASLE_EXT_OFFSET : OPREGION_SIZE;
982*4882a593Smuzhiyun vbt_size -= OPREGION_VBT_OFFSET;
983*4882a593Smuzhiyun if (intel_bios_is_valid_vbt(vbt, vbt_size)) {
984*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm,
985*4882a593Smuzhiyun "Found valid VBT in ACPI OpRegion (Mailbox #4)\n");
986*4882a593Smuzhiyun opregion->vbt = vbt;
987*4882a593Smuzhiyun opregion->vbt_size = vbt_size;
988*4882a593Smuzhiyun } else {
989*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm,
990*4882a593Smuzhiyun "Invalid VBT in ACPI OpRegion (Mailbox #4)\n");
991*4882a593Smuzhiyun }
992*4882a593Smuzhiyun
993*4882a593Smuzhiyun out:
994*4882a593Smuzhiyun return 0;
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun err_out:
997*4882a593Smuzhiyun memunmap(base);
998*4882a593Smuzhiyun return err;
999*4882a593Smuzhiyun }
1000*4882a593Smuzhiyun
intel_use_opregion_panel_type_callback(const struct dmi_system_id * id)1001*4882a593Smuzhiyun static int intel_use_opregion_panel_type_callback(const struct dmi_system_id *id)
1002*4882a593Smuzhiyun {
1003*4882a593Smuzhiyun DRM_INFO("Using panel type from OpRegion on %s\n", id->ident);
1004*4882a593Smuzhiyun return 1;
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun
1007*4882a593Smuzhiyun static const struct dmi_system_id intel_use_opregion_panel_type[] = {
1008*4882a593Smuzhiyun {
1009*4882a593Smuzhiyun .callback = intel_use_opregion_panel_type_callback,
1010*4882a593Smuzhiyun .ident = "Conrac GmbH IX45GM2",
1011*4882a593Smuzhiyun .matches = {DMI_MATCH(DMI_SYS_VENDOR, "Conrac GmbH"),
1012*4882a593Smuzhiyun DMI_MATCH(DMI_PRODUCT_NAME, "IX45GM2"),
1013*4882a593Smuzhiyun },
1014*4882a593Smuzhiyun },
1015*4882a593Smuzhiyun { }
1016*4882a593Smuzhiyun };
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun int
intel_opregion_get_panel_type(struct drm_i915_private * dev_priv)1019*4882a593Smuzhiyun intel_opregion_get_panel_type(struct drm_i915_private *dev_priv)
1020*4882a593Smuzhiyun {
1021*4882a593Smuzhiyun u32 panel_details;
1022*4882a593Smuzhiyun int ret;
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun ret = swsci(dev_priv, SWSCI_GBDA_PANEL_DETAILS, 0x0, &panel_details);
1025*4882a593Smuzhiyun if (ret) {
1026*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm,
1027*4882a593Smuzhiyun "Failed to get panel details from OpRegion (%d)\n",
1028*4882a593Smuzhiyun ret);
1029*4882a593Smuzhiyun return ret;
1030*4882a593Smuzhiyun }
1031*4882a593Smuzhiyun
1032*4882a593Smuzhiyun ret = (panel_details >> 8) & 0xff;
1033*4882a593Smuzhiyun if (ret > 0x10) {
1034*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm,
1035*4882a593Smuzhiyun "Invalid OpRegion panel type 0x%x\n", ret);
1036*4882a593Smuzhiyun return -EINVAL;
1037*4882a593Smuzhiyun }
1038*4882a593Smuzhiyun
1039*4882a593Smuzhiyun /* fall back to VBT panel type? */
1040*4882a593Smuzhiyun if (ret == 0x0) {
1041*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm, "No panel type in OpRegion\n");
1042*4882a593Smuzhiyun return -ENODEV;
1043*4882a593Smuzhiyun }
1044*4882a593Smuzhiyun
1045*4882a593Smuzhiyun /*
1046*4882a593Smuzhiyun * So far we know that some machined must use it, others must not use it.
1047*4882a593Smuzhiyun * There doesn't seem to be any way to determine which way to go, except
1048*4882a593Smuzhiyun * via a quirk list :(
1049*4882a593Smuzhiyun */
1050*4882a593Smuzhiyun if (!dmi_check_system(intel_use_opregion_panel_type)) {
1051*4882a593Smuzhiyun drm_dbg_kms(&dev_priv->drm,
1052*4882a593Smuzhiyun "Ignoring OpRegion panel type (%d)\n", ret - 1);
1053*4882a593Smuzhiyun return -ENODEV;
1054*4882a593Smuzhiyun }
1055*4882a593Smuzhiyun
1056*4882a593Smuzhiyun return ret - 1;
1057*4882a593Smuzhiyun }
1058*4882a593Smuzhiyun
intel_opregion_register(struct drm_i915_private * i915)1059*4882a593Smuzhiyun void intel_opregion_register(struct drm_i915_private *i915)
1060*4882a593Smuzhiyun {
1061*4882a593Smuzhiyun struct intel_opregion *opregion = &i915->opregion;
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun if (!opregion->header)
1064*4882a593Smuzhiyun return;
1065*4882a593Smuzhiyun
1066*4882a593Smuzhiyun if (opregion->acpi) {
1067*4882a593Smuzhiyun opregion->acpi_notifier.notifier_call =
1068*4882a593Smuzhiyun intel_opregion_video_event;
1069*4882a593Smuzhiyun register_acpi_notifier(&opregion->acpi_notifier);
1070*4882a593Smuzhiyun }
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun intel_opregion_resume(i915);
1073*4882a593Smuzhiyun }
1074*4882a593Smuzhiyun
intel_opregion_resume(struct drm_i915_private * i915)1075*4882a593Smuzhiyun void intel_opregion_resume(struct drm_i915_private *i915)
1076*4882a593Smuzhiyun {
1077*4882a593Smuzhiyun struct intel_opregion *opregion = &i915->opregion;
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun if (!opregion->header)
1080*4882a593Smuzhiyun return;
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun if (opregion->acpi) {
1083*4882a593Smuzhiyun intel_didl_outputs(i915);
1084*4882a593Smuzhiyun intel_setup_cadls(i915);
1085*4882a593Smuzhiyun
1086*4882a593Smuzhiyun /*
1087*4882a593Smuzhiyun * Notify BIOS we are ready to handle ACPI video ext notifs.
1088*4882a593Smuzhiyun * Right now, all the events are handled by the ACPI video
1089*4882a593Smuzhiyun * module. We don't actually need to do anything with them.
1090*4882a593Smuzhiyun */
1091*4882a593Smuzhiyun opregion->acpi->csts = 0;
1092*4882a593Smuzhiyun opregion->acpi->drdy = 1;
1093*4882a593Smuzhiyun }
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun if (opregion->asle) {
1096*4882a593Smuzhiyun opregion->asle->tche = ASLE_TCHE_BLC_EN;
1097*4882a593Smuzhiyun opregion->asle->ardy = ASLE_ARDY_READY;
1098*4882a593Smuzhiyun }
1099*4882a593Smuzhiyun
1100*4882a593Smuzhiyun intel_opregion_notify_adapter(i915, PCI_D0);
1101*4882a593Smuzhiyun }
1102*4882a593Smuzhiyun
intel_opregion_suspend(struct drm_i915_private * i915,pci_power_t state)1103*4882a593Smuzhiyun void intel_opregion_suspend(struct drm_i915_private *i915, pci_power_t state)
1104*4882a593Smuzhiyun {
1105*4882a593Smuzhiyun struct intel_opregion *opregion = &i915->opregion;
1106*4882a593Smuzhiyun
1107*4882a593Smuzhiyun if (!opregion->header)
1108*4882a593Smuzhiyun return;
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun intel_opregion_notify_adapter(i915, state);
1111*4882a593Smuzhiyun
1112*4882a593Smuzhiyun if (opregion->asle)
1113*4882a593Smuzhiyun opregion->asle->ardy = ASLE_ARDY_NOT_READY;
1114*4882a593Smuzhiyun
1115*4882a593Smuzhiyun cancel_work_sync(&i915->opregion.asle_work);
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun if (opregion->acpi)
1118*4882a593Smuzhiyun opregion->acpi->drdy = 0;
1119*4882a593Smuzhiyun }
1120*4882a593Smuzhiyun
intel_opregion_unregister(struct drm_i915_private * i915)1121*4882a593Smuzhiyun void intel_opregion_unregister(struct drm_i915_private *i915)
1122*4882a593Smuzhiyun {
1123*4882a593Smuzhiyun struct intel_opregion *opregion = &i915->opregion;
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun intel_opregion_suspend(i915, PCI_D1);
1126*4882a593Smuzhiyun
1127*4882a593Smuzhiyun if (!opregion->header)
1128*4882a593Smuzhiyun return;
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun if (opregion->acpi_notifier.notifier_call) {
1131*4882a593Smuzhiyun unregister_acpi_notifier(&opregion->acpi_notifier);
1132*4882a593Smuzhiyun opregion->acpi_notifier.notifier_call = NULL;
1133*4882a593Smuzhiyun }
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun /* just clear all opregion memory pointers now */
1136*4882a593Smuzhiyun memunmap(opregion->header);
1137*4882a593Smuzhiyun if (opregion->rvda) {
1138*4882a593Smuzhiyun memunmap(opregion->rvda);
1139*4882a593Smuzhiyun opregion->rvda = NULL;
1140*4882a593Smuzhiyun }
1141*4882a593Smuzhiyun if (opregion->vbt_firmware) {
1142*4882a593Smuzhiyun kfree(opregion->vbt_firmware);
1143*4882a593Smuzhiyun opregion->vbt_firmware = NULL;
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun opregion->header = NULL;
1146*4882a593Smuzhiyun opregion->acpi = NULL;
1147*4882a593Smuzhiyun opregion->swsci = NULL;
1148*4882a593Smuzhiyun opregion->asle = NULL;
1149*4882a593Smuzhiyun opregion->vbt = NULL;
1150*4882a593Smuzhiyun opregion->lid_state = NULL;
1151*4882a593Smuzhiyun }
1152