1*4882a593Smuzhiyun /* SPDX-License-Identifier: MIT */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright © 2019 Intel Corporation 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __INTEL_CRT_H__ 7*4882a593Smuzhiyun #define __INTEL_CRT_H__ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include "i915_reg.h" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun enum pipe; 12*4882a593Smuzhiyun struct drm_encoder; 13*4882a593Smuzhiyun struct drm_i915_private; 14*4882a593Smuzhiyun struct drm_i915_private; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun bool intel_crt_port_enabled(struct drm_i915_private *dev_priv, 17*4882a593Smuzhiyun i915_reg_t adpa_reg, enum pipe *pipe); 18*4882a593Smuzhiyun void intel_crt_init(struct drm_i915_private *dev_priv); 19*4882a593Smuzhiyun void intel_crt_reset(struct drm_encoder *encoder); 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #endif /* __INTEL_CRT_H__ */ 22