1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun# 3*4882a593Smuzhiyun# Makefile for the drm device driver. This driver provides support for the 4*4882a593Smuzhiyun# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun# Add a set of useful warning flags and enable -Werror for CI to prevent 7*4882a593Smuzhiyun# trivial mistakes from creeping in. We have to do this piecemeal as we reject 8*4882a593Smuzhiyun# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we 9*4882a593Smuzhiyun# need to filter out dubious warnings. Still it is our interest 10*4882a593Smuzhiyun# to keep running locally with W=1 C=1 until we are completely clean. 11*4882a593Smuzhiyun# 12*4882a593Smuzhiyun# Note the danger in using -Wall -Wextra is that when CI updates gcc we 13*4882a593Smuzhiyun# will most likely get a sudden build breakage... Hopefully we will fix 14*4882a593Smuzhiyun# new warnings before CI updates! 15*4882a593Smuzhiyunsubdir-ccflags-y := -Wall -Wextra 16*4882a593Smuzhiyunsubdir-ccflags-y += $(call cc-disable-warning, unused-parameter) 17*4882a593Smuzhiyunsubdir-ccflags-y += $(call cc-disable-warning, type-limits) 18*4882a593Smuzhiyunsubdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers) 19*4882a593Smuzhiyunsubdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable) 20*4882a593Smuzhiyun# clang warnings 21*4882a593Smuzhiyunsubdir-ccflags-y += $(call cc-disable-warning, sign-compare) 22*4882a593Smuzhiyunsubdir-ccflags-y += $(call cc-disable-warning, sometimes-uninitialized) 23*4882a593Smuzhiyunsubdir-ccflags-y += $(call cc-disable-warning, initializer-overrides) 24*4882a593Smuzhiyunsubdir-ccflags-y += $(call cc-disable-warning, uninitialized) 25*4882a593Smuzhiyunsubdir-ccflags-y += $(call cc-disable-warning, frame-address) 26*4882a593Smuzhiyunsubdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun# Fine grained warnings disable 29*4882a593SmuzhiyunCFLAGS_i915_pci.o = $(call cc-disable-warning, override-init) 30*4882a593SmuzhiyunCFLAGS_display/intel_fbdev.o = $(call cc-disable-warning, override-init) 31*4882a593Smuzhiyun 32*4882a593Smuzhiyunsubdir-ccflags-y += -I$(srctree)/$(src) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun# Please keep these build lists sorted! 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun# core driver code 37*4882a593Smuzhiyuni915-y += i915_drv.o \ 38*4882a593Smuzhiyun i915_config.o \ 39*4882a593Smuzhiyun i915_irq.o \ 40*4882a593Smuzhiyun i915_getparam.o \ 41*4882a593Smuzhiyun i915_mitigations.o \ 42*4882a593Smuzhiyun i915_params.o \ 43*4882a593Smuzhiyun i915_pci.o \ 44*4882a593Smuzhiyun i915_scatterlist.o \ 45*4882a593Smuzhiyun i915_suspend.o \ 46*4882a593Smuzhiyun i915_switcheroo.o \ 47*4882a593Smuzhiyun i915_sysfs.o \ 48*4882a593Smuzhiyun i915_utils.o \ 49*4882a593Smuzhiyun intel_device_info.o \ 50*4882a593Smuzhiyun intel_dram.o \ 51*4882a593Smuzhiyun intel_memory_region.o \ 52*4882a593Smuzhiyun intel_pch.o \ 53*4882a593Smuzhiyun intel_pm.o \ 54*4882a593Smuzhiyun intel_runtime_pm.o \ 55*4882a593Smuzhiyun intel_sideband.o \ 56*4882a593Smuzhiyun intel_uncore.o \ 57*4882a593Smuzhiyun intel_wakeref.o \ 58*4882a593Smuzhiyun vlv_suspend.o 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun# core library code 61*4882a593Smuzhiyuni915-y += \ 62*4882a593Smuzhiyun i915_memcpy.o \ 63*4882a593Smuzhiyun i915_mm.o \ 64*4882a593Smuzhiyun i915_sw_fence.o \ 65*4882a593Smuzhiyun i915_sw_fence_work.o \ 66*4882a593Smuzhiyun i915_syncmap.o \ 67*4882a593Smuzhiyun i915_user_extensions.o 68*4882a593Smuzhiyun 69*4882a593Smuzhiyuni915-$(CONFIG_COMPAT) += i915_ioc32.o 70*4882a593Smuzhiyuni915-$(CONFIG_DEBUG_FS) += \ 71*4882a593Smuzhiyun i915_debugfs.o \ 72*4882a593Smuzhiyun i915_debugfs_params.o \ 73*4882a593Smuzhiyun display/intel_display_debugfs.o \ 74*4882a593Smuzhiyun display/intel_pipe_crc.o 75*4882a593Smuzhiyuni915-$(CONFIG_PERF_EVENTS) += i915_pmu.o 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun# "Graphics Technology" (aka we talk to the gpu) 78*4882a593Smuzhiyungt-y += \ 79*4882a593Smuzhiyun gt/debugfs_engines.o \ 80*4882a593Smuzhiyun gt/debugfs_gt.o \ 81*4882a593Smuzhiyun gt/debugfs_gt_pm.o \ 82*4882a593Smuzhiyun gt/gen2_engine_cs.o \ 83*4882a593Smuzhiyun gt/gen6_engine_cs.o \ 84*4882a593Smuzhiyun gt/gen6_ppgtt.o \ 85*4882a593Smuzhiyun gt/gen7_renderclear.o \ 86*4882a593Smuzhiyun gt/gen8_ppgtt.o \ 87*4882a593Smuzhiyun gt/intel_breadcrumbs.o \ 88*4882a593Smuzhiyun gt/intel_context.o \ 89*4882a593Smuzhiyun gt/intel_context_param.o \ 90*4882a593Smuzhiyun gt/intel_context_sseu.o \ 91*4882a593Smuzhiyun gt/intel_engine_cs.o \ 92*4882a593Smuzhiyun gt/intel_engine_heartbeat.o \ 93*4882a593Smuzhiyun gt/intel_engine_pm.o \ 94*4882a593Smuzhiyun gt/intel_engine_user.o \ 95*4882a593Smuzhiyun gt/intel_ggtt.o \ 96*4882a593Smuzhiyun gt/intel_ggtt_fencing.o \ 97*4882a593Smuzhiyun gt/intel_gt.o \ 98*4882a593Smuzhiyun gt/intel_gt_buffer_pool.o \ 99*4882a593Smuzhiyun gt/intel_gt_clock_utils.o \ 100*4882a593Smuzhiyun gt/intel_gt_irq.o \ 101*4882a593Smuzhiyun gt/intel_gt_pm.o \ 102*4882a593Smuzhiyun gt/intel_gt_pm_irq.o \ 103*4882a593Smuzhiyun gt/intel_gt_requests.o \ 104*4882a593Smuzhiyun gt/intel_gtt.o \ 105*4882a593Smuzhiyun gt/intel_llc.o \ 106*4882a593Smuzhiyun gt/intel_lrc.o \ 107*4882a593Smuzhiyun gt/intel_mocs.o \ 108*4882a593Smuzhiyun gt/intel_ppgtt.o \ 109*4882a593Smuzhiyun gt/intel_rc6.o \ 110*4882a593Smuzhiyun gt/intel_renderstate.o \ 111*4882a593Smuzhiyun gt/intel_reset.o \ 112*4882a593Smuzhiyun gt/intel_ring.o \ 113*4882a593Smuzhiyun gt/intel_ring_submission.o \ 114*4882a593Smuzhiyun gt/intel_rps.o \ 115*4882a593Smuzhiyun gt/intel_sseu.o \ 116*4882a593Smuzhiyun gt/intel_sseu_debugfs.o \ 117*4882a593Smuzhiyun gt/intel_timeline.o \ 118*4882a593Smuzhiyun gt/intel_workarounds.o \ 119*4882a593Smuzhiyun gt/shmem_utils.o \ 120*4882a593Smuzhiyun gt/sysfs_engines.o 121*4882a593Smuzhiyun# autogenerated null render state 122*4882a593Smuzhiyungt-y += \ 123*4882a593Smuzhiyun gt/gen6_renderstate.o \ 124*4882a593Smuzhiyun gt/gen7_renderstate.o \ 125*4882a593Smuzhiyun gt/gen8_renderstate.o \ 126*4882a593Smuzhiyun gt/gen9_renderstate.o 127*4882a593Smuzhiyuni915-y += $(gt-y) 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun# GEM (Graphics Execution Management) code 130*4882a593Smuzhiyungem-y += \ 131*4882a593Smuzhiyun gem/i915_gem_busy.o \ 132*4882a593Smuzhiyun gem/i915_gem_clflush.o \ 133*4882a593Smuzhiyun gem/i915_gem_client_blt.o \ 134*4882a593Smuzhiyun gem/i915_gem_context.o \ 135*4882a593Smuzhiyun gem/i915_gem_dmabuf.o \ 136*4882a593Smuzhiyun gem/i915_gem_domain.o \ 137*4882a593Smuzhiyun gem/i915_gem_execbuffer.o \ 138*4882a593Smuzhiyun gem/i915_gem_fence.o \ 139*4882a593Smuzhiyun gem/i915_gem_internal.o \ 140*4882a593Smuzhiyun gem/i915_gem_object.o \ 141*4882a593Smuzhiyun gem/i915_gem_object_blt.o \ 142*4882a593Smuzhiyun gem/i915_gem_lmem.o \ 143*4882a593Smuzhiyun gem/i915_gem_mman.o \ 144*4882a593Smuzhiyun gem/i915_gem_pages.o \ 145*4882a593Smuzhiyun gem/i915_gem_phys.o \ 146*4882a593Smuzhiyun gem/i915_gem_pm.o \ 147*4882a593Smuzhiyun gem/i915_gem_region.o \ 148*4882a593Smuzhiyun gem/i915_gem_shmem.o \ 149*4882a593Smuzhiyun gem/i915_gem_shrinker.o \ 150*4882a593Smuzhiyun gem/i915_gem_stolen.o \ 151*4882a593Smuzhiyun gem/i915_gem_throttle.o \ 152*4882a593Smuzhiyun gem/i915_gem_tiling.o \ 153*4882a593Smuzhiyun gem/i915_gem_userptr.o \ 154*4882a593Smuzhiyun gem/i915_gem_wait.o \ 155*4882a593Smuzhiyun gem/i915_gemfs.o 156*4882a593Smuzhiyuni915-y += \ 157*4882a593Smuzhiyun $(gem-y) \ 158*4882a593Smuzhiyun i915_active.o \ 159*4882a593Smuzhiyun i915_buddy.o \ 160*4882a593Smuzhiyun i915_cmd_parser.o \ 161*4882a593Smuzhiyun i915_gem_evict.o \ 162*4882a593Smuzhiyun i915_gem_gtt.o \ 163*4882a593Smuzhiyun i915_gem.o \ 164*4882a593Smuzhiyun i915_globals.o \ 165*4882a593Smuzhiyun i915_query.o \ 166*4882a593Smuzhiyun i915_request.o \ 167*4882a593Smuzhiyun i915_scheduler.o \ 168*4882a593Smuzhiyun i915_trace_points.o \ 169*4882a593Smuzhiyun i915_vma.o \ 170*4882a593Smuzhiyun intel_region_lmem.o \ 171*4882a593Smuzhiyun intel_wopcm.o 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun# general-purpose microcontroller (GuC) support 174*4882a593Smuzhiyuni915-y += gt/uc/intel_uc.o \ 175*4882a593Smuzhiyun gt/uc/intel_uc_debugfs.o \ 176*4882a593Smuzhiyun gt/uc/intel_uc_fw.o \ 177*4882a593Smuzhiyun gt/uc/intel_guc.o \ 178*4882a593Smuzhiyun gt/uc/intel_guc_ads.o \ 179*4882a593Smuzhiyun gt/uc/intel_guc_ct.o \ 180*4882a593Smuzhiyun gt/uc/intel_guc_debugfs.o \ 181*4882a593Smuzhiyun gt/uc/intel_guc_fw.o \ 182*4882a593Smuzhiyun gt/uc/intel_guc_log.o \ 183*4882a593Smuzhiyun gt/uc/intel_guc_log_debugfs.o \ 184*4882a593Smuzhiyun gt/uc/intel_guc_submission.o \ 185*4882a593Smuzhiyun gt/uc/intel_huc.o \ 186*4882a593Smuzhiyun gt/uc/intel_huc_debugfs.o \ 187*4882a593Smuzhiyun gt/uc/intel_huc_fw.o 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun# modesetting core code 190*4882a593Smuzhiyuni915-y += \ 191*4882a593Smuzhiyun display/intel_atomic.o \ 192*4882a593Smuzhiyun display/intel_atomic_plane.o \ 193*4882a593Smuzhiyun display/intel_audio.o \ 194*4882a593Smuzhiyun display/intel_bios.o \ 195*4882a593Smuzhiyun display/intel_bw.o \ 196*4882a593Smuzhiyun display/intel_cdclk.o \ 197*4882a593Smuzhiyun display/intel_color.o \ 198*4882a593Smuzhiyun display/intel_combo_phy.o \ 199*4882a593Smuzhiyun display/intel_connector.o \ 200*4882a593Smuzhiyun display/intel_csr.o \ 201*4882a593Smuzhiyun display/intel_display.o \ 202*4882a593Smuzhiyun display/intel_display_power.o \ 203*4882a593Smuzhiyun display/intel_dpio_phy.o \ 204*4882a593Smuzhiyun display/intel_dpll_mgr.o \ 205*4882a593Smuzhiyun display/intel_dsb.o \ 206*4882a593Smuzhiyun display/intel_fbc.o \ 207*4882a593Smuzhiyun display/intel_fifo_underrun.o \ 208*4882a593Smuzhiyun display/intel_frontbuffer.o \ 209*4882a593Smuzhiyun display/intel_global_state.o \ 210*4882a593Smuzhiyun display/intel_hdcp.o \ 211*4882a593Smuzhiyun display/intel_hotplug.o \ 212*4882a593Smuzhiyun display/intel_lpe_audio.o \ 213*4882a593Smuzhiyun display/intel_overlay.o \ 214*4882a593Smuzhiyun display/intel_psr.o \ 215*4882a593Smuzhiyun display/intel_quirks.o \ 216*4882a593Smuzhiyun display/intel_sprite.o \ 217*4882a593Smuzhiyun display/intel_tc.o \ 218*4882a593Smuzhiyun display/intel_vga.o 219*4882a593Smuzhiyuni915-$(CONFIG_ACPI) += \ 220*4882a593Smuzhiyun display/intel_acpi.o \ 221*4882a593Smuzhiyun display/intel_opregion.o 222*4882a593Smuzhiyuni915-$(CONFIG_DRM_FBDEV_EMULATION) += \ 223*4882a593Smuzhiyun display/intel_fbdev.o 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun# modesetting output/encoder code 226*4882a593Smuzhiyuni915-y += \ 227*4882a593Smuzhiyun display/dvo_ch7017.o \ 228*4882a593Smuzhiyun display/dvo_ch7xxx.o \ 229*4882a593Smuzhiyun display/dvo_ivch.o \ 230*4882a593Smuzhiyun display/dvo_ns2501.o \ 231*4882a593Smuzhiyun display/dvo_sil164.o \ 232*4882a593Smuzhiyun display/dvo_tfp410.o \ 233*4882a593Smuzhiyun display/icl_dsi.o \ 234*4882a593Smuzhiyun display/intel_crt.o \ 235*4882a593Smuzhiyun display/intel_ddi.o \ 236*4882a593Smuzhiyun display/intel_dp.o \ 237*4882a593Smuzhiyun display/intel_dp_aux_backlight.o \ 238*4882a593Smuzhiyun display/intel_dp_hdcp.o \ 239*4882a593Smuzhiyun display/intel_dp_link_training.o \ 240*4882a593Smuzhiyun display/intel_dp_mst.o \ 241*4882a593Smuzhiyun display/intel_dsi.o \ 242*4882a593Smuzhiyun display/intel_dsi_dcs_backlight.o \ 243*4882a593Smuzhiyun display/intel_dsi_vbt.o \ 244*4882a593Smuzhiyun display/intel_dvo.o \ 245*4882a593Smuzhiyun display/intel_gmbus.o \ 246*4882a593Smuzhiyun display/intel_hdmi.o \ 247*4882a593Smuzhiyun display/intel_lspcon.o \ 248*4882a593Smuzhiyun display/intel_lvds.o \ 249*4882a593Smuzhiyun display/intel_panel.o \ 250*4882a593Smuzhiyun display/intel_sdvo.o \ 251*4882a593Smuzhiyun display/intel_tv.o \ 252*4882a593Smuzhiyun display/intel_vdsc.o \ 253*4882a593Smuzhiyun display/vlv_dsi.o \ 254*4882a593Smuzhiyun display/vlv_dsi_pll.o 255*4882a593Smuzhiyun 256*4882a593Smuzhiyuni915-y += i915_perf.o 257*4882a593Smuzhiyun 258*4882a593Smuzhiyun# Post-mortem debug and GPU hang state capture 259*4882a593Smuzhiyuni915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o 260*4882a593Smuzhiyuni915-$(CONFIG_DRM_I915_SELFTEST) += \ 261*4882a593Smuzhiyun gem/selftests/igt_gem_utils.o \ 262*4882a593Smuzhiyun selftests/i915_random.o \ 263*4882a593Smuzhiyun selftests/i915_selftest.o \ 264*4882a593Smuzhiyun selftests/igt_atomic.o \ 265*4882a593Smuzhiyun selftests/igt_flush_test.o \ 266*4882a593Smuzhiyun selftests/igt_live_test.o \ 267*4882a593Smuzhiyun selftests/igt_mmap.o \ 268*4882a593Smuzhiyun selftests/igt_reset.o \ 269*4882a593Smuzhiyun selftests/igt_spinner.o \ 270*4882a593Smuzhiyun selftests/librapl.o 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun# virtual gpu code 273*4882a593Smuzhiyuni915-y += i915_vgpu.o 274*4882a593Smuzhiyun 275*4882a593Smuzhiyunifeq ($(CONFIG_DRM_I915_GVT),y) 276*4882a593Smuzhiyuni915-y += intel_gvt.o 277*4882a593Smuzhiyuninclude $(src)/gvt/Makefile 278*4882a593Smuzhiyunendif 279*4882a593Smuzhiyun 280*4882a593Smuzhiyunobj-$(CONFIG_DRM_I915) += i915.o 281*4882a593Smuzhiyunobj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun# header test 284*4882a593Smuzhiyun 285*4882a593Smuzhiyun# exclude some broken headers from the test coverage 286*4882a593Smuzhiyunno-header-test := \ 287*4882a593Smuzhiyun display/intel_vbt_defs.h \ 288*4882a593Smuzhiyun gvt/execlist.h \ 289*4882a593Smuzhiyun gvt/fb_decoder.h \ 290*4882a593Smuzhiyun gvt/gtt.h \ 291*4882a593Smuzhiyun gvt/gvt.h \ 292*4882a593Smuzhiyun gvt/interrupt.h \ 293*4882a593Smuzhiyun gvt/mmio_context.h \ 294*4882a593Smuzhiyun gvt/mpt.h \ 295*4882a593Smuzhiyun gvt/scheduler.h 296*4882a593Smuzhiyun 297*4882a593Smuzhiyunextra-$(CONFIG_DRM_I915_WERROR) += \ 298*4882a593Smuzhiyun $(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \ 299*4882a593Smuzhiyun $(shell cd $(srctree)/$(src) && find * -name '*.h'))) 300*4882a593Smuzhiyun 301*4882a593Smuzhiyunquiet_cmd_hdrtest = HDRTEST $(patsubst %.hdrtest,%.h,$@) 302*4882a593Smuzhiyun cmd_hdrtest = $(CC) $(filter-out $(CFLAGS_GCOV), $(c_flags)) -S -o /dev/null -x c /dev/null -include $<; touch $@ 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun$(obj)/%.hdrtest: $(src)/%.h FORCE 305*4882a593Smuzhiyun $(call if_changed_dep,hdrtest) 306