1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /**************************************************************************
3*4882a593Smuzhiyun * Copyright (c) 2007, Intel Corporation.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Authors: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
6*4882a593Smuzhiyun **************************************************************************/
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/spinlock.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "psb_drv.h"
11*4882a593Smuzhiyun #include "psb_intel_reg.h"
12*4882a593Smuzhiyun #include "psb_reg.h"
13*4882a593Smuzhiyun
psb_lid_timer_func(struct timer_list * t)14*4882a593Smuzhiyun static void psb_lid_timer_func(struct timer_list *t)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun struct drm_psb_private *dev_priv = from_timer(dev_priv, t, lid_timer);
17*4882a593Smuzhiyun struct drm_device *dev = (struct drm_device *)dev_priv->dev;
18*4882a593Smuzhiyun struct timer_list *lid_timer = &dev_priv->lid_timer;
19*4882a593Smuzhiyun unsigned long irq_flags;
20*4882a593Smuzhiyun u32 __iomem *lid_state = dev_priv->opregion.lid_state;
21*4882a593Smuzhiyun u32 pp_status;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun if (readl(lid_state) == dev_priv->lid_last_state)
24*4882a593Smuzhiyun goto lid_timer_schedule;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun if ((readl(lid_state)) & 0x01) {
27*4882a593Smuzhiyun /*lid state is open*/
28*4882a593Smuzhiyun REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | POWER_TARGET_ON);
29*4882a593Smuzhiyun do {
30*4882a593Smuzhiyun pp_status = REG_READ(PP_STATUS);
31*4882a593Smuzhiyun } while ((pp_status & PP_ON) == 0 &&
32*4882a593Smuzhiyun (pp_status & PP_SEQUENCE_MASK) != 0);
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun if (REG_READ(PP_STATUS) & PP_ON) {
35*4882a593Smuzhiyun /*FIXME: should be backlight level before*/
36*4882a593Smuzhiyun psb_intel_lvds_set_brightness(dev, 100);
37*4882a593Smuzhiyun } else {
38*4882a593Smuzhiyun DRM_DEBUG("LVDS panel never powered up");
39*4882a593Smuzhiyun return;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun } else {
42*4882a593Smuzhiyun psb_intel_lvds_set_brightness(dev, 0);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & ~POWER_TARGET_ON);
45*4882a593Smuzhiyun do {
46*4882a593Smuzhiyun pp_status = REG_READ(PP_STATUS);
47*4882a593Smuzhiyun } while ((pp_status & PP_ON) == 0);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun dev_priv->lid_last_state = readl(lid_state);
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun lid_timer_schedule:
52*4882a593Smuzhiyun spin_lock_irqsave(&dev_priv->lid_lock, irq_flags);
53*4882a593Smuzhiyun if (!timer_pending(lid_timer)) {
54*4882a593Smuzhiyun lid_timer->expires = jiffies + PSB_LID_DELAY;
55*4882a593Smuzhiyun add_timer(lid_timer);
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun spin_unlock_irqrestore(&dev_priv->lid_lock, irq_flags);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
psb_lid_timer_init(struct drm_psb_private * dev_priv)60*4882a593Smuzhiyun void psb_lid_timer_init(struct drm_psb_private *dev_priv)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun struct timer_list *lid_timer = &dev_priv->lid_timer;
63*4882a593Smuzhiyun unsigned long irq_flags;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun spin_lock_init(&dev_priv->lid_lock);
66*4882a593Smuzhiyun spin_lock_irqsave(&dev_priv->lid_lock, irq_flags);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun timer_setup(lid_timer, psb_lid_timer_func, 0);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun lid_timer->expires = jiffies + PSB_LID_DELAY;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun add_timer(lid_timer);
73*4882a593Smuzhiyun spin_unlock_irqrestore(&dev_priv->lid_lock, irq_flags);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
psb_lid_timer_takedown(struct drm_psb_private * dev_priv)76*4882a593Smuzhiyun void psb_lid_timer_takedown(struct drm_psb_private *dev_priv)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun del_timer_sync(&dev_priv->lid_timer);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
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