1*4882a593Smuzhiyun /**************************************************************************
2*4882a593Smuzhiyun * Copyright (c) 2009-2011, Intel Corporation.
3*4882a593Smuzhiyun * All Rights Reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a
6*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"),
7*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation
8*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the
10*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions:
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * The above copyright notice and this permission notice (including the next
13*4882a593Smuzhiyun * paragraph) shall be included in all copies or substantial portions of the
14*4882a593Smuzhiyun * Software.
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19*4882a593Smuzhiyun * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20*4882a593Smuzhiyun * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21*4882a593Smuzhiyun * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22*4882a593Smuzhiyun * SOFTWARE.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * Authors:
25*4882a593Smuzhiyun * Benjamin Defnet <benjamin.r.defnet@intel.com>
26*4882a593Smuzhiyun * Rajesh Poornachandran <rajesh.poornachandran@intel.com>
27*4882a593Smuzhiyun * Massively reworked
28*4882a593Smuzhiyun * Alan Cox <alan@linux.intel.com>
29*4882a593Smuzhiyun */
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include "power.h"
32*4882a593Smuzhiyun #include "psb_drv.h"
33*4882a593Smuzhiyun #include "psb_reg.h"
34*4882a593Smuzhiyun #include "psb_intel_reg.h"
35*4882a593Smuzhiyun #include <linux/mutex.h>
36*4882a593Smuzhiyun #include <linux/pm_runtime.h>
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static struct mutex power_mutex; /* Serialize power ops */
39*4882a593Smuzhiyun static spinlock_t power_ctrl_lock; /* Serialize power claim */
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /**
42*4882a593Smuzhiyun * gma_power_init - initialise power manager
43*4882a593Smuzhiyun * @dev: our device
44*4882a593Smuzhiyun *
45*4882a593Smuzhiyun * Set up for power management tracking of our hardware.
46*4882a593Smuzhiyun */
gma_power_init(struct drm_device * dev)47*4882a593Smuzhiyun void gma_power_init(struct drm_device *dev)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* FIXME: Move APM/OSPM base into relevant device code */
52*4882a593Smuzhiyun dev_priv->apm_base = dev_priv->apm_reg & 0xffff;
53*4882a593Smuzhiyun dev_priv->ospm_base &= 0xffff;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun dev_priv->display_power = true; /* We start active */
56*4882a593Smuzhiyun dev_priv->display_count = 0; /* Currently no users */
57*4882a593Smuzhiyun dev_priv->suspended = false; /* And not suspended */
58*4882a593Smuzhiyun spin_lock_init(&power_ctrl_lock);
59*4882a593Smuzhiyun mutex_init(&power_mutex);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun if (dev_priv->ops->init_pm)
62*4882a593Smuzhiyun dev_priv->ops->init_pm(dev);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /**
66*4882a593Smuzhiyun * gma_power_uninit - end power manager
67*4882a593Smuzhiyun * @dev: device to end for
68*4882a593Smuzhiyun *
69*4882a593Smuzhiyun * Undo the effects of gma_power_init
70*4882a593Smuzhiyun */
gma_power_uninit(struct drm_device * dev)71*4882a593Smuzhiyun void gma_power_uninit(struct drm_device *dev)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun pm_runtime_disable(&dev->pdev->dev);
74*4882a593Smuzhiyun pm_runtime_set_suspended(&dev->pdev->dev);
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /**
78*4882a593Smuzhiyun * gma_suspend_display - suspend the display logic
79*4882a593Smuzhiyun * @dev: our DRM device
80*4882a593Smuzhiyun *
81*4882a593Smuzhiyun * Suspend the display logic of the graphics interface
82*4882a593Smuzhiyun */
gma_suspend_display(struct drm_device * dev)83*4882a593Smuzhiyun static void gma_suspend_display(struct drm_device *dev)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun if (dev_priv->suspended)
88*4882a593Smuzhiyun return;
89*4882a593Smuzhiyun dev_priv->ops->save_regs(dev);
90*4882a593Smuzhiyun dev_priv->ops->power_down(dev);
91*4882a593Smuzhiyun dev_priv->display_power = false;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /**
95*4882a593Smuzhiyun * gma_resume_display - resume display side logic
96*4882a593Smuzhiyun *
97*4882a593Smuzhiyun * Resume the display hardware restoring state and enabling
98*4882a593Smuzhiyun * as necessary.
99*4882a593Smuzhiyun */
gma_resume_display(struct pci_dev * pdev)100*4882a593Smuzhiyun static void gma_resume_display(struct pci_dev *pdev)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun struct drm_device *dev = pci_get_drvdata(pdev);
103*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /* turn on the display power island */
106*4882a593Smuzhiyun dev_priv->ops->power_up(dev);
107*4882a593Smuzhiyun dev_priv->suspended = false;
108*4882a593Smuzhiyun dev_priv->display_power = true;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun PSB_WVDC32(dev_priv->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL);
111*4882a593Smuzhiyun pci_write_config_word(pdev, PSB_GMCH_CTRL,
112*4882a593Smuzhiyun dev_priv->gmch_ctrl | _PSB_GMCH_ENABLED);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun psb_gtt_restore(dev); /* Rebuild our GTT mappings */
115*4882a593Smuzhiyun dev_priv->ops->restore_regs(dev);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /**
119*4882a593Smuzhiyun * gma_suspend_pci - suspend PCI side
120*4882a593Smuzhiyun * @pdev: PCI device
121*4882a593Smuzhiyun *
122*4882a593Smuzhiyun * Perform the suspend processing on our PCI device state
123*4882a593Smuzhiyun */
gma_suspend_pci(struct pci_dev * pdev)124*4882a593Smuzhiyun static void gma_suspend_pci(struct pci_dev *pdev)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun struct drm_device *dev = pci_get_drvdata(pdev);
127*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
128*4882a593Smuzhiyun int bsm, vbt;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun if (dev_priv->suspended)
131*4882a593Smuzhiyun return;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun pci_save_state(pdev);
134*4882a593Smuzhiyun pci_read_config_dword(pdev, 0x5C, &bsm);
135*4882a593Smuzhiyun dev_priv->regs.saveBSM = bsm;
136*4882a593Smuzhiyun pci_read_config_dword(pdev, 0xFC, &vbt);
137*4882a593Smuzhiyun dev_priv->regs.saveVBT = vbt;
138*4882a593Smuzhiyun pci_read_config_dword(pdev, PSB_PCIx_MSI_ADDR_LOC, &dev_priv->msi_addr);
139*4882a593Smuzhiyun pci_read_config_dword(pdev, PSB_PCIx_MSI_DATA_LOC, &dev_priv->msi_data);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun pci_disable_device(pdev);
142*4882a593Smuzhiyun pci_set_power_state(pdev, PCI_D3hot);
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun dev_priv->suspended = true;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /**
148*4882a593Smuzhiyun * gma_resume_pci - resume helper
149*4882a593Smuzhiyun * @dev: our PCI device
150*4882a593Smuzhiyun *
151*4882a593Smuzhiyun * Perform the resume processing on our PCI device state - rewrite
152*4882a593Smuzhiyun * register state and re-enable the PCI device
153*4882a593Smuzhiyun */
gma_resume_pci(struct pci_dev * pdev)154*4882a593Smuzhiyun static bool gma_resume_pci(struct pci_dev *pdev)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun struct drm_device *dev = pci_get_drvdata(pdev);
157*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
158*4882a593Smuzhiyun int ret;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun if (!dev_priv->suspended)
161*4882a593Smuzhiyun return true;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun pci_set_power_state(pdev, PCI_D0);
164*4882a593Smuzhiyun pci_restore_state(pdev);
165*4882a593Smuzhiyun pci_write_config_dword(pdev, 0x5c, dev_priv->regs.saveBSM);
166*4882a593Smuzhiyun pci_write_config_dword(pdev, 0xFC, dev_priv->regs.saveVBT);
167*4882a593Smuzhiyun /* restoring MSI address and data in PCIx space */
168*4882a593Smuzhiyun pci_write_config_dword(pdev, PSB_PCIx_MSI_ADDR_LOC, dev_priv->msi_addr);
169*4882a593Smuzhiyun pci_write_config_dword(pdev, PSB_PCIx_MSI_DATA_LOC, dev_priv->msi_data);
170*4882a593Smuzhiyun ret = pci_enable_device(pdev);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun if (ret != 0)
173*4882a593Smuzhiyun dev_err(&pdev->dev, "pci_enable failed: %d\n", ret);
174*4882a593Smuzhiyun else
175*4882a593Smuzhiyun dev_priv->suspended = false;
176*4882a593Smuzhiyun return !dev_priv->suspended;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /**
180*4882a593Smuzhiyun * gma_power_suspend - bus callback for suspend
181*4882a593Smuzhiyun * @pdev: our PCI device
182*4882a593Smuzhiyun * @state: suspend type
183*4882a593Smuzhiyun *
184*4882a593Smuzhiyun * Called back by the PCI layer during a suspend of the system. We
185*4882a593Smuzhiyun * perform the necessary shut down steps and save enough state that
186*4882a593Smuzhiyun * we can undo this when resume is called.
187*4882a593Smuzhiyun */
gma_power_suspend(struct device * _dev)188*4882a593Smuzhiyun int gma_power_suspend(struct device *_dev)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(_dev);
191*4882a593Smuzhiyun struct drm_device *dev = pci_get_drvdata(pdev);
192*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun mutex_lock(&power_mutex);
195*4882a593Smuzhiyun if (!dev_priv->suspended) {
196*4882a593Smuzhiyun if (dev_priv->display_count) {
197*4882a593Smuzhiyun mutex_unlock(&power_mutex);
198*4882a593Smuzhiyun dev_err(dev->dev, "GPU hardware busy, cannot suspend\n");
199*4882a593Smuzhiyun return -EBUSY;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun psb_irq_uninstall(dev);
202*4882a593Smuzhiyun gma_suspend_display(dev);
203*4882a593Smuzhiyun gma_suspend_pci(pdev);
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun mutex_unlock(&power_mutex);
206*4882a593Smuzhiyun return 0;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /**
210*4882a593Smuzhiyun * gma_power_resume - resume power
211*4882a593Smuzhiyun * @pdev: PCI device
212*4882a593Smuzhiyun *
213*4882a593Smuzhiyun * Resume the PCI side of the graphics and then the displays
214*4882a593Smuzhiyun */
gma_power_resume(struct device * _dev)215*4882a593Smuzhiyun int gma_power_resume(struct device *_dev)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(_dev);
218*4882a593Smuzhiyun struct drm_device *dev = pci_get_drvdata(pdev);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun mutex_lock(&power_mutex);
221*4882a593Smuzhiyun gma_resume_pci(pdev);
222*4882a593Smuzhiyun gma_resume_display(pdev);
223*4882a593Smuzhiyun psb_irq_preinstall(dev);
224*4882a593Smuzhiyun psb_irq_postinstall(dev);
225*4882a593Smuzhiyun mutex_unlock(&power_mutex);
226*4882a593Smuzhiyun return 0;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun /**
230*4882a593Smuzhiyun * gma_power_is_on - returne true if power is on
231*4882a593Smuzhiyun * @dev: our DRM device
232*4882a593Smuzhiyun *
233*4882a593Smuzhiyun * Returns true if the display island power is on at this moment
234*4882a593Smuzhiyun */
gma_power_is_on(struct drm_device * dev)235*4882a593Smuzhiyun bool gma_power_is_on(struct drm_device *dev)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
238*4882a593Smuzhiyun return dev_priv->display_power;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun /**
242*4882a593Smuzhiyun * gma_power_begin - begin requiring power
243*4882a593Smuzhiyun * @dev: our DRM device
244*4882a593Smuzhiyun * @force_on: true to force power on
245*4882a593Smuzhiyun *
246*4882a593Smuzhiyun * Begin an action that requires the display power island is enabled.
247*4882a593Smuzhiyun * We refcount the islands.
248*4882a593Smuzhiyun */
gma_power_begin(struct drm_device * dev,bool force_on)249*4882a593Smuzhiyun bool gma_power_begin(struct drm_device *dev, bool force_on)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
252*4882a593Smuzhiyun int ret;
253*4882a593Smuzhiyun unsigned long flags;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun spin_lock_irqsave(&power_ctrl_lock, flags);
256*4882a593Smuzhiyun /* Power already on ? */
257*4882a593Smuzhiyun if (dev_priv->display_power) {
258*4882a593Smuzhiyun dev_priv->display_count++;
259*4882a593Smuzhiyun pm_runtime_get(&dev->pdev->dev);
260*4882a593Smuzhiyun spin_unlock_irqrestore(&power_ctrl_lock, flags);
261*4882a593Smuzhiyun return true;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun if (force_on == false)
264*4882a593Smuzhiyun goto out_false;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun /* Ok power up needed */
267*4882a593Smuzhiyun ret = gma_resume_pci(dev->pdev);
268*4882a593Smuzhiyun if (ret == 0) {
269*4882a593Smuzhiyun psb_irq_preinstall(dev);
270*4882a593Smuzhiyun psb_irq_postinstall(dev);
271*4882a593Smuzhiyun pm_runtime_get(&dev->pdev->dev);
272*4882a593Smuzhiyun dev_priv->display_count++;
273*4882a593Smuzhiyun spin_unlock_irqrestore(&power_ctrl_lock, flags);
274*4882a593Smuzhiyun return true;
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun out_false:
277*4882a593Smuzhiyun spin_unlock_irqrestore(&power_ctrl_lock, flags);
278*4882a593Smuzhiyun return false;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun /**
282*4882a593Smuzhiyun * gma_power_end - end use of power
283*4882a593Smuzhiyun * @dev: Our DRM device
284*4882a593Smuzhiyun *
285*4882a593Smuzhiyun * Indicate that one of our gma_power_begin() requested periods when
286*4882a593Smuzhiyun * the diplay island power is needed has completed.
287*4882a593Smuzhiyun */
gma_power_end(struct drm_device * dev)288*4882a593Smuzhiyun void gma_power_end(struct drm_device *dev)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun struct drm_psb_private *dev_priv = dev->dev_private;
291*4882a593Smuzhiyun unsigned long flags;
292*4882a593Smuzhiyun spin_lock_irqsave(&power_ctrl_lock, flags);
293*4882a593Smuzhiyun dev_priv->display_count--;
294*4882a593Smuzhiyun WARN_ON(dev_priv->display_count < 0);
295*4882a593Smuzhiyun spin_unlock_irqrestore(&power_ctrl_lock, flags);
296*4882a593Smuzhiyun pm_runtime_put(&dev->pdev->dev);
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
psb_runtime_suspend(struct device * dev)299*4882a593Smuzhiyun int psb_runtime_suspend(struct device *dev)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun return gma_power_suspend(dev);
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
psb_runtime_resume(struct device * dev)304*4882a593Smuzhiyun int psb_runtime_resume(struct device *dev)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun return gma_power_resume(dev);
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
psb_runtime_idle(struct device * dev)309*4882a593Smuzhiyun int psb_runtime_idle(struct device *dev)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun struct drm_device *drmdev = pci_get_drvdata(to_pci_dev(dev));
312*4882a593Smuzhiyun struct drm_psb_private *dev_priv = drmdev->dev_private;
313*4882a593Smuzhiyun if (dev_priv->display_count)
314*4882a593Smuzhiyun return 0;
315*4882a593Smuzhiyun else
316*4882a593Smuzhiyun return 1;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
gma_power_thaw(struct device * _dev)319*4882a593Smuzhiyun int gma_power_thaw(struct device *_dev)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun return gma_power_resume(_dev);
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun
gma_power_freeze(struct device * _dev)324*4882a593Smuzhiyun int gma_power_freeze(struct device *_dev)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun return gma_power_suspend(_dev);
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun
gma_power_restore(struct device * _dev)329*4882a593Smuzhiyun int gma_power_restore(struct device *_dev)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun return gma_power_resume(_dev);
332*4882a593Smuzhiyun }
333