xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/gma500/gma_display.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright © 2006-2011 Intel Corporation
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Authors:
6*4882a593Smuzhiyun  *	Eric Anholt <eric@anholt.net>
7*4882a593Smuzhiyun  *	Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #ifndef _GMA_DISPLAY_H_
11*4882a593Smuzhiyun #define _GMA_DISPLAY_H_
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/pm_runtime.h>
14*4882a593Smuzhiyun #include <drm/drm_vblank.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun struct drm_encoder;
17*4882a593Smuzhiyun struct drm_mode_set;
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun struct gma_clock_t {
20*4882a593Smuzhiyun 	/* given values */
21*4882a593Smuzhiyun 	int n;
22*4882a593Smuzhiyun 	int m1, m2;
23*4882a593Smuzhiyun 	int p1, p2;
24*4882a593Smuzhiyun 	/* derived values */
25*4882a593Smuzhiyun 	int dot;
26*4882a593Smuzhiyun 	int vco;
27*4882a593Smuzhiyun 	int m;
28*4882a593Smuzhiyun 	int p;
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun struct gma_range_t {
32*4882a593Smuzhiyun 	int min, max;
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun struct gma_p2_t {
36*4882a593Smuzhiyun 	int dot_limit;
37*4882a593Smuzhiyun 	int p2_slow, p2_fast;
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun struct gma_limit_t {
41*4882a593Smuzhiyun 	struct gma_range_t dot, vco, n, m, m1, m2, p, p1;
42*4882a593Smuzhiyun 	struct gma_p2_t p2;
43*4882a593Smuzhiyun 	bool (*find_pll)(const struct gma_limit_t *, struct drm_crtc *,
44*4882a593Smuzhiyun 			 int target, int refclk,
45*4882a593Smuzhiyun 			 struct gma_clock_t *best_clock);
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun struct gma_clock_funcs {
49*4882a593Smuzhiyun 	void (*clock)(int refclk, struct gma_clock_t *clock);
50*4882a593Smuzhiyun 	const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk);
51*4882a593Smuzhiyun 	bool (*pll_is_valid)(struct drm_crtc *crtc,
52*4882a593Smuzhiyun 			     const struct gma_limit_t *limit,
53*4882a593Smuzhiyun 			     struct gma_clock_t *clock);
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /* Common pipe related functions */
57*4882a593Smuzhiyun extern bool gma_pipe_has_type(struct drm_crtc *crtc, int type);
58*4882a593Smuzhiyun extern void gma_wait_for_vblank(struct drm_device *dev);
59*4882a593Smuzhiyun extern int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y,
60*4882a593Smuzhiyun 			     struct drm_framebuffer *old_fb);
61*4882a593Smuzhiyun extern int gma_crtc_cursor_set(struct drm_crtc *crtc,
62*4882a593Smuzhiyun 			       struct drm_file *file_priv,
63*4882a593Smuzhiyun 			       uint32_t handle,
64*4882a593Smuzhiyun 			       uint32_t width, uint32_t height);
65*4882a593Smuzhiyun extern int gma_crtc_cursor_move(struct drm_crtc *crtc, int x, int y);
66*4882a593Smuzhiyun extern void gma_crtc_load_lut(struct drm_crtc *crtc);
67*4882a593Smuzhiyun extern int gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
68*4882a593Smuzhiyun 			      u16 *blue, u32 size,
69*4882a593Smuzhiyun 			      struct drm_modeset_acquire_ctx *ctx);
70*4882a593Smuzhiyun extern void gma_crtc_dpms(struct drm_crtc *crtc, int mode);
71*4882a593Smuzhiyun extern void gma_crtc_prepare(struct drm_crtc *crtc);
72*4882a593Smuzhiyun extern void gma_crtc_commit(struct drm_crtc *crtc);
73*4882a593Smuzhiyun extern void gma_crtc_disable(struct drm_crtc *crtc);
74*4882a593Smuzhiyun extern void gma_crtc_destroy(struct drm_crtc *crtc);
75*4882a593Smuzhiyun extern int gma_crtc_page_flip(struct drm_crtc *crtc,
76*4882a593Smuzhiyun 			      struct drm_framebuffer *fb,
77*4882a593Smuzhiyun 			      struct drm_pending_vblank_event *event,
78*4882a593Smuzhiyun 			      uint32_t page_flip_flags,
79*4882a593Smuzhiyun 			      struct drm_modeset_acquire_ctx *ctx);
80*4882a593Smuzhiyun extern int gma_crtc_set_config(struct drm_mode_set *set,
81*4882a593Smuzhiyun 			       struct drm_modeset_acquire_ctx *ctx);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun extern void gma_crtc_save(struct drm_crtc *crtc);
84*4882a593Smuzhiyun extern void gma_crtc_restore(struct drm_crtc *crtc);
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun extern void gma_encoder_prepare(struct drm_encoder *encoder);
87*4882a593Smuzhiyun extern void gma_encoder_commit(struct drm_encoder *encoder);
88*4882a593Smuzhiyun extern void gma_encoder_destroy(struct drm_encoder *encoder);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun /* Common clock related functions */
91*4882a593Smuzhiyun extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk);
92*4882a593Smuzhiyun extern void gma_clock(int refclk, struct gma_clock_t *clock);
93*4882a593Smuzhiyun extern bool gma_pll_is_valid(struct drm_crtc *crtc,
94*4882a593Smuzhiyun 			     const struct gma_limit_t *limit,
95*4882a593Smuzhiyun 			     struct gma_clock_t *clock);
96*4882a593Smuzhiyun extern bool gma_find_best_pll(const struct gma_limit_t *limit,
97*4882a593Smuzhiyun 			      struct drm_crtc *crtc, int target, int refclk,
98*4882a593Smuzhiyun 			      struct gma_clock_t *best_clock);
99*4882a593Smuzhiyun #endif
100