1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* linux/drivers/gpu/drm/exynos/regs-gsc.h 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2012 Samsung Electronics Co., Ltd. 5*4882a593Smuzhiyun * http://www.samsung.com 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Register definition file for Samsung G-Scaler driver 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef EXYNOS_REGS_GSC_H_ 11*4882a593Smuzhiyun #define EXYNOS_REGS_GSC_H_ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* G-Scaler enable */ 14*4882a593Smuzhiyun #define GSC_ENABLE 0x00 15*4882a593Smuzhiyun #define GSC_ENABLE_PP_UPDATE_TIME_MASK (1 << 9) 16*4882a593Smuzhiyun #define GSC_ENABLE_PP_UPDATE_TIME_CURR (0 << 9) 17*4882a593Smuzhiyun #define GSC_ENABLE_PP_UPDATE_TIME_EOPAS (1 << 9) 18*4882a593Smuzhiyun #define GSC_ENABLE_CLK_GATE_MODE_MASK (1 << 8) 19*4882a593Smuzhiyun #define GSC_ENABLE_CLK_GATE_MODE_FREE (1 << 8) 20*4882a593Smuzhiyun #define GSC_ENABLE_IPC_MODE_MASK (1 << 7) 21*4882a593Smuzhiyun #define GSC_ENABLE_NORM_MODE (0 << 7) 22*4882a593Smuzhiyun #define GSC_ENABLE_IPC_MODE (1 << 7) 23*4882a593Smuzhiyun #define GSC_ENABLE_PP_UPDATE_MODE_MASK (1 << 6) 24*4882a593Smuzhiyun #define GSC_ENABLE_PP_UPDATE_FIRE_MODE (1 << 6) 25*4882a593Smuzhiyun #define GSC_ENABLE_IN_PP_UPDATE (1 << 5) 26*4882a593Smuzhiyun #define GSC_ENABLE_ON_CLEAR_MASK (1 << 4) 27*4882a593Smuzhiyun #define GSC_ENABLE_ON_CLEAR_ONESHOT (1 << 4) 28*4882a593Smuzhiyun #define GSC_ENABLE_QOS_ENABLE (1 << 3) 29*4882a593Smuzhiyun #define GSC_ENABLE_OP_STATUS (1 << 2) 30*4882a593Smuzhiyun #define GSC_ENABLE_SFR_UPDATE (1 << 1) 31*4882a593Smuzhiyun #define GSC_ENABLE_ON (1 << 0) 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* G-Scaler S/W reset */ 34*4882a593Smuzhiyun #define GSC_SW_RESET 0x04 35*4882a593Smuzhiyun #define GSC_SW_RESET_SRESET (1 << 0) 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* G-Scaler IRQ */ 38*4882a593Smuzhiyun #define GSC_IRQ 0x08 39*4882a593Smuzhiyun #define GSC_IRQ_STATUS_OR_IRQ (1 << 17) 40*4882a593Smuzhiyun #define GSC_IRQ_STATUS_OR_FRM_DONE (1 << 16) 41*4882a593Smuzhiyun #define GSC_IRQ_OR_MASK (1 << 2) 42*4882a593Smuzhiyun #define GSC_IRQ_FRMDONE_MASK (1 << 1) 43*4882a593Smuzhiyun #define GSC_IRQ_ENABLE (1 << 0) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* G-Scaler input control */ 46*4882a593Smuzhiyun #define GSC_IN_CON 0x10 47*4882a593Smuzhiyun #define GSC_IN_CHROM_STRIDE_SEL_MASK (1 << 20) 48*4882a593Smuzhiyun #define GSC_IN_CHROM_STRIDE_SEPAR (1 << 20) 49*4882a593Smuzhiyun #define GSC_IN_RB_SWAP_MASK (1 << 19) 50*4882a593Smuzhiyun #define GSC_IN_RB_SWAP (1 << 19) 51*4882a593Smuzhiyun #define GSC_IN_ROT_MASK (7 << 16) 52*4882a593Smuzhiyun #define GSC_IN_ROT_270 (7 << 16) 53*4882a593Smuzhiyun #define GSC_IN_ROT_90_YFLIP (6 << 16) 54*4882a593Smuzhiyun #define GSC_IN_ROT_90_XFLIP (5 << 16) 55*4882a593Smuzhiyun #define GSC_IN_ROT_90 (4 << 16) 56*4882a593Smuzhiyun #define GSC_IN_ROT_180 (3 << 16) 57*4882a593Smuzhiyun #define GSC_IN_ROT_YFLIP (2 << 16) 58*4882a593Smuzhiyun #define GSC_IN_ROT_XFLIP (1 << 16) 59*4882a593Smuzhiyun #define GSC_IN_RGB_TYPE_MASK (3 << 14) 60*4882a593Smuzhiyun #define GSC_IN_RGB_HD_WIDE (3 << 14) 61*4882a593Smuzhiyun #define GSC_IN_RGB_HD_NARROW (2 << 14) 62*4882a593Smuzhiyun #define GSC_IN_RGB_SD_WIDE (1 << 14) 63*4882a593Smuzhiyun #define GSC_IN_RGB_SD_NARROW (0 << 14) 64*4882a593Smuzhiyun #define GSC_IN_YUV422_1P_ORDER_MASK (1 << 13) 65*4882a593Smuzhiyun #define GSC_IN_YUV422_1P_ORDER_LSB_Y (0 << 13) 66*4882a593Smuzhiyun #define GSC_IN_YUV422_1P_OEDER_LSB_C (1 << 13) 67*4882a593Smuzhiyun #define GSC_IN_CHROMA_ORDER_MASK (1 << 12) 68*4882a593Smuzhiyun #define GSC_IN_CHROMA_ORDER_CBCR (0 << 12) 69*4882a593Smuzhiyun #define GSC_IN_CHROMA_ORDER_CRCB (1 << 12) 70*4882a593Smuzhiyun #define GSC_IN_FORMAT_MASK (7 << 8) 71*4882a593Smuzhiyun #define GSC_IN_XRGB8888 (0 << 8) 72*4882a593Smuzhiyun #define GSC_IN_RGB565 (1 << 8) 73*4882a593Smuzhiyun #define GSC_IN_YUV420_2P (2 << 8) 74*4882a593Smuzhiyun #define GSC_IN_YUV420_3P (3 << 8) 75*4882a593Smuzhiyun #define GSC_IN_YUV422_1P (4 << 8) 76*4882a593Smuzhiyun #define GSC_IN_YUV422_2P (5 << 8) 77*4882a593Smuzhiyun #define GSC_IN_YUV422_3P (6 << 8) 78*4882a593Smuzhiyun #define GSC_IN_TILE_TYPE_MASK (1 << 4) 79*4882a593Smuzhiyun #define GSC_IN_TILE_C_16x8 (0 << 4) 80*4882a593Smuzhiyun #define GSC_IN_TILE_C_16x16 (1 << 4) 81*4882a593Smuzhiyun #define GSC_IN_TILE_MODE (1 << 3) 82*4882a593Smuzhiyun #define GSC_IN_LOCAL_SEL_MASK (3 << 1) 83*4882a593Smuzhiyun #define GSC_IN_LOCAL_CAM3 (3 << 1) 84*4882a593Smuzhiyun #define GSC_IN_LOCAL_FIMD_WB (2 << 1) 85*4882a593Smuzhiyun #define GSC_IN_LOCAL_CAM1 (1 << 1) 86*4882a593Smuzhiyun #define GSC_IN_LOCAL_CAM0 (0 << 1) 87*4882a593Smuzhiyun #define GSC_IN_PATH_MASK (1 << 0) 88*4882a593Smuzhiyun #define GSC_IN_PATH_LOCAL (1 << 0) 89*4882a593Smuzhiyun #define GSC_IN_PATH_MEMORY (0 << 0) 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun /* G-Scaler source image size */ 92*4882a593Smuzhiyun #define GSC_SRCIMG_SIZE 0x14 93*4882a593Smuzhiyun #define GSC_SRCIMG_HEIGHT_MASK (0x1fff << 16) 94*4882a593Smuzhiyun #define GSC_SRCIMG_HEIGHT(x) ((x) << 16) 95*4882a593Smuzhiyun #define GSC_SRCIMG_WIDTH_MASK (0x3fff << 0) 96*4882a593Smuzhiyun #define GSC_SRCIMG_WIDTH(x) ((x) << 0) 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun /* G-Scaler source image offset */ 99*4882a593Smuzhiyun #define GSC_SRCIMG_OFFSET 0x18 100*4882a593Smuzhiyun #define GSC_SRCIMG_OFFSET_Y_MASK (0x1fff << 16) 101*4882a593Smuzhiyun #define GSC_SRCIMG_OFFSET_Y(x) ((x) << 16) 102*4882a593Smuzhiyun #define GSC_SRCIMG_OFFSET_X_MASK (0x1fff << 0) 103*4882a593Smuzhiyun #define GSC_SRCIMG_OFFSET_X(x) ((x) << 0) 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* G-Scaler cropped source image size */ 106*4882a593Smuzhiyun #define GSC_CROPPED_SIZE 0x1C 107*4882a593Smuzhiyun #define GSC_CROPPED_HEIGHT_MASK (0x1fff << 16) 108*4882a593Smuzhiyun #define GSC_CROPPED_HEIGHT(x) ((x) << 16) 109*4882a593Smuzhiyun #define GSC_CROPPED_WIDTH_MASK (0x1fff << 0) 110*4882a593Smuzhiyun #define GSC_CROPPED_WIDTH(x) ((x) << 0) 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun /* G-Scaler output control */ 113*4882a593Smuzhiyun #define GSC_OUT_CON 0x20 114*4882a593Smuzhiyun #define GSC_OUT_GLOBAL_ALPHA_MASK (0xff << 24) 115*4882a593Smuzhiyun #define GSC_OUT_GLOBAL_ALPHA(x) ((x) << 24) 116*4882a593Smuzhiyun #define GSC_OUT_CHROM_STRIDE_SEL_MASK (1 << 13) 117*4882a593Smuzhiyun #define GSC_OUT_CHROM_STRIDE_SEPAR (1 << 13) 118*4882a593Smuzhiyun #define GSC_OUT_RB_SWAP_MASK (1 << 12) 119*4882a593Smuzhiyun #define GSC_OUT_RB_SWAP (1 << 12) 120*4882a593Smuzhiyun #define GSC_OUT_RGB_TYPE_MASK (3 << 10) 121*4882a593Smuzhiyun #define GSC_OUT_RGB_HD_NARROW (3 << 10) 122*4882a593Smuzhiyun #define GSC_OUT_RGB_HD_WIDE (2 << 10) 123*4882a593Smuzhiyun #define GSC_OUT_RGB_SD_NARROW (1 << 10) 124*4882a593Smuzhiyun #define GSC_OUT_RGB_SD_WIDE (0 << 10) 125*4882a593Smuzhiyun #define GSC_OUT_YUV422_1P_ORDER_MASK (1 << 9) 126*4882a593Smuzhiyun #define GSC_OUT_YUV422_1P_ORDER_LSB_Y (0 << 9) 127*4882a593Smuzhiyun #define GSC_OUT_YUV422_1P_OEDER_LSB_C (1 << 9) 128*4882a593Smuzhiyun #define GSC_OUT_CHROMA_ORDER_MASK (1 << 8) 129*4882a593Smuzhiyun #define GSC_OUT_CHROMA_ORDER_CBCR (0 << 8) 130*4882a593Smuzhiyun #define GSC_OUT_CHROMA_ORDER_CRCB (1 << 8) 131*4882a593Smuzhiyun #define GSC_OUT_FORMAT_MASK (7 << 4) 132*4882a593Smuzhiyun #define GSC_OUT_XRGB8888 (0 << 4) 133*4882a593Smuzhiyun #define GSC_OUT_RGB565 (1 << 4) 134*4882a593Smuzhiyun #define GSC_OUT_YUV420_2P (2 << 4) 135*4882a593Smuzhiyun #define GSC_OUT_YUV420_3P (3 << 4) 136*4882a593Smuzhiyun #define GSC_OUT_YUV422_1P (4 << 4) 137*4882a593Smuzhiyun #define GSC_OUT_YUV422_2P (5 << 4) 138*4882a593Smuzhiyun #define GSC_OUT_YUV422_3P (6 << 4) 139*4882a593Smuzhiyun #define GSC_OUT_YUV444 (7 << 4) 140*4882a593Smuzhiyun #define GSC_OUT_TILE_TYPE_MASK (1 << 2) 141*4882a593Smuzhiyun #define GSC_OUT_TILE_C_16x8 (0 << 2) 142*4882a593Smuzhiyun #define GSC_OUT_TILE_C_16x16 (1 << 2) 143*4882a593Smuzhiyun #define GSC_OUT_TILE_MODE (1 << 1) 144*4882a593Smuzhiyun #define GSC_OUT_PATH_MASK (1 << 0) 145*4882a593Smuzhiyun #define GSC_OUT_PATH_LOCAL (1 << 0) 146*4882a593Smuzhiyun #define GSC_OUT_PATH_MEMORY (0 << 0) 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun /* G-Scaler scaled destination image size */ 149*4882a593Smuzhiyun #define GSC_SCALED_SIZE 0x24 150*4882a593Smuzhiyun #define GSC_SCALED_HEIGHT_MASK (0x1fff << 16) 151*4882a593Smuzhiyun #define GSC_SCALED_HEIGHT(x) ((x) << 16) 152*4882a593Smuzhiyun #define GSC_SCALED_WIDTH_MASK (0x1fff << 0) 153*4882a593Smuzhiyun #define GSC_SCALED_WIDTH(x) ((x) << 0) 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun /* G-Scaler pre scale ratio */ 156*4882a593Smuzhiyun #define GSC_PRE_SCALE_RATIO 0x28 157*4882a593Smuzhiyun #define GSC_PRESC_SHFACTOR_MASK (7 << 28) 158*4882a593Smuzhiyun #define GSC_PRESC_SHFACTOR(x) ((x) << 28) 159*4882a593Smuzhiyun #define GSC_PRESC_V_RATIO_MASK (7 << 16) 160*4882a593Smuzhiyun #define GSC_PRESC_V_RATIO(x) ((x) << 16) 161*4882a593Smuzhiyun #define GSC_PRESC_H_RATIO_MASK (7 << 0) 162*4882a593Smuzhiyun #define GSC_PRESC_H_RATIO(x) ((x) << 0) 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun /* G-Scaler main scale horizontal ratio */ 165*4882a593Smuzhiyun #define GSC_MAIN_H_RATIO 0x2C 166*4882a593Smuzhiyun #define GSC_MAIN_H_RATIO_MASK (0xfffff << 0) 167*4882a593Smuzhiyun #define GSC_MAIN_H_RATIO_VALUE(x) ((x) << 0) 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun /* G-Scaler main scale vertical ratio */ 170*4882a593Smuzhiyun #define GSC_MAIN_V_RATIO 0x30 171*4882a593Smuzhiyun #define GSC_MAIN_V_RATIO_MASK (0xfffff << 0) 172*4882a593Smuzhiyun #define GSC_MAIN_V_RATIO_VALUE(x) ((x) << 0) 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun /* G-Scaler input chrominance stride */ 175*4882a593Smuzhiyun #define GSC_IN_CHROM_STRIDE 0x3C 176*4882a593Smuzhiyun #define GSC_IN_CHROM_STRIDE_MASK (0x3fff << 0) 177*4882a593Smuzhiyun #define GSC_IN_CHROM_STRIDE_VALUE(x) ((x) << 0) 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun /* G-Scaler destination image size */ 180*4882a593Smuzhiyun #define GSC_DSTIMG_SIZE 0x40 181*4882a593Smuzhiyun #define GSC_DSTIMG_HEIGHT_MASK (0x1fff << 16) 182*4882a593Smuzhiyun #define GSC_DSTIMG_HEIGHT(x) ((x) << 16) 183*4882a593Smuzhiyun #define GSC_DSTIMG_WIDTH_MASK (0x1fff << 0) 184*4882a593Smuzhiyun #define GSC_DSTIMG_WIDTH(x) ((x) << 0) 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun /* G-Scaler destination image offset */ 187*4882a593Smuzhiyun #define GSC_DSTIMG_OFFSET 0x44 188*4882a593Smuzhiyun #define GSC_DSTIMG_OFFSET_Y_MASK (0x1fff << 16) 189*4882a593Smuzhiyun #define GSC_DSTIMG_OFFSET_Y(x) ((x) << 16) 190*4882a593Smuzhiyun #define GSC_DSTIMG_OFFSET_X_MASK (0x1fff << 0) 191*4882a593Smuzhiyun #define GSC_DSTIMG_OFFSET_X(x) ((x) << 0) 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun /* G-Scaler output chrominance stride */ 194*4882a593Smuzhiyun #define GSC_OUT_CHROM_STRIDE 0x48 195*4882a593Smuzhiyun #define GSC_OUT_CHROM_STRIDE_MASK (0x3fff << 0) 196*4882a593Smuzhiyun #define GSC_OUT_CHROM_STRIDE_VALUE(x) ((x) << 0) 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun /* G-Scaler input y address mask */ 199*4882a593Smuzhiyun #define GSC_IN_BASE_ADDR_Y_MASK 0x4C 200*4882a593Smuzhiyun /* G-Scaler input y base address */ 201*4882a593Smuzhiyun #define GSC_IN_BASE_ADDR_Y(n) (0x50 + (n) * 0x4) 202*4882a593Smuzhiyun /* G-Scaler input y base current address */ 203*4882a593Smuzhiyun #define GSC_IN_BASE_ADDR_Y_CUR(n) (0x60 + (n) * 0x4) 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun /* G-Scaler input cb address mask */ 206*4882a593Smuzhiyun #define GSC_IN_BASE_ADDR_CB_MASK 0x7C 207*4882a593Smuzhiyun /* G-Scaler input cb base address */ 208*4882a593Smuzhiyun #define GSC_IN_BASE_ADDR_CB(n) (0x80 + (n) * 0x4) 209*4882a593Smuzhiyun /* G-Scaler input cb base current address */ 210*4882a593Smuzhiyun #define GSC_IN_BASE_ADDR_CB_CUR(n) (0x90 + (n) * 0x4) 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun /* G-Scaler input cr address mask */ 213*4882a593Smuzhiyun #define GSC_IN_BASE_ADDR_CR_MASK 0xAC 214*4882a593Smuzhiyun /* G-Scaler input cr base address */ 215*4882a593Smuzhiyun #define GSC_IN_BASE_ADDR_CR(n) (0xB0 + (n) * 0x4) 216*4882a593Smuzhiyun /* G-Scaler input cr base current address */ 217*4882a593Smuzhiyun #define GSC_IN_BASE_ADDR_CR_CUR(n) (0xC0 + (n) * 0x4) 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun /* G-Scaler input address mask */ 220*4882a593Smuzhiyun #define GSC_IN_CURR_ADDR_INDEX (0xf << 24) 221*4882a593Smuzhiyun #define GSC_IN_CURR_GET_INDEX(x) ((x) >> 24) 222*4882a593Smuzhiyun #define GSC_IN_BASE_ADDR_PINGPONG(x) ((x) << 16) 223*4882a593Smuzhiyun #define GSC_IN_BASE_ADDR_MASK (0xff << 0) 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun /* G-Scaler output y address mask */ 226*4882a593Smuzhiyun #define GSC_OUT_BASE_ADDR_Y_MASK 0x10C 227*4882a593Smuzhiyun /* G-Scaler output y base address */ 228*4882a593Smuzhiyun #define GSC_OUT_BASE_ADDR_Y(n) (0x110 + (n) * 0x4) 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun /* G-Scaler output cb address mask */ 231*4882a593Smuzhiyun #define GSC_OUT_BASE_ADDR_CB_MASK 0x15C 232*4882a593Smuzhiyun /* G-Scaler output cb base address */ 233*4882a593Smuzhiyun #define GSC_OUT_BASE_ADDR_CB(n) (0x160 + (n) * 0x4) 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun /* G-Scaler output cr address mask */ 236*4882a593Smuzhiyun #define GSC_OUT_BASE_ADDR_CR_MASK 0x1AC 237*4882a593Smuzhiyun /* G-Scaler output cr base address */ 238*4882a593Smuzhiyun #define GSC_OUT_BASE_ADDR_CR(n) (0x1B0 + (n) * 0x4) 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun /* G-Scaler output address mask */ 241*4882a593Smuzhiyun #define GSC_OUT_CURR_ADDR_INDEX (0xf << 24) 242*4882a593Smuzhiyun #define GSC_OUT_CURR_GET_INDEX(x) ((x) >> 24) 243*4882a593Smuzhiyun #define GSC_OUT_BASE_ADDR_PINGPONG(x) ((x) << 16) 244*4882a593Smuzhiyun #define GSC_OUT_BASE_ADDR_MASK (0xffff << 0) 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun /* G-Scaler horizontal scaling filter */ 247*4882a593Smuzhiyun #define GSC_HCOEF(n, s, x) (0x300 + (n) * 0x4 + (s) * 0x30 + (x) * 0x300) 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun /* G-Scaler vertical scaling filter */ 250*4882a593Smuzhiyun #define GSC_VCOEF(n, s, x) (0x200 + (n) * 0x4 + (s) * 0x30 + (x) * 0x300) 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun /* G-Scaler BUS control */ 253*4882a593Smuzhiyun #define GSC_BUSCON 0xA78 254*4882a593Smuzhiyun #define GSC_BUSCON_INT_TIME_MASK (1 << 8) 255*4882a593Smuzhiyun #define GSC_BUSCON_INT_DATA_TRANS (0 << 8) 256*4882a593Smuzhiyun #define GSC_BUSCON_INT_AXI_RESPONSE (1 << 8) 257*4882a593Smuzhiyun #define GSC_BUSCON_AWCACHE(x) ((x) << 4) 258*4882a593Smuzhiyun #define GSC_BUSCON_ARCACHE(x) ((x) << 0) 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun /* G-Scaler V position */ 261*4882a593Smuzhiyun #define GSC_VPOSITION 0xA7C 262*4882a593Smuzhiyun #define GSC_VPOS_F(x) ((x) << 0) 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun /* G-Scaler clock initial count */ 266*4882a593Smuzhiyun #define GSC_CLK_INIT_COUNT 0xC00 267*4882a593Smuzhiyun #define GSC_CLK_GATE_MODE_INIT_CNT(x) ((x) << 0) 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun /* G-Scaler clock snoop count */ 270*4882a593Smuzhiyun #define GSC_CLK_SNOOP_COUNT 0xC04 271*4882a593Smuzhiyun #define GSC_CLK_GATE_MODE_SNOOP_CNT(x) ((x) << 0) 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun /* SYSCON. GSCBLK_CFG */ 274*4882a593Smuzhiyun #define SYSREG_GSCBLK_CFG1 0x0224 275*4882a593Smuzhiyun #define GSC_BLK_DISP1WB_DEST(x) (x << 10) 276*4882a593Smuzhiyun #define GSC_BLK_SW_RESET_WB_DEST(x) (1 << (18 + x)) 277*4882a593Smuzhiyun #define GSC_BLK_PXLASYNC_LO_MASK_WB(x) (0 << (14 + x)) 278*4882a593Smuzhiyun #define GSC_BLK_GSCL_WB_IN_SRC_SEL(x) (1 << (2 * x)) 279*4882a593Smuzhiyun #define SYSREG_GSCBLK_CFG2 0x2000 280*4882a593Smuzhiyun #define PXLASYNC_LO_MASK_CAMIF_GSCL(x) (1 << (x)) 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun #endif /* EXYNOS_REGS_GSC_H_ */ 283