1*4882a593Smuzhiyun // SPDX-License-Identifier: MIT
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2019 Google, Inc.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Authors:
6*4882a593Smuzhiyun * Sean Paul <seanpaul@chromium.org>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #include <linux/average.h>
9*4882a593Smuzhiyun #include <linux/bitops.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/workqueue.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <drm/drm_atomic.h>
14*4882a593Smuzhiyun #include <drm/drm_atomic_helper.h>
15*4882a593Smuzhiyun #include <drm/drm_connector.h>
16*4882a593Smuzhiyun #include <drm/drm_crtc.h>
17*4882a593Smuzhiyun #include <drm/drm_device.h>
18*4882a593Smuzhiyun #include <drm/drm_mode_config.h>
19*4882a593Smuzhiyun #include <drm/drm_modeset_lock.h>
20*4882a593Smuzhiyun #include <drm/drm_print.h>
21*4882a593Smuzhiyun #include <drm/drm_self_refresh_helper.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /**
24*4882a593Smuzhiyun * DOC: overview
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun * This helper library provides an easy way for drivers to leverage the atomic
27*4882a593Smuzhiyun * framework to implement panel self refresh (SR) support. Drivers are
28*4882a593Smuzhiyun * responsible for initializing and cleaning up the SR helpers on load/unload
29*4882a593Smuzhiyun * (see &drm_self_refresh_helper_init/&drm_self_refresh_helper_cleanup).
30*4882a593Smuzhiyun * The connector is responsible for setting
31*4882a593Smuzhiyun * &drm_connector_state.self_refresh_aware to true at runtime if it is SR-aware
32*4882a593Smuzhiyun * (meaning it knows how to initiate self refresh on the panel).
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun * Once a crtc has enabled SR using &drm_self_refresh_helper_init, the
35*4882a593Smuzhiyun * helpers will monitor activity and call back into the driver to enable/disable
36*4882a593Smuzhiyun * SR as appropriate. The best way to think about this is that it's a DPMS
37*4882a593Smuzhiyun * on/off request with &drm_crtc_state.self_refresh_active set in crtc state
38*4882a593Smuzhiyun * that tells you to disable/enable SR on the panel instead of power-cycling it.
39*4882a593Smuzhiyun *
40*4882a593Smuzhiyun * During SR, drivers may choose to fully disable their crtc/encoder/bridge
41*4882a593Smuzhiyun * hardware (in which case no driver changes are necessary), or they can inspect
42*4882a593Smuzhiyun * &drm_crtc_state.self_refresh_active if they want to enter low power mode
43*4882a593Smuzhiyun * without full disable (in case full disable/enable is too slow).
44*4882a593Smuzhiyun *
45*4882a593Smuzhiyun * SR will be deactivated if there are any atomic updates affecting the
46*4882a593Smuzhiyun * pipe that is in SR mode. If a crtc is driving multiple connectors, all
47*4882a593Smuzhiyun * connectors must be SR aware and all will enter/exit SR mode at the same time.
48*4882a593Smuzhiyun *
49*4882a593Smuzhiyun * If the crtc and connector are SR aware, but the panel connected does not
50*4882a593Smuzhiyun * support it (or is otherwise unable to enter SR), the driver should fail
51*4882a593Smuzhiyun * atomic_check when &drm_crtc_state.self_refresh_active is true.
52*4882a593Smuzhiyun */
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define SELF_REFRESH_AVG_SEED_MS 200
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun DECLARE_EWMA(psr_time, 4, 4)
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun struct drm_self_refresh_data {
59*4882a593Smuzhiyun struct drm_crtc *crtc;
60*4882a593Smuzhiyun struct delayed_work entry_work;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun struct mutex avg_mutex;
63*4882a593Smuzhiyun struct ewma_psr_time entry_avg_ms;
64*4882a593Smuzhiyun struct ewma_psr_time exit_avg_ms;
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun
drm_self_refresh_helper_entry_work(struct work_struct * work)67*4882a593Smuzhiyun static void drm_self_refresh_helper_entry_work(struct work_struct *work)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun struct drm_self_refresh_data *sr_data = container_of(
70*4882a593Smuzhiyun to_delayed_work(work),
71*4882a593Smuzhiyun struct drm_self_refresh_data, entry_work);
72*4882a593Smuzhiyun struct drm_crtc *crtc = sr_data->crtc;
73*4882a593Smuzhiyun struct drm_device *dev = crtc->dev;
74*4882a593Smuzhiyun struct drm_modeset_acquire_ctx ctx;
75*4882a593Smuzhiyun struct drm_atomic_state *state;
76*4882a593Smuzhiyun struct drm_connector *conn;
77*4882a593Smuzhiyun struct drm_connector_state *conn_state;
78*4882a593Smuzhiyun struct drm_crtc_state *crtc_state;
79*4882a593Smuzhiyun int i, ret = 0;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun drm_modeset_acquire_init(&ctx, 0);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun state = drm_atomic_state_alloc(dev);
84*4882a593Smuzhiyun if (!state) {
85*4882a593Smuzhiyun ret = -ENOMEM;
86*4882a593Smuzhiyun goto out_drop_locks;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun retry:
90*4882a593Smuzhiyun state->acquire_ctx = &ctx;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun crtc_state = drm_atomic_get_crtc_state(state, crtc);
93*4882a593Smuzhiyun if (IS_ERR(crtc_state)) {
94*4882a593Smuzhiyun ret = PTR_ERR(crtc_state);
95*4882a593Smuzhiyun goto out;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (!crtc_state->enable)
99*4882a593Smuzhiyun goto out;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun ret = drm_atomic_add_affected_connectors(state, crtc);
102*4882a593Smuzhiyun if (ret)
103*4882a593Smuzhiyun goto out;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun for_each_new_connector_in_state(state, conn, conn_state, i) {
106*4882a593Smuzhiyun if (!conn_state->self_refresh_aware)
107*4882a593Smuzhiyun goto out;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun crtc_state->active = false;
111*4882a593Smuzhiyun crtc_state->self_refresh_active = true;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun ret = drm_atomic_commit(state);
114*4882a593Smuzhiyun if (ret)
115*4882a593Smuzhiyun goto out;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun out:
118*4882a593Smuzhiyun if (ret == -EDEADLK) {
119*4882a593Smuzhiyun drm_atomic_state_clear(state);
120*4882a593Smuzhiyun ret = drm_modeset_backoff(&ctx);
121*4882a593Smuzhiyun if (!ret)
122*4882a593Smuzhiyun goto retry;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun drm_atomic_state_put(state);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun out_drop_locks:
128*4882a593Smuzhiyun drm_modeset_drop_locks(&ctx);
129*4882a593Smuzhiyun drm_modeset_acquire_fini(&ctx);
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun /**
133*4882a593Smuzhiyun * drm_self_refresh_helper_update_avg_times - Updates a crtc's SR time averages
134*4882a593Smuzhiyun * @state: the state which has just been applied to hardware
135*4882a593Smuzhiyun * @commit_time_ms: the amount of time in ms that this commit took to complete
136*4882a593Smuzhiyun * @new_self_refresh_mask: bitmask of crtc's that have self_refresh_active in
137*4882a593Smuzhiyun * new state
138*4882a593Smuzhiyun *
139*4882a593Smuzhiyun * Called after &drm_mode_config_funcs.atomic_commit_tail, this function will
140*4882a593Smuzhiyun * update the average entry/exit self refresh times on self refresh transitions.
141*4882a593Smuzhiyun * These averages will be used when calculating how long to delay before
142*4882a593Smuzhiyun * entering self refresh mode after activity.
143*4882a593Smuzhiyun */
144*4882a593Smuzhiyun void
drm_self_refresh_helper_update_avg_times(struct drm_atomic_state * state,unsigned int commit_time_ms,unsigned int new_self_refresh_mask)145*4882a593Smuzhiyun drm_self_refresh_helper_update_avg_times(struct drm_atomic_state *state,
146*4882a593Smuzhiyun unsigned int commit_time_ms,
147*4882a593Smuzhiyun unsigned int new_self_refresh_mask)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun struct drm_crtc *crtc;
150*4882a593Smuzhiyun struct drm_crtc_state *old_crtc_state;
151*4882a593Smuzhiyun int i;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) {
154*4882a593Smuzhiyun bool new_self_refresh_active = new_self_refresh_mask & BIT(i);
155*4882a593Smuzhiyun struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;
156*4882a593Smuzhiyun struct ewma_psr_time *time;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if (old_crtc_state->self_refresh_active ==
159*4882a593Smuzhiyun new_self_refresh_active)
160*4882a593Smuzhiyun continue;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun if (new_self_refresh_active)
163*4882a593Smuzhiyun time = &sr_data->entry_avg_ms;
164*4882a593Smuzhiyun else
165*4882a593Smuzhiyun time = &sr_data->exit_avg_ms;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun mutex_lock(&sr_data->avg_mutex);
168*4882a593Smuzhiyun ewma_psr_time_add(time, commit_time_ms);
169*4882a593Smuzhiyun mutex_unlock(&sr_data->avg_mutex);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun EXPORT_SYMBOL(drm_self_refresh_helper_update_avg_times);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun /**
175*4882a593Smuzhiyun * drm_self_refresh_helper_alter_state - Alters the atomic state for SR exit
176*4882a593Smuzhiyun * @state: the state currently being checked
177*4882a593Smuzhiyun *
178*4882a593Smuzhiyun * Called at the end of atomic check. This function checks the state for flags
179*4882a593Smuzhiyun * incompatible with self refresh exit and changes them. This is a bit
180*4882a593Smuzhiyun * disingenuous since userspace is expecting one thing and we're giving it
181*4882a593Smuzhiyun * another. However in order to keep self refresh entirely hidden from
182*4882a593Smuzhiyun * userspace, this is required.
183*4882a593Smuzhiyun *
184*4882a593Smuzhiyun * At the end, we queue up the self refresh entry work so we can enter PSR after
185*4882a593Smuzhiyun * the desired delay.
186*4882a593Smuzhiyun */
drm_self_refresh_helper_alter_state(struct drm_atomic_state * state)187*4882a593Smuzhiyun void drm_self_refresh_helper_alter_state(struct drm_atomic_state *state)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun struct drm_crtc *crtc;
190*4882a593Smuzhiyun struct drm_crtc_state *crtc_state;
191*4882a593Smuzhiyun int i;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun if (state->async_update || !state->allow_modeset) {
194*4882a593Smuzhiyun for_each_old_crtc_in_state(state, crtc, crtc_state, i) {
195*4882a593Smuzhiyun if (crtc_state->self_refresh_active) {
196*4882a593Smuzhiyun state->async_update = false;
197*4882a593Smuzhiyun state->allow_modeset = true;
198*4882a593Smuzhiyun break;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
204*4882a593Smuzhiyun struct drm_self_refresh_data *sr_data;
205*4882a593Smuzhiyun unsigned int delay;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /* Don't trigger the entry timer when we're already in SR */
208*4882a593Smuzhiyun if (crtc_state->self_refresh_active)
209*4882a593Smuzhiyun continue;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun sr_data = crtc->self_refresh_data;
212*4882a593Smuzhiyun if (!sr_data)
213*4882a593Smuzhiyun continue;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun mutex_lock(&sr_data->avg_mutex);
216*4882a593Smuzhiyun delay = (ewma_psr_time_read(&sr_data->entry_avg_ms) +
217*4882a593Smuzhiyun ewma_psr_time_read(&sr_data->exit_avg_ms)) * 2;
218*4882a593Smuzhiyun mutex_unlock(&sr_data->avg_mutex);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun mod_delayed_work(system_wq, &sr_data->entry_work,
221*4882a593Smuzhiyun msecs_to_jiffies(delay));
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun EXPORT_SYMBOL(drm_self_refresh_helper_alter_state);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun /**
227*4882a593Smuzhiyun * drm_self_refresh_helper_init - Initializes self refresh helpers for a crtc
228*4882a593Smuzhiyun * @crtc: the crtc which supports self refresh supported displays
229*4882a593Smuzhiyun *
230*4882a593Smuzhiyun * Returns zero if successful or -errno on failure
231*4882a593Smuzhiyun */
drm_self_refresh_helper_init(struct drm_crtc * crtc)232*4882a593Smuzhiyun int drm_self_refresh_helper_init(struct drm_crtc *crtc)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun /* Helper is already initialized */
237*4882a593Smuzhiyun if (WARN_ON(sr_data))
238*4882a593Smuzhiyun return -EINVAL;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun sr_data = kzalloc(sizeof(*sr_data), GFP_KERNEL);
241*4882a593Smuzhiyun if (!sr_data)
242*4882a593Smuzhiyun return -ENOMEM;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun INIT_DELAYED_WORK(&sr_data->entry_work,
245*4882a593Smuzhiyun drm_self_refresh_helper_entry_work);
246*4882a593Smuzhiyun sr_data->crtc = crtc;
247*4882a593Smuzhiyun mutex_init(&sr_data->avg_mutex);
248*4882a593Smuzhiyun ewma_psr_time_init(&sr_data->entry_avg_ms);
249*4882a593Smuzhiyun ewma_psr_time_init(&sr_data->exit_avg_ms);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun /*
252*4882a593Smuzhiyun * Seed the averages so they're non-zero (and sufficiently large
253*4882a593Smuzhiyun * for even poorly performing panels). As time goes on, this will be
254*4882a593Smuzhiyun * averaged out and the values will trend to their true value.
255*4882a593Smuzhiyun */
256*4882a593Smuzhiyun ewma_psr_time_add(&sr_data->entry_avg_ms, SELF_REFRESH_AVG_SEED_MS);
257*4882a593Smuzhiyun ewma_psr_time_add(&sr_data->exit_avg_ms, SELF_REFRESH_AVG_SEED_MS);
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun crtc->self_refresh_data = sr_data;
260*4882a593Smuzhiyun return 0;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun EXPORT_SYMBOL(drm_self_refresh_helper_init);
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /**
265*4882a593Smuzhiyun * drm_self_refresh_helper_cleanup - Cleans up self refresh helpers for a crtc
266*4882a593Smuzhiyun * @crtc: the crtc to cleanup
267*4882a593Smuzhiyun */
drm_self_refresh_helper_cleanup(struct drm_crtc * crtc)268*4882a593Smuzhiyun void drm_self_refresh_helper_cleanup(struct drm_crtc *crtc)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun struct drm_self_refresh_data *sr_data = crtc->self_refresh_data;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /* Helper is already uninitialized */
273*4882a593Smuzhiyun if (!sr_data)
274*4882a593Smuzhiyun return;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun crtc->self_refresh_data = NULL;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun cancel_delayed_work_sync(&sr_data->entry_work);
279*4882a593Smuzhiyun kfree(sr_data);
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun EXPORT_SYMBOL(drm_self_refresh_helper_cleanup);
282