1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2011 Freescale Semiconductor, Inc. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __DW_HDMI_H__ 7*4882a593Smuzhiyun #define __DW_HDMI_H__ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun /* Identification Registers */ 10*4882a593Smuzhiyun #define HDMI_DESIGN_ID 0x0000 11*4882a593Smuzhiyun #define HDMI_REVISION_ID 0x0001 12*4882a593Smuzhiyun #define HDMI_PRODUCT_ID0 0x0002 13*4882a593Smuzhiyun #define HDMI_PRODUCT_ID1 0x0003 14*4882a593Smuzhiyun #define HDMI_CONFIG0_ID 0x0004 15*4882a593Smuzhiyun #define HDMI_CONFIG1_ID 0x0005 16*4882a593Smuzhiyun #define HDMI_CONFIG2_ID 0x0006 17*4882a593Smuzhiyun #define HDMI_CONFIG3_ID 0x0007 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* Interrupt Registers */ 20*4882a593Smuzhiyun #define HDMI_IH_FC_STAT0 0x0100 21*4882a593Smuzhiyun #define HDMI_IH_FC_STAT1 0x0101 22*4882a593Smuzhiyun #define HDMI_IH_FC_STAT2 0x0102 23*4882a593Smuzhiyun #define HDMI_IH_AS_STAT0 0x0103 24*4882a593Smuzhiyun #define HDMI_IH_PHY_STAT0 0x0104 25*4882a593Smuzhiyun #define HDMI_IH_I2CM_STAT0 0x0105 26*4882a593Smuzhiyun #define HDMI_IH_CEC_STAT0 0x0106 27*4882a593Smuzhiyun #define HDMI_IH_VP_STAT0 0x0107 28*4882a593Smuzhiyun #define HDMI_IH_I2CMPHY_STAT0 0x0108 29*4882a593Smuzhiyun #define HDMI_IH_AHBDMAAUD_STAT0 0x0109 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define HDMI_IH_MUTE_FC_STAT0 0x0180 32*4882a593Smuzhiyun #define HDMI_IH_MUTE_FC_STAT1 0x0181 33*4882a593Smuzhiyun #define HDMI_IH_MUTE_FC_STAT2 0x0182 34*4882a593Smuzhiyun #define HDMI_IH_MUTE_AS_STAT0 0x0183 35*4882a593Smuzhiyun #define HDMI_IH_MUTE_PHY_STAT0 0x0184 36*4882a593Smuzhiyun #define HDMI_IH_MUTE_I2CM_STAT0 0x0185 37*4882a593Smuzhiyun #define HDMI_IH_MUTE_CEC_STAT0 0x0186 38*4882a593Smuzhiyun #define HDMI_IH_MUTE_VP_STAT0 0x0187 39*4882a593Smuzhiyun #define HDMI_IH_MUTE_I2CMPHY_STAT0 0x0188 40*4882a593Smuzhiyun #define HDMI_IH_MUTE_AHBDMAAUD_STAT0 0x0189 41*4882a593Smuzhiyun #define HDMI_IH_MUTE 0x01FF 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun /* Video Sample Registers */ 44*4882a593Smuzhiyun #define HDMI_TX_INVID0 0x0200 45*4882a593Smuzhiyun #define HDMI_TX_INSTUFFING 0x0201 46*4882a593Smuzhiyun #define HDMI_TX_GYDATA0 0x0202 47*4882a593Smuzhiyun #define HDMI_TX_GYDATA1 0x0203 48*4882a593Smuzhiyun #define HDMI_TX_RCRDATA0 0x0204 49*4882a593Smuzhiyun #define HDMI_TX_RCRDATA1 0x0205 50*4882a593Smuzhiyun #define HDMI_TX_BCBDATA0 0x0206 51*4882a593Smuzhiyun #define HDMI_TX_BCBDATA1 0x0207 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* Video Packetizer Registers */ 54*4882a593Smuzhiyun #define HDMI_VP_STATUS 0x0800 55*4882a593Smuzhiyun #define HDMI_VP_PR_CD 0x0801 56*4882a593Smuzhiyun #define HDMI_VP_STUFF 0x0802 57*4882a593Smuzhiyun #define HDMI_VP_REMAP 0x0803 58*4882a593Smuzhiyun #define HDMI_VP_CONF 0x0804 59*4882a593Smuzhiyun #define HDMI_VP_STAT 0x0805 60*4882a593Smuzhiyun #define HDMI_VP_INT 0x0806 61*4882a593Smuzhiyun #define HDMI_VP_MASK 0x0807 62*4882a593Smuzhiyun #define HDMI_VP_POL 0x0808 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /* Frame Composer Registers */ 65*4882a593Smuzhiyun #define HDMI_FC_INVIDCONF 0x1000 66*4882a593Smuzhiyun #define HDMI_FC_INHACTV0 0x1001 67*4882a593Smuzhiyun #define HDMI_FC_INHACTV1 0x1002 68*4882a593Smuzhiyun #define HDMI_FC_INHBLANK0 0x1003 69*4882a593Smuzhiyun #define HDMI_FC_INHBLANK1 0x1004 70*4882a593Smuzhiyun #define HDMI_FC_INVACTV0 0x1005 71*4882a593Smuzhiyun #define HDMI_FC_INVACTV1 0x1006 72*4882a593Smuzhiyun #define HDMI_FC_INVBLANK 0x1007 73*4882a593Smuzhiyun #define HDMI_FC_HSYNCINDELAY0 0x1008 74*4882a593Smuzhiyun #define HDMI_FC_HSYNCINDELAY1 0x1009 75*4882a593Smuzhiyun #define HDMI_FC_HSYNCINWIDTH0 0x100A 76*4882a593Smuzhiyun #define HDMI_FC_HSYNCINWIDTH1 0x100B 77*4882a593Smuzhiyun #define HDMI_FC_VSYNCINDELAY 0x100C 78*4882a593Smuzhiyun #define HDMI_FC_VSYNCINWIDTH 0x100D 79*4882a593Smuzhiyun #define HDMI_FC_INFREQ0 0x100E 80*4882a593Smuzhiyun #define HDMI_FC_INFREQ1 0x100F 81*4882a593Smuzhiyun #define HDMI_FC_INFREQ2 0x1010 82*4882a593Smuzhiyun #define HDMI_FC_CTRLDUR 0x1011 83*4882a593Smuzhiyun #define HDMI_FC_EXCTRLDUR 0x1012 84*4882a593Smuzhiyun #define HDMI_FC_EXCTRLSPAC 0x1013 85*4882a593Smuzhiyun #define HDMI_FC_CH0PREAM 0x1014 86*4882a593Smuzhiyun #define HDMI_FC_CH1PREAM 0x1015 87*4882a593Smuzhiyun #define HDMI_FC_CH2PREAM 0x1016 88*4882a593Smuzhiyun #define HDMI_FC_AVICONF3 0x1017 89*4882a593Smuzhiyun #define HDMI_FC_GCP 0x1018 90*4882a593Smuzhiyun #define HDMI_FC_AVICONF0 0x1019 91*4882a593Smuzhiyun #define HDMI_FC_AVICONF1 0x101A 92*4882a593Smuzhiyun #define HDMI_FC_AVICONF2 0x101B 93*4882a593Smuzhiyun #define HDMI_FC_AVIVID 0x101C 94*4882a593Smuzhiyun #define HDMI_FC_AVIETB0 0x101D 95*4882a593Smuzhiyun #define HDMI_FC_AVIETB1 0x101E 96*4882a593Smuzhiyun #define HDMI_FC_AVISBB0 0x101F 97*4882a593Smuzhiyun #define HDMI_FC_AVISBB1 0x1020 98*4882a593Smuzhiyun #define HDMI_FC_AVIELB0 0x1021 99*4882a593Smuzhiyun #define HDMI_FC_AVIELB1 0x1022 100*4882a593Smuzhiyun #define HDMI_FC_AVISRB0 0x1023 101*4882a593Smuzhiyun #define HDMI_FC_AVISRB1 0x1024 102*4882a593Smuzhiyun #define HDMI_FC_AUDICONF0 0x1025 103*4882a593Smuzhiyun #define HDMI_FC_AUDICONF1 0x1026 104*4882a593Smuzhiyun #define HDMI_FC_AUDICONF2 0x1027 105*4882a593Smuzhiyun #define HDMI_FC_AUDICONF3 0x1028 106*4882a593Smuzhiyun #define HDMI_FC_VSDIEEEID0 0x1029 107*4882a593Smuzhiyun #define HDMI_FC_VSDSIZE 0x102A 108*4882a593Smuzhiyun #define HDMI_FC_VSDIEEEID1 0x1030 109*4882a593Smuzhiyun #define HDMI_FC_VSDIEEEID2 0x1031 110*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD0 0x1032 111*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD1 0x1033 112*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD2 0x1034 113*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD3 0x1035 114*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD4 0x1036 115*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD5 0x1037 116*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD6 0x1038 117*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD7 0x1039 118*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD8 0x103A 119*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD9 0x103B 120*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD10 0x103C 121*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD11 0x103D 122*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD12 0x103E 123*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD13 0x103F 124*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD14 0x1040 125*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD15 0x1041 126*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD16 0x1042 127*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD17 0x1043 128*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD18 0x1044 129*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD19 0x1045 130*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD20 0x1046 131*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD21 0x1047 132*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD22 0x1048 133*4882a593Smuzhiyun #define HDMI_FC_VSDPAYLOAD23 0x1049 134*4882a593Smuzhiyun #define HDMI_FC_SPDVENDORNAME0 0x104A 135*4882a593Smuzhiyun #define HDMI_FC_SPDVENDORNAME1 0x104B 136*4882a593Smuzhiyun #define HDMI_FC_SPDVENDORNAME2 0x104C 137*4882a593Smuzhiyun #define HDMI_FC_SPDVENDORNAME3 0x104D 138*4882a593Smuzhiyun #define HDMI_FC_SPDVENDORNAME4 0x104E 139*4882a593Smuzhiyun #define HDMI_FC_SPDVENDORNAME5 0x104F 140*4882a593Smuzhiyun #define HDMI_FC_SPDVENDORNAME6 0x1050 141*4882a593Smuzhiyun #define HDMI_FC_SPDVENDORNAME7 0x1051 142*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME0 0x1052 143*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME1 0x1053 144*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME2 0x1054 145*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME3 0x1055 146*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME4 0x1056 147*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME5 0x1057 148*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME6 0x1058 149*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME7 0x1059 150*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME8 0x105A 151*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME9 0x105B 152*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME10 0x105C 153*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME11 0x105D 154*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME12 0x105E 155*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME13 0x105F 156*4882a593Smuzhiyun #define HDMI_FC_SDPPRODUCTNAME14 0x1060 157*4882a593Smuzhiyun #define HDMI_FC_SPDPRODUCTNAME15 0x1061 158*4882a593Smuzhiyun #define HDMI_FC_SPDDEVICEINF 0x1062 159*4882a593Smuzhiyun #define HDMI_FC_AUDSCONF 0x1063 160*4882a593Smuzhiyun #define HDMI_FC_AUDSSTAT 0x1064 161*4882a593Smuzhiyun #define HDMI_FC_AUDSCHNLS7 0x106e 162*4882a593Smuzhiyun #define HDMI_FC_AUDSCHNLS8 0x106f 163*4882a593Smuzhiyun #define HDMI_FC_DATACH0FILL 0x1070 164*4882a593Smuzhiyun #define HDMI_FC_DATACH1FILL 0x1071 165*4882a593Smuzhiyun #define HDMI_FC_DATACH2FILL 0x1072 166*4882a593Smuzhiyun #define HDMI_FC_CTRLQHIGH 0x1073 167*4882a593Smuzhiyun #define HDMI_FC_CTRLQLOW 0x1074 168*4882a593Smuzhiyun #define HDMI_FC_ACP0 0x1075 169*4882a593Smuzhiyun #define HDMI_FC_ACP28 0x1076 170*4882a593Smuzhiyun #define HDMI_FC_ACP27 0x1077 171*4882a593Smuzhiyun #define HDMI_FC_ACP26 0x1078 172*4882a593Smuzhiyun #define HDMI_FC_ACP25 0x1079 173*4882a593Smuzhiyun #define HDMI_FC_ACP24 0x107A 174*4882a593Smuzhiyun #define HDMI_FC_ACP23 0x107B 175*4882a593Smuzhiyun #define HDMI_FC_ACP22 0x107C 176*4882a593Smuzhiyun #define HDMI_FC_ACP21 0x107D 177*4882a593Smuzhiyun #define HDMI_FC_ACP20 0x107E 178*4882a593Smuzhiyun #define HDMI_FC_ACP19 0x107F 179*4882a593Smuzhiyun #define HDMI_FC_ACP18 0x1080 180*4882a593Smuzhiyun #define HDMI_FC_ACP17 0x1081 181*4882a593Smuzhiyun #define HDMI_FC_ACP16 0x1082 182*4882a593Smuzhiyun #define HDMI_FC_ACP15 0x1083 183*4882a593Smuzhiyun #define HDMI_FC_ACP14 0x1084 184*4882a593Smuzhiyun #define HDMI_FC_ACP13 0x1085 185*4882a593Smuzhiyun #define HDMI_FC_ACP12 0x1086 186*4882a593Smuzhiyun #define HDMI_FC_ACP11 0x1087 187*4882a593Smuzhiyun #define HDMI_FC_ACP10 0x1088 188*4882a593Smuzhiyun #define HDMI_FC_ACP9 0x1089 189*4882a593Smuzhiyun #define HDMI_FC_ACP8 0x108A 190*4882a593Smuzhiyun #define HDMI_FC_ACP7 0x108B 191*4882a593Smuzhiyun #define HDMI_FC_ACP6 0x108C 192*4882a593Smuzhiyun #define HDMI_FC_ACP5 0x108D 193*4882a593Smuzhiyun #define HDMI_FC_ACP4 0x108E 194*4882a593Smuzhiyun #define HDMI_FC_ACP3 0x108F 195*4882a593Smuzhiyun #define HDMI_FC_ACP2 0x1090 196*4882a593Smuzhiyun #define HDMI_FC_ACP1 0x1091 197*4882a593Smuzhiyun #define HDMI_FC_ISCR1_0 0x1092 198*4882a593Smuzhiyun #define HDMI_FC_ISCR1_16 0x1093 199*4882a593Smuzhiyun #define HDMI_FC_ISCR1_15 0x1094 200*4882a593Smuzhiyun #define HDMI_FC_ISCR1_14 0x1095 201*4882a593Smuzhiyun #define HDMI_FC_ISCR1_13 0x1096 202*4882a593Smuzhiyun #define HDMI_FC_ISCR1_12 0x1097 203*4882a593Smuzhiyun #define HDMI_FC_ISCR1_11 0x1098 204*4882a593Smuzhiyun #define HDMI_FC_ISCR1_10 0x1099 205*4882a593Smuzhiyun #define HDMI_FC_ISCR1_9 0x109A 206*4882a593Smuzhiyun #define HDMI_FC_ISCR1_8 0x109B 207*4882a593Smuzhiyun #define HDMI_FC_ISCR1_7 0x109C 208*4882a593Smuzhiyun #define HDMI_FC_ISCR1_6 0x109D 209*4882a593Smuzhiyun #define HDMI_FC_ISCR1_5 0x109E 210*4882a593Smuzhiyun #define HDMI_FC_ISCR1_4 0x109F 211*4882a593Smuzhiyun #define HDMI_FC_ISCR1_3 0x10A0 212*4882a593Smuzhiyun #define HDMI_FC_ISCR1_2 0x10A1 213*4882a593Smuzhiyun #define HDMI_FC_ISCR1_1 0x10A2 214*4882a593Smuzhiyun #define HDMI_FC_ISCR2_15 0x10A3 215*4882a593Smuzhiyun #define HDMI_FC_ISCR2_14 0x10A4 216*4882a593Smuzhiyun #define HDMI_FC_ISCR2_13 0x10A5 217*4882a593Smuzhiyun #define HDMI_FC_ISCR2_12 0x10A6 218*4882a593Smuzhiyun #define HDMI_FC_ISCR2_11 0x10A7 219*4882a593Smuzhiyun #define HDMI_FC_ISCR2_10 0x10A8 220*4882a593Smuzhiyun #define HDMI_FC_ISCR2_9 0x10A9 221*4882a593Smuzhiyun #define HDMI_FC_ISCR2_8 0x10AA 222*4882a593Smuzhiyun #define HDMI_FC_ISCR2_7 0x10AB 223*4882a593Smuzhiyun #define HDMI_FC_ISCR2_6 0x10AC 224*4882a593Smuzhiyun #define HDMI_FC_ISCR2_5 0x10AD 225*4882a593Smuzhiyun #define HDMI_FC_ISCR2_4 0x10AE 226*4882a593Smuzhiyun #define HDMI_FC_ISCR2_3 0x10AF 227*4882a593Smuzhiyun #define HDMI_FC_ISCR2_2 0x10B0 228*4882a593Smuzhiyun #define HDMI_FC_ISCR2_1 0x10B1 229*4882a593Smuzhiyun #define HDMI_FC_ISCR2_0 0x10B2 230*4882a593Smuzhiyun #define HDMI_FC_DATAUTO0 0x10B3 231*4882a593Smuzhiyun #define HDMI_FC_DATAUTO1 0x10B4 232*4882a593Smuzhiyun #define HDMI_FC_DATAUTO2 0x10B5 233*4882a593Smuzhiyun #define HDMI_FC_DATMAN 0x10B6 234*4882a593Smuzhiyun #define HDMI_FC_DATAUTO3 0x10B7 235*4882a593Smuzhiyun #define HDMI_FC_RDRB0 0x10B8 236*4882a593Smuzhiyun #define HDMI_FC_RDRB1 0x10B9 237*4882a593Smuzhiyun #define HDMI_FC_RDRB2 0x10BA 238*4882a593Smuzhiyun #define HDMI_FC_RDRB3 0x10BB 239*4882a593Smuzhiyun #define HDMI_FC_RDRB4 0x10BC 240*4882a593Smuzhiyun #define HDMI_FC_RDRB5 0x10BD 241*4882a593Smuzhiyun #define HDMI_FC_RDRB6 0x10BE 242*4882a593Smuzhiyun #define HDMI_FC_RDRB7 0x10BF 243*4882a593Smuzhiyun #define HDMI_FC_STAT0 0x10D0 244*4882a593Smuzhiyun #define HDMI_FC_INT0 0x10D1 245*4882a593Smuzhiyun #define HDMI_FC_MASK0 0x10D2 246*4882a593Smuzhiyun #define HDMI_FC_POL0 0x10D3 247*4882a593Smuzhiyun #define HDMI_FC_STAT1 0x10D4 248*4882a593Smuzhiyun #define HDMI_FC_INT1 0x10D5 249*4882a593Smuzhiyun #define HDMI_FC_MASK1 0x10D6 250*4882a593Smuzhiyun #define HDMI_FC_POL1 0x10D7 251*4882a593Smuzhiyun #define HDMI_FC_STAT2 0x10D8 252*4882a593Smuzhiyun #define HDMI_FC_INT2 0x10D9 253*4882a593Smuzhiyun #define HDMI_FC_MASK2 0x10DA 254*4882a593Smuzhiyun #define HDMI_FC_POL2 0x10DB 255*4882a593Smuzhiyun #define HDMI_FC_PRCONF 0x10E0 256*4882a593Smuzhiyun #define HDMI_FC_SCRAMBLER_CTRL 0x10E1 257*4882a593Smuzhiyun #define HDMI_FC_PACKET_TX_EN 0x10E3 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun #define HDMI_FC_GMD_STAT 0x1100 260*4882a593Smuzhiyun #define HDMI_FC_GMD_EN 0x1101 261*4882a593Smuzhiyun #define HDMI_FC_GMD_UP 0x1102 262*4882a593Smuzhiyun #define HDMI_FC_GMD_CONF 0x1103 263*4882a593Smuzhiyun #define HDMI_FC_GMD_HB 0x1104 264*4882a593Smuzhiyun #define HDMI_FC_GMD_PB0 0x1105 265*4882a593Smuzhiyun #define HDMI_FC_GMD_PB1 0x1106 266*4882a593Smuzhiyun #define HDMI_FC_GMD_PB2 0x1107 267*4882a593Smuzhiyun #define HDMI_FC_GMD_PB3 0x1108 268*4882a593Smuzhiyun #define HDMI_FC_GMD_PB4 0x1109 269*4882a593Smuzhiyun #define HDMI_FC_GMD_PB5 0x110A 270*4882a593Smuzhiyun #define HDMI_FC_GMD_PB6 0x110B 271*4882a593Smuzhiyun #define HDMI_FC_GMD_PB7 0x110C 272*4882a593Smuzhiyun #define HDMI_FC_GMD_PB8 0x110D 273*4882a593Smuzhiyun #define HDMI_FC_GMD_PB9 0x110E 274*4882a593Smuzhiyun #define HDMI_FC_GMD_PB10 0x110F 275*4882a593Smuzhiyun #define HDMI_FC_GMD_PB11 0x1110 276*4882a593Smuzhiyun #define HDMI_FC_GMD_PB12 0x1111 277*4882a593Smuzhiyun #define HDMI_FC_GMD_PB13 0x1112 278*4882a593Smuzhiyun #define HDMI_FC_GMD_PB14 0x1113 279*4882a593Smuzhiyun #define HDMI_FC_GMD_PB15 0x1114 280*4882a593Smuzhiyun #define HDMI_FC_GMD_PB16 0x1115 281*4882a593Smuzhiyun #define HDMI_FC_GMD_PB17 0x1116 282*4882a593Smuzhiyun #define HDMI_FC_GMD_PB18 0x1117 283*4882a593Smuzhiyun #define HDMI_FC_GMD_PB19 0x1118 284*4882a593Smuzhiyun #define HDMI_FC_GMD_PB20 0x1119 285*4882a593Smuzhiyun #define HDMI_FC_GMD_PB21 0x111A 286*4882a593Smuzhiyun #define HDMI_FC_GMD_PB22 0x111B 287*4882a593Smuzhiyun #define HDMI_FC_GMD_PB23 0x111C 288*4882a593Smuzhiyun #define HDMI_FC_GMD_PB24 0x111D 289*4882a593Smuzhiyun #define HDMI_FC_GMD_PB25 0x111E 290*4882a593Smuzhiyun #define HDMI_FC_GMD_PB26 0x111F 291*4882a593Smuzhiyun #define HDMI_FC_GMD_PB27 0x1120 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun #define HDMI_FC_DRM_UP 0x1167 294*4882a593Smuzhiyun #define HDMI_FC_DRM_HB0 0x1168 295*4882a593Smuzhiyun #define HDMI_FC_DRM_HB1 0x1169 296*4882a593Smuzhiyun #define HDMI_FC_DRM_PB0 0x116A 297*4882a593Smuzhiyun #define HDMI_FC_DRM_PB1 0x116B 298*4882a593Smuzhiyun #define HDMI_FC_DRM_PB2 0x116C 299*4882a593Smuzhiyun #define HDMI_FC_DRM_PB3 0x116D 300*4882a593Smuzhiyun #define HDMI_FC_DRM_PB4 0x116E 301*4882a593Smuzhiyun #define HDMI_FC_DRM_PB5 0x116F 302*4882a593Smuzhiyun #define HDMI_FC_DRM_PB6 0x1170 303*4882a593Smuzhiyun #define HDMI_FC_DRM_PB7 0x1171 304*4882a593Smuzhiyun #define HDMI_FC_DRM_PB8 0x1172 305*4882a593Smuzhiyun #define HDMI_FC_DRM_PB9 0x1173 306*4882a593Smuzhiyun #define HDMI_FC_DRM_PB10 0x1174 307*4882a593Smuzhiyun #define HDMI_FC_DRM_PB11 0x1175 308*4882a593Smuzhiyun #define HDMI_FC_DRM_PB12 0x1176 309*4882a593Smuzhiyun #define HDMI_FC_DRM_PB13 0x1177 310*4882a593Smuzhiyun #define HDMI_FC_DRM_PB14 0x1178 311*4882a593Smuzhiyun #define HDMI_FC_DRM_PB15 0x1179 312*4882a593Smuzhiyun #define HDMI_FC_DRM_PB16 0x117A 313*4882a593Smuzhiyun #define HDMI_FC_DRM_PB17 0x117B 314*4882a593Smuzhiyun #define HDMI_FC_DRM_PB18 0x117C 315*4882a593Smuzhiyun #define HDMI_FC_DRM_PB19 0x117D 316*4882a593Smuzhiyun #define HDMI_FC_DRM_PB20 0x117E 317*4882a593Smuzhiyun #define HDMI_FC_DRM_PB21 0x117F 318*4882a593Smuzhiyun #define HDMI_FC_DRM_PB22 0x1180 319*4882a593Smuzhiyun #define HDMI_FC_DRM_PB23 0x1181 320*4882a593Smuzhiyun #define HDMI_FC_DRM_PB24 0x1182 321*4882a593Smuzhiyun #define HDMI_FC_DRM_PB25 0x1183 322*4882a593Smuzhiyun #define HDMI_FC_DRM_PB26 0x1184 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun #define HDMI_FC_DBGFORCE 0x1200 325*4882a593Smuzhiyun #define HDMI_FC_DBGAUD0CH0 0x1201 326*4882a593Smuzhiyun #define HDMI_FC_DBGAUD1CH0 0x1202 327*4882a593Smuzhiyun #define HDMI_FC_DBGAUD2CH0 0x1203 328*4882a593Smuzhiyun #define HDMI_FC_DBGAUD0CH1 0x1204 329*4882a593Smuzhiyun #define HDMI_FC_DBGAUD1CH1 0x1205 330*4882a593Smuzhiyun #define HDMI_FC_DBGAUD2CH1 0x1206 331*4882a593Smuzhiyun #define HDMI_FC_DBGAUD0CH2 0x1207 332*4882a593Smuzhiyun #define HDMI_FC_DBGAUD1CH2 0x1208 333*4882a593Smuzhiyun #define HDMI_FC_DBGAUD2CH2 0x1209 334*4882a593Smuzhiyun #define HDMI_FC_DBGAUD0CH3 0x120A 335*4882a593Smuzhiyun #define HDMI_FC_DBGAUD1CH3 0x120B 336*4882a593Smuzhiyun #define HDMI_FC_DBGAUD2CH3 0x120C 337*4882a593Smuzhiyun #define HDMI_FC_DBGAUD0CH4 0x120D 338*4882a593Smuzhiyun #define HDMI_FC_DBGAUD1CH4 0x120E 339*4882a593Smuzhiyun #define HDMI_FC_DBGAUD2CH4 0x120F 340*4882a593Smuzhiyun #define HDMI_FC_DBGAUD0CH5 0x1210 341*4882a593Smuzhiyun #define HDMI_FC_DBGAUD1CH5 0x1211 342*4882a593Smuzhiyun #define HDMI_FC_DBGAUD2CH5 0x1212 343*4882a593Smuzhiyun #define HDMI_FC_DBGAUD0CH6 0x1213 344*4882a593Smuzhiyun #define HDMI_FC_DBGAUD1CH6 0x1214 345*4882a593Smuzhiyun #define HDMI_FC_DBGAUD2CH6 0x1215 346*4882a593Smuzhiyun #define HDMI_FC_DBGAUD0CH7 0x1216 347*4882a593Smuzhiyun #define HDMI_FC_DBGAUD1CH7 0x1217 348*4882a593Smuzhiyun #define HDMI_FC_DBGAUD2CH7 0x1218 349*4882a593Smuzhiyun #define HDMI_FC_DBGTMDS0 0x1219 350*4882a593Smuzhiyun #define HDMI_FC_DBGTMDS1 0x121A 351*4882a593Smuzhiyun #define HDMI_FC_DBGTMDS2 0x121B 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun /* HDMI Source PHY Registers */ 354*4882a593Smuzhiyun #define HDMI_PHY_CONF0 0x3000 355*4882a593Smuzhiyun #define HDMI_PHY_TST0 0x3001 356*4882a593Smuzhiyun #define HDMI_PHY_TST1 0x3002 357*4882a593Smuzhiyun #define HDMI_PHY_TST2 0x3003 358*4882a593Smuzhiyun #define HDMI_PHY_STAT0 0x3004 359*4882a593Smuzhiyun #define HDMI_PHY_INT0 0x3005 360*4882a593Smuzhiyun #define HDMI_PHY_MASK0 0x3006 361*4882a593Smuzhiyun #define HDMI_PHY_POL0 0x3007 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun /* HDMI Master PHY Registers */ 364*4882a593Smuzhiyun #define HDMI_PHY_I2CM_SLAVE_ADDR 0x3020 365*4882a593Smuzhiyun #define HDMI_PHY_I2CM_ADDRESS_ADDR 0x3021 366*4882a593Smuzhiyun #define HDMI_PHY_I2CM_DATAO_1_ADDR 0x3022 367*4882a593Smuzhiyun #define HDMI_PHY_I2CM_DATAO_0_ADDR 0x3023 368*4882a593Smuzhiyun #define HDMI_PHY_I2CM_DATAI_1_ADDR 0x3024 369*4882a593Smuzhiyun #define HDMI_PHY_I2CM_DATAI_0_ADDR 0x3025 370*4882a593Smuzhiyun #define HDMI_PHY_I2CM_OPERATION_ADDR 0x3026 371*4882a593Smuzhiyun #define HDMI_PHY_I2CM_INT_ADDR 0x3027 372*4882a593Smuzhiyun #define HDMI_PHY_I2CM_CTLINT_ADDR 0x3028 373*4882a593Smuzhiyun #define HDMI_PHY_I2CM_DIV_ADDR 0x3029 374*4882a593Smuzhiyun #define HDMI_PHY_I2CM_SOFTRSTZ_ADDR 0x302a 375*4882a593Smuzhiyun #define HDMI_PHY_I2CM_SS_SCL_HCNT_1_ADDR 0x302b 376*4882a593Smuzhiyun #define HDMI_PHY_I2CM_SS_SCL_HCNT_0_ADDR 0x302c 377*4882a593Smuzhiyun #define HDMI_PHY_I2CM_SS_SCL_LCNT_1_ADDR 0x302d 378*4882a593Smuzhiyun #define HDMI_PHY_I2CM_SS_SCL_LCNT_0_ADDR 0x302e 379*4882a593Smuzhiyun #define HDMI_PHY_I2CM_FS_SCL_HCNT_1_ADDR 0x302f 380*4882a593Smuzhiyun #define HDMI_PHY_I2CM_FS_SCL_HCNT_0_ADDR 0x3030 381*4882a593Smuzhiyun #define HDMI_PHY_I2CM_FS_SCL_LCNT_1_ADDR 0x3031 382*4882a593Smuzhiyun #define HDMI_PHY_I2CM_FS_SCL_LCNT_0_ADDR 0x3032 383*4882a593Smuzhiyun 384*4882a593Smuzhiyun /* Audio Sampler Registers */ 385*4882a593Smuzhiyun #define HDMI_AUD_CONF0 0x3100 386*4882a593Smuzhiyun #define HDMI_AUD_CONF1 0x3101 387*4882a593Smuzhiyun #define HDMI_AUD_INT 0x3102 388*4882a593Smuzhiyun #define HDMI_AUD_CONF2 0x3103 389*4882a593Smuzhiyun #define HDMI_AUD_N1 0x3200 390*4882a593Smuzhiyun #define HDMI_AUD_N2 0x3201 391*4882a593Smuzhiyun #define HDMI_AUD_N3 0x3202 392*4882a593Smuzhiyun #define HDMI_AUD_CTS1 0x3203 393*4882a593Smuzhiyun #define HDMI_AUD_CTS2 0x3204 394*4882a593Smuzhiyun #define HDMI_AUD_CTS3 0x3205 395*4882a593Smuzhiyun #define HDMI_AUD_INPUTCLKFS 0x3206 396*4882a593Smuzhiyun #define HDMI_AUD_SPDIFINT 0x3302 397*4882a593Smuzhiyun #define HDMI_AUD_CONF0_HBR 0x3400 398*4882a593Smuzhiyun #define HDMI_AUD_HBR_STATUS 0x3401 399*4882a593Smuzhiyun #define HDMI_AUD_HBR_INT 0x3402 400*4882a593Smuzhiyun #define HDMI_AUD_HBR_POL 0x3403 401*4882a593Smuzhiyun #define HDMI_AUD_HBR_MASK 0x3404 402*4882a593Smuzhiyun 403*4882a593Smuzhiyun /* 404*4882a593Smuzhiyun * Generic Parallel Audio Interface Registers 405*4882a593Smuzhiyun * Not used as GPAUD interface is not enabled in hw 406*4882a593Smuzhiyun */ 407*4882a593Smuzhiyun #define HDMI_GP_CONF0 0x3500 408*4882a593Smuzhiyun #define HDMI_GP_CONF1 0x3501 409*4882a593Smuzhiyun #define HDMI_GP_CONF2 0x3502 410*4882a593Smuzhiyun #define HDMI_GP_STAT 0x3503 411*4882a593Smuzhiyun #define HDMI_GP_INT 0x3504 412*4882a593Smuzhiyun #define HDMI_GP_MASK 0x3505 413*4882a593Smuzhiyun #define HDMI_GP_POL 0x3506 414*4882a593Smuzhiyun 415*4882a593Smuzhiyun /* Audio DMA Registers */ 416*4882a593Smuzhiyun #define HDMI_AHB_DMA_CONF0 0x3600 417*4882a593Smuzhiyun #define HDMI_AHB_DMA_START 0x3601 418*4882a593Smuzhiyun #define HDMI_AHB_DMA_STOP 0x3602 419*4882a593Smuzhiyun #define HDMI_AHB_DMA_THRSLD 0x3603 420*4882a593Smuzhiyun #define HDMI_AHB_DMA_STRADDR0 0x3604 421*4882a593Smuzhiyun #define HDMI_AHB_DMA_STRADDR1 0x3605 422*4882a593Smuzhiyun #define HDMI_AHB_DMA_STRADDR2 0x3606 423*4882a593Smuzhiyun #define HDMI_AHB_DMA_STRADDR3 0x3607 424*4882a593Smuzhiyun #define HDMI_AHB_DMA_STPADDR0 0x3608 425*4882a593Smuzhiyun #define HDMI_AHB_DMA_STPADDR1 0x3609 426*4882a593Smuzhiyun #define HDMI_AHB_DMA_STPADDR2 0x360a 427*4882a593Smuzhiyun #define HDMI_AHB_DMA_STPADDR3 0x360b 428*4882a593Smuzhiyun #define HDMI_AHB_DMA_BSTADDR0 0x360c 429*4882a593Smuzhiyun #define HDMI_AHB_DMA_BSTADDR1 0x360d 430*4882a593Smuzhiyun #define HDMI_AHB_DMA_BSTADDR2 0x360e 431*4882a593Smuzhiyun #define HDMI_AHB_DMA_BSTADDR3 0x360f 432*4882a593Smuzhiyun #define HDMI_AHB_DMA_MBLENGTH0 0x3610 433*4882a593Smuzhiyun #define HDMI_AHB_DMA_MBLENGTH1 0x3611 434*4882a593Smuzhiyun #define HDMI_AHB_DMA_STAT 0x3612 435*4882a593Smuzhiyun #define HDMI_AHB_DMA_INT 0x3613 436*4882a593Smuzhiyun #define HDMI_AHB_DMA_MASK 0x3614 437*4882a593Smuzhiyun #define HDMI_AHB_DMA_POL 0x3615 438*4882a593Smuzhiyun #define HDMI_AHB_DMA_CONF1 0x3616 439*4882a593Smuzhiyun #define HDMI_AHB_DMA_BUFFSTAT 0x3617 440*4882a593Smuzhiyun #define HDMI_AHB_DMA_BUFFINT 0x3618 441*4882a593Smuzhiyun #define HDMI_AHB_DMA_BUFFMASK 0x3619 442*4882a593Smuzhiyun #define HDMI_AHB_DMA_BUFFPOL 0x361a 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun /* Main Controller Registers */ 445*4882a593Smuzhiyun #define HDMI_MC_SFRDIV 0x4000 446*4882a593Smuzhiyun #define HDMI_MC_CLKDIS 0x4001 447*4882a593Smuzhiyun #define HDMI_MC_SWRSTZ 0x4002 448*4882a593Smuzhiyun #define HDMI_MC_OPCTRL 0x4003 449*4882a593Smuzhiyun #define HDMI_MC_FLOWCTRL 0x4004 450*4882a593Smuzhiyun #define HDMI_MC_PHYRSTZ 0x4005 451*4882a593Smuzhiyun #define HDMI_MC_LOCKONCLOCK 0x4006 452*4882a593Smuzhiyun #define HDMI_MC_HEACPHY_RST 0x4007 453*4882a593Smuzhiyun 454*4882a593Smuzhiyun /* Color Space Converter Registers */ 455*4882a593Smuzhiyun #define HDMI_CSC_CFG 0x4100 456*4882a593Smuzhiyun #define HDMI_CSC_SCALE 0x4101 457*4882a593Smuzhiyun #define HDMI_CSC_COEF_A1_MSB 0x4102 458*4882a593Smuzhiyun #define HDMI_CSC_COEF_A1_LSB 0x4103 459*4882a593Smuzhiyun #define HDMI_CSC_COEF_A2_MSB 0x4104 460*4882a593Smuzhiyun #define HDMI_CSC_COEF_A2_LSB 0x4105 461*4882a593Smuzhiyun #define HDMI_CSC_COEF_A3_MSB 0x4106 462*4882a593Smuzhiyun #define HDMI_CSC_COEF_A3_LSB 0x4107 463*4882a593Smuzhiyun #define HDMI_CSC_COEF_A4_MSB 0x4108 464*4882a593Smuzhiyun #define HDMI_CSC_COEF_A4_LSB 0x4109 465*4882a593Smuzhiyun #define HDMI_CSC_COEF_B1_MSB 0x410A 466*4882a593Smuzhiyun #define HDMI_CSC_COEF_B1_LSB 0x410B 467*4882a593Smuzhiyun #define HDMI_CSC_COEF_B2_MSB 0x410C 468*4882a593Smuzhiyun #define HDMI_CSC_COEF_B2_LSB 0x410D 469*4882a593Smuzhiyun #define HDMI_CSC_COEF_B3_MSB 0x410E 470*4882a593Smuzhiyun #define HDMI_CSC_COEF_B3_LSB 0x410F 471*4882a593Smuzhiyun #define HDMI_CSC_COEF_B4_MSB 0x4110 472*4882a593Smuzhiyun #define HDMI_CSC_COEF_B4_LSB 0x4111 473*4882a593Smuzhiyun #define HDMI_CSC_COEF_C1_MSB 0x4112 474*4882a593Smuzhiyun #define HDMI_CSC_COEF_C1_LSB 0x4113 475*4882a593Smuzhiyun #define HDMI_CSC_COEF_C2_MSB 0x4114 476*4882a593Smuzhiyun #define HDMI_CSC_COEF_C2_LSB 0x4115 477*4882a593Smuzhiyun #define HDMI_CSC_COEF_C3_MSB 0x4116 478*4882a593Smuzhiyun #define HDMI_CSC_COEF_C3_LSB 0x4117 479*4882a593Smuzhiyun #define HDMI_CSC_COEF_C4_MSB 0x4118 480*4882a593Smuzhiyun #define HDMI_CSC_COEF_C4_LSB 0x4119 481*4882a593Smuzhiyun 482*4882a593Smuzhiyun /* HDCP Encryption Engine Registers */ 483*4882a593Smuzhiyun #define HDMI_A_HDCPCFG0 0x5000 484*4882a593Smuzhiyun #define HDMI_A_HDCPCFG1 0x5001 485*4882a593Smuzhiyun #define HDMI_A_HDCPOBS0 0x5002 486*4882a593Smuzhiyun #define HDMI_A_HDCPOBS1 0x5003 487*4882a593Smuzhiyun #define HDMI_A_HDCPOBS2 0x5004 488*4882a593Smuzhiyun #define HDMI_A_HDCPOBS3 0x5005 489*4882a593Smuzhiyun #define HDMI_A_APIINTCLR 0x5006 490*4882a593Smuzhiyun #define HDMI_A_APIINTSTAT 0x5007 491*4882a593Smuzhiyun #define HDMI_A_APIINTMSK 0x5008 492*4882a593Smuzhiyun #define HDMI_A_VIDPOLCFG 0x5009 493*4882a593Smuzhiyun #define HDMI_A_OESSWCFG 0x500A 494*4882a593Smuzhiyun #define HDMI_A_TIMER1SETUP0 0x500B 495*4882a593Smuzhiyun #define HDMI_A_TIMER1SETUP1 0x500C 496*4882a593Smuzhiyun #define HDMI_A_TIMER2SETUP0 0x500D 497*4882a593Smuzhiyun #define HDMI_A_TIMER2SETUP1 0x500E 498*4882a593Smuzhiyun #define HDMI_A_100MSCFG 0x500F 499*4882a593Smuzhiyun #define HDMI_A_2SCFG0 0x5010 500*4882a593Smuzhiyun #define HDMI_A_2SCFG1 0x5011 501*4882a593Smuzhiyun #define HDMI_A_5SCFG0 0x5012 502*4882a593Smuzhiyun #define HDMI_A_5SCFG1 0x5013 503*4882a593Smuzhiyun #define HDMI_A_SRMVERLSB 0x5014 504*4882a593Smuzhiyun #define HDMI_A_SRMVERMSB 0x5015 505*4882a593Smuzhiyun #define HDMI_A_SRMCTRL 0x5016 506*4882a593Smuzhiyun #define HDMI_A_SFRSETUP 0x5017 507*4882a593Smuzhiyun #define HDMI_A_I2CHSETUP 0x5018 508*4882a593Smuzhiyun #define HDMI_A_INTSETUP 0x5019 509*4882a593Smuzhiyun #define HDMI_A_PRESETUP 0x501A 510*4882a593Smuzhiyun #define HDMI_A_SRM_BASE 0x5020 511*4882a593Smuzhiyun 512*4882a593Smuzhiyun /* CEC Engine Registers */ 513*4882a593Smuzhiyun #define HDMI_CEC_CTRL 0x7D00 514*4882a593Smuzhiyun #define HDMI_CEC_STAT 0x7D01 515*4882a593Smuzhiyun #define HDMI_CEC_MASK 0x7D02 516*4882a593Smuzhiyun #define HDMI_CEC_POLARITY 0x7D03 517*4882a593Smuzhiyun #define HDMI_CEC_INT 0x7D04 518*4882a593Smuzhiyun #define HDMI_CEC_ADDR_L 0x7D05 519*4882a593Smuzhiyun #define HDMI_CEC_ADDR_H 0x7D06 520*4882a593Smuzhiyun #define HDMI_CEC_TX_CNT 0x7D07 521*4882a593Smuzhiyun #define HDMI_CEC_RX_CNT 0x7D08 522*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA0 0x7D10 523*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA1 0x7D11 524*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA2 0x7D12 525*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA3 0x7D13 526*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA4 0x7D14 527*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA5 0x7D15 528*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA6 0x7D16 529*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA7 0x7D17 530*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA8 0x7D18 531*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA9 0x7D19 532*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA10 0x7D1a 533*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA11 0x7D1b 534*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA12 0x7D1c 535*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA13 0x7D1d 536*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA14 0x7D1e 537*4882a593Smuzhiyun #define HDMI_CEC_TX_DATA15 0x7D1f 538*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA0 0x7D20 539*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA1 0x7D21 540*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA2 0x7D22 541*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA3 0x7D23 542*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA4 0x7D24 543*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA5 0x7D25 544*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA6 0x7D26 545*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA7 0x7D27 546*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA8 0x7D28 547*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA9 0x7D29 548*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA10 0x7D2a 549*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA11 0x7D2b 550*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA12 0x7D2c 551*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA13 0x7D2d 552*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA14 0x7D2e 553*4882a593Smuzhiyun #define HDMI_CEC_RX_DATA15 0x7D2f 554*4882a593Smuzhiyun #define HDMI_CEC_LOCK 0x7D30 555*4882a593Smuzhiyun #define HDMI_CEC_WKUPCTRL 0x7D31 556*4882a593Smuzhiyun 557*4882a593Smuzhiyun /* I2C Master Registers (E-DDC) */ 558*4882a593Smuzhiyun #define HDMI_I2CM_SLAVE 0x7E00 559*4882a593Smuzhiyun #define HDMI_I2CM_ADDRESS 0x7E01 560*4882a593Smuzhiyun #define HDMI_I2CM_DATAO 0x7E02 561*4882a593Smuzhiyun #define HDMI_I2CM_DATAI 0x7E03 562*4882a593Smuzhiyun #define HDMI_I2CM_OPERATION 0x7E04 563*4882a593Smuzhiyun #define HDMI_I2CM_INT 0x7E05 564*4882a593Smuzhiyun #define HDMI_I2CM_CTLINT 0x7E06 565*4882a593Smuzhiyun #define HDMI_I2CM_DIV 0x7E07 566*4882a593Smuzhiyun #define HDMI_I2CM_SEGADDR 0x7E08 567*4882a593Smuzhiyun #define HDMI_I2CM_SOFTRSTZ 0x7E09 568*4882a593Smuzhiyun #define HDMI_I2CM_SEGPTR 0x7E0A 569*4882a593Smuzhiyun #define HDMI_I2CM_SS_SCL_HCNT_1_ADDR 0x7E0B 570*4882a593Smuzhiyun #define HDMI_I2CM_SS_SCL_HCNT_0_ADDR 0x7E0C 571*4882a593Smuzhiyun #define HDMI_I2CM_SS_SCL_LCNT_1_ADDR 0x7E0D 572*4882a593Smuzhiyun #define HDMI_I2CM_SS_SCL_LCNT_0_ADDR 0x7E0E 573*4882a593Smuzhiyun #define HDMI_I2CM_FS_SCL_HCNT_1_ADDR 0x7E0F 574*4882a593Smuzhiyun #define HDMI_I2CM_FS_SCL_HCNT_0_ADDR 0x7E10 575*4882a593Smuzhiyun #define HDMI_I2CM_FS_SCL_LCNT_1_ADDR 0x7E11 576*4882a593Smuzhiyun #define HDMI_I2CM_FS_SCL_LCNT_0_ADDR 0x7E12 577*4882a593Smuzhiyun #define HDMI_I2CM_SDA_HOLD 0x7E13 578*4882a593Smuzhiyun #define HDMI_I2CM_SCDC_READ_UPDATE 0x7E14 579*4882a593Smuzhiyun #define HDMI_I2CM_READ_REQ_EN_MSK BIT(4) 580*4882a593Smuzhiyun #define HDMI_I2CM_READ_REQ_EN_OFFSET 4 581*4882a593Smuzhiyun #define HDMI_I2CM_READ_UPDATE_MSK BIT(0) 582*4882a593Smuzhiyun #define HDMI_I2CM_READ_UPDATE_OFFSET 0 583*4882a593Smuzhiyun #define HDMI_I2CM_I2CM_UPRD_VSYNC_EN_MSK BIT(5) 584*4882a593Smuzhiyun #define HDMI_I2CM_I2CM_UPRD_VSYNC_EN_OFFSET 5 585*4882a593Smuzhiyun #define HDMI_I2CM_READ_BUFF0 0x7E20 586*4882a593Smuzhiyun #define HDMI_I2CM_SCDC_UPDATE0 0x7E30 587*4882a593Smuzhiyun #define HDMI_I2CM_SCDC_UPDATE1 0x7E31 588*4882a593Smuzhiyun 589*4882a593Smuzhiyun enum { 590*4882a593Smuzhiyun /* PRODUCT_ID0 field values */ 591*4882a593Smuzhiyun HDMI_PRODUCT_ID0_HDMI_TX = 0xa0, 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun /* PRODUCT_ID1 field values */ 594*4882a593Smuzhiyun HDMI_PRODUCT_ID1_HDCP = 0xc0, 595*4882a593Smuzhiyun HDMI_PRODUCT_ID1_HDMI_RX = 0x02, 596*4882a593Smuzhiyun HDMI_PRODUCT_ID1_HDMI_TX = 0x01, 597*4882a593Smuzhiyun 598*4882a593Smuzhiyun /* CONFIG0_ID field values */ 599*4882a593Smuzhiyun HDMI_CONFIG0_I2S = 0x10, 600*4882a593Smuzhiyun HDMI_CONFIG0_CEC = 0x02, 601*4882a593Smuzhiyun 602*4882a593Smuzhiyun /* CONFIG1_ID field values */ 603*4882a593Smuzhiyun HDMI_CONFIG1_AHB = 0x01, 604*4882a593Smuzhiyun 605*4882a593Smuzhiyun /* CONFIG3_ID field values */ 606*4882a593Smuzhiyun HDMI_CONFIG3_AHBAUDDMA = 0x02, 607*4882a593Smuzhiyun HDMI_CONFIG3_GPAUD = 0x01, 608*4882a593Smuzhiyun 609*4882a593Smuzhiyun /* IH_FC_INT2 field values */ 610*4882a593Smuzhiyun HDMI_IH_FC_INT2_OVERFLOW_MASK = 0x03, 611*4882a593Smuzhiyun HDMI_IH_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02, 612*4882a593Smuzhiyun HDMI_IH_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01, 613*4882a593Smuzhiyun 614*4882a593Smuzhiyun /* IH_FC_STAT2 field values */ 615*4882a593Smuzhiyun HDMI_IH_FC_STAT2_OVERFLOW_MASK = 0x03, 616*4882a593Smuzhiyun HDMI_IH_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02, 617*4882a593Smuzhiyun HDMI_IH_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01, 618*4882a593Smuzhiyun 619*4882a593Smuzhiyun /* IH_PHY_STAT0 field values */ 620*4882a593Smuzhiyun HDMI_IH_PHY_STAT0_RX_SENSE3 = 0x20, 621*4882a593Smuzhiyun HDMI_IH_PHY_STAT0_RX_SENSE2 = 0x10, 622*4882a593Smuzhiyun HDMI_IH_PHY_STAT0_RX_SENSE1 = 0x8, 623*4882a593Smuzhiyun HDMI_IH_PHY_STAT0_RX_SENSE0 = 0x4, 624*4882a593Smuzhiyun HDMI_IH_PHY_STAT0_TX_PHY_LOCK = 0x2, 625*4882a593Smuzhiyun HDMI_IH_PHY_STAT0_HPD = 0x1, 626*4882a593Smuzhiyun 627*4882a593Smuzhiyun /* IH_I2CM_STAT0 and IH_MUTE_I2CM_STAT0 field values */ 628*4882a593Smuzhiyun HDMI_IH_I2CM_STAT0_DONE = 0x2, 629*4882a593Smuzhiyun HDMI_IH_I2CM_STAT0_ERROR = 0x1, 630*4882a593Smuzhiyun 631*4882a593Smuzhiyun /* IH_MUTE_I2CMPHY_STAT0 field values */ 632*4882a593Smuzhiyun HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYDONE = 0x2, 633*4882a593Smuzhiyun HDMI_IH_MUTE_I2CMPHY_STAT0_I2CMPHYERROR = 0x1, 634*4882a593Smuzhiyun 635*4882a593Smuzhiyun /* IH_AHBDMAAUD_STAT0 field values */ 636*4882a593Smuzhiyun HDMI_IH_AHBDMAAUD_STAT0_ERROR = 0x20, 637*4882a593Smuzhiyun HDMI_IH_AHBDMAAUD_STAT0_LOST = 0x10, 638*4882a593Smuzhiyun HDMI_IH_AHBDMAAUD_STAT0_RETRY = 0x08, 639*4882a593Smuzhiyun HDMI_IH_AHBDMAAUD_STAT0_DONE = 0x04, 640*4882a593Smuzhiyun HDMI_IH_AHBDMAAUD_STAT0_BUFFFULL = 0x02, 641*4882a593Smuzhiyun HDMI_IH_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01, 642*4882a593Smuzhiyun 643*4882a593Smuzhiyun /* IH_MUTE_FC_STAT2 field values */ 644*4882a593Smuzhiyun HDMI_IH_MUTE_FC_STAT2_OVERFLOW_MASK = 0x03, 645*4882a593Smuzhiyun HDMI_IH_MUTE_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02, 646*4882a593Smuzhiyun HDMI_IH_MUTE_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01, 647*4882a593Smuzhiyun 648*4882a593Smuzhiyun /* IH_MUTE_AHBDMAAUD_STAT0 field values */ 649*4882a593Smuzhiyun HDMI_IH_MUTE_AHBDMAAUD_STAT0_ERROR = 0x20, 650*4882a593Smuzhiyun HDMI_IH_MUTE_AHBDMAAUD_STAT0_LOST = 0x10, 651*4882a593Smuzhiyun HDMI_IH_MUTE_AHBDMAAUD_STAT0_RETRY = 0x08, 652*4882a593Smuzhiyun HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE = 0x04, 653*4882a593Smuzhiyun HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFFULL = 0x02, 654*4882a593Smuzhiyun HDMI_IH_MUTE_AHBDMAAUD_STAT0_BUFFEMPTY = 0x01, 655*4882a593Smuzhiyun 656*4882a593Smuzhiyun /* IH_MUTE field values */ 657*4882a593Smuzhiyun HDMI_IH_MUTE_MUTE_WAKEUP_INTERRUPT = 0x2, 658*4882a593Smuzhiyun HDMI_IH_MUTE_MUTE_ALL_INTERRUPT = 0x1, 659*4882a593Smuzhiyun 660*4882a593Smuzhiyun /* TX_INVID0 field values */ 661*4882a593Smuzhiyun HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_MASK = 0x80, 662*4882a593Smuzhiyun HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_ENABLE = 0x80, 663*4882a593Smuzhiyun HDMI_TX_INVID0_INTERNAL_DE_GENERATOR_DISABLE = 0x00, 664*4882a593Smuzhiyun HDMI_TX_INVID0_VIDEO_MAPPING_MASK = 0x1F, 665*4882a593Smuzhiyun HDMI_TX_INVID0_VIDEO_MAPPING_OFFSET = 0, 666*4882a593Smuzhiyun 667*4882a593Smuzhiyun /* TX_INSTUFFING field values */ 668*4882a593Smuzhiyun HDMI_TX_INSTUFFING_BDBDATA_STUFFING_MASK = 0x4, 669*4882a593Smuzhiyun HDMI_TX_INSTUFFING_BDBDATA_STUFFING_ENABLE = 0x4, 670*4882a593Smuzhiyun HDMI_TX_INSTUFFING_BDBDATA_STUFFING_DISABLE = 0x0, 671*4882a593Smuzhiyun HDMI_TX_INSTUFFING_RCRDATA_STUFFING_MASK = 0x2, 672*4882a593Smuzhiyun HDMI_TX_INSTUFFING_RCRDATA_STUFFING_ENABLE = 0x2, 673*4882a593Smuzhiyun HDMI_TX_INSTUFFING_RCRDATA_STUFFING_DISABLE = 0x0, 674*4882a593Smuzhiyun HDMI_TX_INSTUFFING_GYDATA_STUFFING_MASK = 0x1, 675*4882a593Smuzhiyun HDMI_TX_INSTUFFING_GYDATA_STUFFING_ENABLE = 0x1, 676*4882a593Smuzhiyun HDMI_TX_INSTUFFING_GYDATA_STUFFING_DISABLE = 0x0, 677*4882a593Smuzhiyun 678*4882a593Smuzhiyun /* VP_PR_CD field values */ 679*4882a593Smuzhiyun HDMI_VP_PR_CD_COLOR_DEPTH_MASK = 0xF0, 680*4882a593Smuzhiyun HDMI_VP_PR_CD_COLOR_DEPTH_OFFSET = 4, 681*4882a593Smuzhiyun HDMI_VP_PR_CD_DESIRED_PR_FACTOR_MASK = 0x0F, 682*4882a593Smuzhiyun HDMI_VP_PR_CD_DESIRED_PR_FACTOR_OFFSET = 0, 683*4882a593Smuzhiyun 684*4882a593Smuzhiyun /* VP_STUFF field values */ 685*4882a593Smuzhiyun HDMI_VP_STUFF_IDEFAULT_PHASE_MASK = 0x20, 686*4882a593Smuzhiyun HDMI_VP_STUFF_IDEFAULT_PHASE_OFFSET = 5, 687*4882a593Smuzhiyun HDMI_VP_STUFF_IFIX_PP_TO_LAST_MASK = 0x10, 688*4882a593Smuzhiyun HDMI_VP_STUFF_IFIX_PP_TO_LAST_OFFSET = 4, 689*4882a593Smuzhiyun HDMI_VP_STUFF_ICX_GOTO_P0_ST_MASK = 0x8, 690*4882a593Smuzhiyun HDMI_VP_STUFF_ICX_GOTO_P0_ST_OFFSET = 3, 691*4882a593Smuzhiyun HDMI_VP_STUFF_YCC422_STUFFING_MASK = 0x4, 692*4882a593Smuzhiyun HDMI_VP_STUFF_YCC422_STUFFING_STUFFING_MODE = 0x4, 693*4882a593Smuzhiyun HDMI_VP_STUFF_YCC422_STUFFING_DIRECT_MODE = 0x0, 694*4882a593Smuzhiyun HDMI_VP_STUFF_PP_STUFFING_MASK = 0x2, 695*4882a593Smuzhiyun HDMI_VP_STUFF_PP_STUFFING_STUFFING_MODE = 0x2, 696*4882a593Smuzhiyun HDMI_VP_STUFF_PP_STUFFING_DIRECT_MODE = 0x0, 697*4882a593Smuzhiyun HDMI_VP_STUFF_PR_STUFFING_MASK = 0x1, 698*4882a593Smuzhiyun HDMI_VP_STUFF_PR_STUFFING_STUFFING_MODE = 0x1, 699*4882a593Smuzhiyun HDMI_VP_STUFF_PR_STUFFING_DIRECT_MODE = 0x0, 700*4882a593Smuzhiyun 701*4882a593Smuzhiyun /* VP_CONF field values */ 702*4882a593Smuzhiyun HDMI_VP_CONF_BYPASS_EN_MASK = 0x40, 703*4882a593Smuzhiyun HDMI_VP_CONF_BYPASS_EN_ENABLE = 0x40, 704*4882a593Smuzhiyun HDMI_VP_CONF_BYPASS_EN_DISABLE = 0x00, 705*4882a593Smuzhiyun HDMI_VP_CONF_PP_EN_ENMASK = 0x20, 706*4882a593Smuzhiyun HDMI_VP_CONF_PP_EN_ENABLE = 0x20, 707*4882a593Smuzhiyun HDMI_VP_CONF_PP_EN_DISABLE = 0x00, 708*4882a593Smuzhiyun HDMI_VP_CONF_PR_EN_MASK = 0x10, 709*4882a593Smuzhiyun HDMI_VP_CONF_PR_EN_ENABLE = 0x10, 710*4882a593Smuzhiyun HDMI_VP_CONF_PR_EN_DISABLE = 0x00, 711*4882a593Smuzhiyun HDMI_VP_CONF_YCC422_EN_MASK = 0x8, 712*4882a593Smuzhiyun HDMI_VP_CONF_YCC422_EN_ENABLE = 0x8, 713*4882a593Smuzhiyun HDMI_VP_CONF_YCC422_EN_DISABLE = 0x0, 714*4882a593Smuzhiyun HDMI_VP_CONF_BYPASS_SELECT_MASK = 0x4, 715*4882a593Smuzhiyun HDMI_VP_CONF_BYPASS_SELECT_VID_PACKETIZER = 0x4, 716*4882a593Smuzhiyun HDMI_VP_CONF_BYPASS_SELECT_PIX_REPEATER = 0x0, 717*4882a593Smuzhiyun HDMI_VP_CONF_OUTPUT_SELECTOR_MASK = 0x3, 718*4882a593Smuzhiyun HDMI_VP_CONF_OUTPUT_SELECTOR_BYPASS = 0x3, 719*4882a593Smuzhiyun HDMI_VP_CONF_OUTPUT_SELECTOR_YCC422 = 0x1, 720*4882a593Smuzhiyun HDMI_VP_CONF_OUTPUT_SELECTOR_PP = 0x0, 721*4882a593Smuzhiyun 722*4882a593Smuzhiyun /* VP_REMAP field values */ 723*4882a593Smuzhiyun HDMI_VP_REMAP_MASK = 0x3, 724*4882a593Smuzhiyun HDMI_VP_REMAP_YCC422_24bit = 0x2, 725*4882a593Smuzhiyun HDMI_VP_REMAP_YCC422_20bit = 0x1, 726*4882a593Smuzhiyun HDMI_VP_REMAP_YCC422_16bit = 0x0, 727*4882a593Smuzhiyun 728*4882a593Smuzhiyun /* FC_INVIDCONF field values */ 729*4882a593Smuzhiyun HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK = 0x80, 730*4882a593Smuzhiyun HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE = 0x80, 731*4882a593Smuzhiyun HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE = 0x00, 732*4882a593Smuzhiyun HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_MASK = 0x40, 733*4882a593Smuzhiyun HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH = 0x40, 734*4882a593Smuzhiyun HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW = 0x00, 735*4882a593Smuzhiyun HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_MASK = 0x20, 736*4882a593Smuzhiyun HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH = 0x20, 737*4882a593Smuzhiyun HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW = 0x00, 738*4882a593Smuzhiyun HDMI_FC_INVIDCONF_DE_IN_POLARITY_MASK = 0x10, 739*4882a593Smuzhiyun HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH = 0x10, 740*4882a593Smuzhiyun HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW = 0x00, 741*4882a593Smuzhiyun HDMI_FC_INVIDCONF_DVI_MODEZ_MASK = 0x8, 742*4882a593Smuzhiyun HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE = 0x8, 743*4882a593Smuzhiyun HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE = 0x0, 744*4882a593Smuzhiyun HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_MASK = 0x2, 745*4882a593Smuzhiyun HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_HIGH = 0x2, 746*4882a593Smuzhiyun HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW = 0x0, 747*4882a593Smuzhiyun HDMI_FC_INVIDCONF_IN_I_P_MASK = 0x1, 748*4882a593Smuzhiyun HDMI_FC_INVIDCONF_IN_I_P_INTERLACED = 0x1, 749*4882a593Smuzhiyun HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE = 0x0, 750*4882a593Smuzhiyun 751*4882a593Smuzhiyun /* FC_AUDICONF0 field values */ 752*4882a593Smuzhiyun HDMI_FC_AUDICONF0_CC_OFFSET = 4, 753*4882a593Smuzhiyun HDMI_FC_AUDICONF0_CC_MASK = 0x70, 754*4882a593Smuzhiyun HDMI_FC_AUDICONF0_CT_OFFSET = 0, 755*4882a593Smuzhiyun HDMI_FC_AUDICONF0_CT_MASK = 0xF, 756*4882a593Smuzhiyun 757*4882a593Smuzhiyun /* FC_AUDICONF1 field values */ 758*4882a593Smuzhiyun HDMI_FC_AUDICONF1_SS_OFFSET = 3, 759*4882a593Smuzhiyun HDMI_FC_AUDICONF1_SS_MASK = 0x18, 760*4882a593Smuzhiyun HDMI_FC_AUDICONF1_SF_OFFSET = 0, 761*4882a593Smuzhiyun HDMI_FC_AUDICONF1_SF_MASK = 0x7, 762*4882a593Smuzhiyun 763*4882a593Smuzhiyun /* FC_AUDICONF3 field values */ 764*4882a593Smuzhiyun HDMI_FC_AUDICONF3_LFEPBL_OFFSET = 5, 765*4882a593Smuzhiyun HDMI_FC_AUDICONF3_LFEPBL_MASK = 0x60, 766*4882a593Smuzhiyun HDMI_FC_AUDICONF3_DM_INH_OFFSET = 4, 767*4882a593Smuzhiyun HDMI_FC_AUDICONF3_DM_INH_MASK = 0x10, 768*4882a593Smuzhiyun HDMI_FC_AUDICONF3_LSV_OFFSET = 0, 769*4882a593Smuzhiyun HDMI_FC_AUDICONF3_LSV_MASK = 0xF, 770*4882a593Smuzhiyun 771*4882a593Smuzhiyun /* FC_AUDSCHNLS0 field values */ 772*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS0_CGMSA_OFFSET = 4, 773*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS0_CGMSA_MASK = 0x30, 774*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS0_COPYRIGHT_OFFSET = 0, 775*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS0_COPYRIGHT_MASK = 0x01, 776*4882a593Smuzhiyun 777*4882a593Smuzhiyun /* FC_AUDSCHNLS3-6 field values */ 778*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS3_OIEC_CH0_OFFSET = 0, 779*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS3_OIEC_CH0_MASK = 0x0f, 780*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS3_OIEC_CH1_OFFSET = 4, 781*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS3_OIEC_CH1_MASK = 0xf0, 782*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS4_OIEC_CH2_OFFSET = 0, 783*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS4_OIEC_CH2_MASK = 0x0f, 784*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS4_OIEC_CH3_OFFSET = 4, 785*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS4_OIEC_CH3_MASK = 0xf0, 786*4882a593Smuzhiyun 787*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS5_OIEC_CH0_OFFSET = 0, 788*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS5_OIEC_CH0_MASK = 0x0f, 789*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS5_OIEC_CH1_OFFSET = 4, 790*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS5_OIEC_CH1_MASK = 0xf0, 791*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS6_OIEC_CH2_OFFSET = 0, 792*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS6_OIEC_CH2_MASK = 0x0f, 793*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS6_OIEC_CH3_OFFSET = 4, 794*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS6_OIEC_CH3_MASK = 0xf0, 795*4882a593Smuzhiyun 796*4882a593Smuzhiyun /* HDMI_FC_AUDSCHNLS7 field values */ 797*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS7_ACCURACY_OFFSET = 4, 798*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS7_ACCURACY_MASK = 0x30, 799*4882a593Smuzhiyun 800*4882a593Smuzhiyun /* HDMI_FC_AUDSCHNLS8 field values */ 801*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_MASK = 0xf0, 802*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS8_ORIGSAMPFREQ_OFFSET = 4, 803*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS8_WORDLEGNTH_MASK = 0x0f, 804*4882a593Smuzhiyun HDMI_FC_AUDSCHNLS8_WORDLEGNTH_OFFSET = 0, 805*4882a593Smuzhiyun 806*4882a593Smuzhiyun /* FC_AUDSCONF field values */ 807*4882a593Smuzhiyun HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_MASK = 0xF0, 808*4882a593Smuzhiyun HDMI_FC_AUDSCONF_AUD_PACKET_SAMPFIT_OFFSET = 4, 809*4882a593Smuzhiyun HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_MASK = 0x1, 810*4882a593Smuzhiyun HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_OFFSET = 0, 811*4882a593Smuzhiyun HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT1 = 0x1, 812*4882a593Smuzhiyun HDMI_FC_AUDSCONF_AUD_PACKET_LAYOUT_LAYOUT0 = 0x0, 813*4882a593Smuzhiyun 814*4882a593Smuzhiyun /* FC_STAT2 field values */ 815*4882a593Smuzhiyun HDMI_FC_STAT2_OVERFLOW_MASK = 0x03, 816*4882a593Smuzhiyun HDMI_FC_STAT2_LOW_PRIORITY_OVERFLOW = 0x02, 817*4882a593Smuzhiyun HDMI_FC_STAT2_HIGH_PRIORITY_OVERFLOW = 0x01, 818*4882a593Smuzhiyun 819*4882a593Smuzhiyun /* FC_INT2 field values */ 820*4882a593Smuzhiyun HDMI_FC_INT2_OVERFLOW_MASK = 0x03, 821*4882a593Smuzhiyun HDMI_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02, 822*4882a593Smuzhiyun HDMI_FC_INT2_HIGH_PRIORITY_OVERFLOW = 0x01, 823*4882a593Smuzhiyun 824*4882a593Smuzhiyun /* FC_MASK2 field values */ 825*4882a593Smuzhiyun HDMI_FC_MASK2_OVERFLOW_MASK = 0x03, 826*4882a593Smuzhiyun HDMI_FC_MASK2_LOW_PRIORITY_OVERFLOW = 0x02, 827*4882a593Smuzhiyun HDMI_FC_MASK2_HIGH_PRIORITY_OVERFLOW = 0x01, 828*4882a593Smuzhiyun 829*4882a593Smuzhiyun /* FC_PRCONF field values */ 830*4882a593Smuzhiyun HDMI_FC_PRCONF_INCOMING_PR_FACTOR_MASK = 0xF0, 831*4882a593Smuzhiyun HDMI_FC_PRCONF_INCOMING_PR_FACTOR_OFFSET = 4, 832*4882a593Smuzhiyun HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_MASK = 0x0F, 833*4882a593Smuzhiyun HDMI_FC_PRCONF_OUTPUT_PR_FACTOR_OFFSET = 0, 834*4882a593Smuzhiyun 835*4882a593Smuzhiyun /* FC_PACKET_TX_EN field values */ 836*4882a593Smuzhiyun HDMI_FC_PACKET_TX_EN_DRM_MASK = 0x80, 837*4882a593Smuzhiyun HDMI_FC_PACKET_TX_EN_DRM_ENABLE = 0x80, 838*4882a593Smuzhiyun HDMI_FC_PACKET_TX_EN_DRM_DISABLE = 0x00, 839*4882a593Smuzhiyun 840*4882a593Smuzhiyun /* FC_AVICONF0-FC_AVICONF3 field values */ 841*4882a593Smuzhiyun HDMI_FC_AVICONF0_PIX_FMT_MASK = 0x03, 842*4882a593Smuzhiyun HDMI_FC_AVICONF0_PIX_FMT_RGB = 0x00, 843*4882a593Smuzhiyun HDMI_FC_AVICONF0_PIX_FMT_YCBCR422 = 0x01, 844*4882a593Smuzhiyun HDMI_FC_AVICONF0_PIX_FMT_YCBCR444 = 0x02, 845*4882a593Smuzhiyun HDMI_FC_AVICONF0_ACTIVE_FMT_MASK = 0x40, 846*4882a593Smuzhiyun HDMI_FC_AVICONF0_ACTIVE_FMT_INFO_PRESENT = 0x40, 847*4882a593Smuzhiyun HDMI_FC_AVICONF0_ACTIVE_FMT_NO_INFO = 0x00, 848*4882a593Smuzhiyun HDMI_FC_AVICONF0_BAR_DATA_MASK = 0x0C, 849*4882a593Smuzhiyun HDMI_FC_AVICONF0_BAR_DATA_NO_DATA = 0x00, 850*4882a593Smuzhiyun HDMI_FC_AVICONF0_BAR_DATA_VERT_BAR = 0x04, 851*4882a593Smuzhiyun HDMI_FC_AVICONF0_BAR_DATA_HORIZ_BAR = 0x08, 852*4882a593Smuzhiyun HDMI_FC_AVICONF0_BAR_DATA_VERT_HORIZ_BAR = 0x0C, 853*4882a593Smuzhiyun HDMI_FC_AVICONF0_SCAN_INFO_MASK = 0x30, 854*4882a593Smuzhiyun HDMI_FC_AVICONF0_SCAN_INFO_OVERSCAN = 0x10, 855*4882a593Smuzhiyun HDMI_FC_AVICONF0_SCAN_INFO_UNDERSCAN = 0x20, 856*4882a593Smuzhiyun HDMI_FC_AVICONF0_SCAN_INFO_NODATA = 0x00, 857*4882a593Smuzhiyun 858*4882a593Smuzhiyun HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_MASK = 0x0F, 859*4882a593Smuzhiyun HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_USE_CODED = 0x08, 860*4882a593Smuzhiyun HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_4_3 = 0x09, 861*4882a593Smuzhiyun HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_16_9 = 0x0A, 862*4882a593Smuzhiyun HDMI_FC_AVICONF1_ACTIVE_ASPECT_RATIO_14_9 = 0x0B, 863*4882a593Smuzhiyun HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_MASK = 0x30, 864*4882a593Smuzhiyun HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_NO_DATA = 0x00, 865*4882a593Smuzhiyun HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_4_3 = 0x10, 866*4882a593Smuzhiyun HDMI_FC_AVICONF1_CODED_ASPECT_RATIO_16_9 = 0x20, 867*4882a593Smuzhiyun HDMI_FC_AVICONF1_COLORIMETRY_MASK = 0xC0, 868*4882a593Smuzhiyun HDMI_FC_AVICONF1_COLORIMETRY_NO_DATA = 0x00, 869*4882a593Smuzhiyun HDMI_FC_AVICONF1_COLORIMETRY_SMPTE = 0x40, 870*4882a593Smuzhiyun HDMI_FC_AVICONF1_COLORIMETRY_ITUR = 0x80, 871*4882a593Smuzhiyun HDMI_FC_AVICONF1_COLORIMETRY_EXTENDED_INFO = 0xC0, 872*4882a593Smuzhiyun 873*4882a593Smuzhiyun HDMI_FC_AVICONF2_SCALING_MASK = 0x03, 874*4882a593Smuzhiyun HDMI_FC_AVICONF2_SCALING_NONE = 0x00, 875*4882a593Smuzhiyun HDMI_FC_AVICONF2_SCALING_HORIZ = 0x01, 876*4882a593Smuzhiyun HDMI_FC_AVICONF2_SCALING_VERT = 0x02, 877*4882a593Smuzhiyun HDMI_FC_AVICONF2_SCALING_HORIZ_VERT = 0x03, 878*4882a593Smuzhiyun HDMI_FC_AVICONF2_RGB_QUANT_MASK = 0x0C, 879*4882a593Smuzhiyun HDMI_FC_AVICONF2_RGB_QUANT_DEFAULT = 0x00, 880*4882a593Smuzhiyun HDMI_FC_AVICONF2_RGB_QUANT_LIMITED_RANGE = 0x04, 881*4882a593Smuzhiyun HDMI_FC_AVICONF2_RGB_QUANT_FULL_RANGE = 0x08, 882*4882a593Smuzhiyun HDMI_FC_AVICONF2_EXT_COLORIMETRY_MASK = 0x70, 883*4882a593Smuzhiyun HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC601 = 0x00, 884*4882a593Smuzhiyun HDMI_FC_AVICONF2_EXT_COLORIMETRY_XVYCC709 = 0x10, 885*4882a593Smuzhiyun HDMI_FC_AVICONF2_EXT_COLORIMETRY_SYCC601 = 0x20, 886*4882a593Smuzhiyun HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_YCC601 = 0x30, 887*4882a593Smuzhiyun HDMI_FC_AVICONF2_EXT_COLORIMETRY_ADOBE_RGB = 0x40, 888*4882a593Smuzhiyun HDMI_FC_AVICONF2_IT_CONTENT_MASK = 0x80, 889*4882a593Smuzhiyun HDMI_FC_AVICONF2_IT_CONTENT_NO_DATA = 0x00, 890*4882a593Smuzhiyun HDMI_FC_AVICONF2_IT_CONTENT_VALID = 0x80, 891*4882a593Smuzhiyun 892*4882a593Smuzhiyun HDMI_FC_AVICONF3_IT_CONTENT_TYPE_MASK = 0x03, 893*4882a593Smuzhiyun HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GRAPHICS = 0x00, 894*4882a593Smuzhiyun HDMI_FC_AVICONF3_IT_CONTENT_TYPE_PHOTO = 0x01, 895*4882a593Smuzhiyun HDMI_FC_AVICONF3_IT_CONTENT_TYPE_CINEMA = 0x02, 896*4882a593Smuzhiyun HDMI_FC_AVICONF3_IT_CONTENT_TYPE_GAME = 0x03, 897*4882a593Smuzhiyun HDMI_FC_AVICONF3_QUANT_RANGE_MASK = 0x0C, 898*4882a593Smuzhiyun HDMI_FC_AVICONF3_QUANT_RANGE_LIMITED = 0x00, 899*4882a593Smuzhiyun HDMI_FC_AVICONF3_QUANT_RANGE_FULL = 0x04, 900*4882a593Smuzhiyun 901*4882a593Smuzhiyun /* HDMI_FC_GCP */ 902*4882a593Smuzhiyun HDMI_FC_GCP_SET_AVMUTE = 0x2, 903*4882a593Smuzhiyun HDMI_FC_GCP_CLEAR_AVMUTE = 0x1, 904*4882a593Smuzhiyun 905*4882a593Smuzhiyun /* FC_DBGFORCE field values */ 906*4882a593Smuzhiyun HDMI_FC_DBGFORCE_FORCEAUDIO = 0x10, 907*4882a593Smuzhiyun HDMI_FC_DBGFORCE_FORCEVIDEO = 0x1, 908*4882a593Smuzhiyun 909*4882a593Smuzhiyun /* FC_DATAUTO0 field values */ 910*4882a593Smuzhiyun HDMI_FC_DATAUTO0_VSD_MASK = 0x08, 911*4882a593Smuzhiyun HDMI_FC_DATAUTO0_VSD_OFFSET = 3, 912*4882a593Smuzhiyun 913*4882a593Smuzhiyun /* PHY_CONF0 field values */ 914*4882a593Smuzhiyun HDMI_PHY_CONF0_PDZ_MASK = 0x80, 915*4882a593Smuzhiyun HDMI_PHY_CONF0_PDZ_OFFSET = 7, 916*4882a593Smuzhiyun HDMI_PHY_CONF0_ENTMDS_MASK = 0x40, 917*4882a593Smuzhiyun HDMI_PHY_CONF0_ENTMDS_OFFSET = 6, 918*4882a593Smuzhiyun HDMI_PHY_CONF0_SVSRET_MASK = 0x20, 919*4882a593Smuzhiyun HDMI_PHY_CONF0_SVSRET_OFFSET = 5, 920*4882a593Smuzhiyun HDMI_PHY_CONF0_GEN2_PDDQ_MASK = 0x10, 921*4882a593Smuzhiyun HDMI_PHY_CONF0_GEN2_PDDQ_OFFSET = 4, 922*4882a593Smuzhiyun HDMI_PHY_CONF0_GEN2_TXPWRON_MASK = 0x8, 923*4882a593Smuzhiyun HDMI_PHY_CONF0_GEN2_TXPWRON_OFFSET = 3, 924*4882a593Smuzhiyun HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_MASK = 0x4, 925*4882a593Smuzhiyun HDMI_PHY_CONF0_GEN2_ENHPDRXSENSE_OFFSET = 2, 926*4882a593Smuzhiyun HDMI_PHY_CONF0_SELDATAENPOL_MASK = 0x2, 927*4882a593Smuzhiyun HDMI_PHY_CONF0_SELDATAENPOL_OFFSET = 1, 928*4882a593Smuzhiyun HDMI_PHY_CONF0_SELDIPIF_MASK = 0x1, 929*4882a593Smuzhiyun HDMI_PHY_CONF0_SELDIPIF_OFFSET = 0, 930*4882a593Smuzhiyun 931*4882a593Smuzhiyun /* PHY_TST0 field values */ 932*4882a593Smuzhiyun HDMI_PHY_TST0_TSTCLR_MASK = 0x20, 933*4882a593Smuzhiyun HDMI_PHY_TST0_TSTCLR_OFFSET = 5, 934*4882a593Smuzhiyun HDMI_PHY_TST0_TSTEN_MASK = 0x10, 935*4882a593Smuzhiyun HDMI_PHY_TST0_TSTEN_OFFSET = 4, 936*4882a593Smuzhiyun HDMI_PHY_TST0_TSTCLK_MASK = 0x1, 937*4882a593Smuzhiyun HDMI_PHY_TST0_TSTCLK_OFFSET = 0, 938*4882a593Smuzhiyun 939*4882a593Smuzhiyun /* PHY_STAT0 field values */ 940*4882a593Smuzhiyun HDMI_PHY_RX_SENSE3 = 0x80, 941*4882a593Smuzhiyun HDMI_PHY_RX_SENSE2 = 0x40, 942*4882a593Smuzhiyun HDMI_PHY_RX_SENSE1 = 0x20, 943*4882a593Smuzhiyun HDMI_PHY_RX_SENSE0 = 0x10, 944*4882a593Smuzhiyun HDMI_PHY_HPD = 0x02, 945*4882a593Smuzhiyun HDMI_PHY_TX_PHY_LOCK = 0x01, 946*4882a593Smuzhiyun 947*4882a593Smuzhiyun /* PHY_I2CM_SLAVE_ADDR field values */ 948*4882a593Smuzhiyun HDMI_PHY_I2CM_SLAVE_ADDR_PHY_GEN2 = 0x69, 949*4882a593Smuzhiyun HDMI_PHY_I2CM_SLAVE_ADDR_HEAC_PHY = 0x49, 950*4882a593Smuzhiyun 951*4882a593Smuzhiyun /* PHY_I2CM_OPERATION_ADDR field values */ 952*4882a593Smuzhiyun HDMI_PHY_I2CM_OPERATION_ADDR_WRITE = 0x10, 953*4882a593Smuzhiyun HDMI_PHY_I2CM_OPERATION_ADDR_READ = 0x1, 954*4882a593Smuzhiyun 955*4882a593Smuzhiyun /* HDMI_PHY_I2CM_INT_ADDR */ 956*4882a593Smuzhiyun HDMI_PHY_I2CM_INT_ADDR_DONE_POL = 0x08, 957*4882a593Smuzhiyun HDMI_PHY_I2CM_INT_ADDR_DONE_MASK = 0x04, 958*4882a593Smuzhiyun 959*4882a593Smuzhiyun /* HDMI_PHY_I2CM_CTLINT_ADDR */ 960*4882a593Smuzhiyun HDMI_PHY_I2CM_CTLINT_ADDR_NAC_POL = 0x80, 961*4882a593Smuzhiyun HDMI_PHY_I2CM_CTLINT_ADDR_NAC_MASK = 0x40, 962*4882a593Smuzhiyun HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_POL = 0x08, 963*4882a593Smuzhiyun HDMI_PHY_I2CM_CTLINT_ADDR_ARBITRATION_MASK = 0x04, 964*4882a593Smuzhiyun 965*4882a593Smuzhiyun /* AUD_CONF0 field values */ 966*4882a593Smuzhiyun HDMI_AUD_CONF0_SW_RESET = 0x80, 967*4882a593Smuzhiyun HDMI_AUD_CONF0_I2S_SELECT = 0x20, 968*4882a593Smuzhiyun HDMI_AUD_CONF0_I2S_EN3 = 0x08, 969*4882a593Smuzhiyun HDMI_AUD_CONF0_I2S_EN2 = 0x04, 970*4882a593Smuzhiyun HDMI_AUD_CONF0_I2S_EN1 = 0x02, 971*4882a593Smuzhiyun HDMI_AUD_CONF0_I2S_EN0 = 0x01, 972*4882a593Smuzhiyun 973*4882a593Smuzhiyun /* AUD_CONF1 field values */ 974*4882a593Smuzhiyun HDMI_AUD_CONF1_MODE_I2S = 0x00, 975*4882a593Smuzhiyun HDMI_AUD_CONF1_MODE_RIGHT_J = 0x20, 976*4882a593Smuzhiyun HDMI_AUD_CONF1_MODE_LEFT_J = 0x40, 977*4882a593Smuzhiyun HDMI_AUD_CONF1_MODE_BURST_1 = 0x60, 978*4882a593Smuzhiyun HDMI_AUD_CONF1_MODE_BURST_2 = 0x80, 979*4882a593Smuzhiyun HDMI_AUD_CONF1_WIDTH_16 = 0x10, 980*4882a593Smuzhiyun HDMI_AUD_CONF1_WIDTH_21 = 0x15, 981*4882a593Smuzhiyun HDMI_AUD_CONF1_WIDTH_24 = 0x18, 982*4882a593Smuzhiyun 983*4882a593Smuzhiyun /* AUD_CONF2 filed values */ 984*4882a593Smuzhiyun HDMI_AUD_CONF2_HBR = 0x1, 985*4882a593Smuzhiyun HDMI_AUD_CONF2_NLPCM = 0x2, 986*4882a593Smuzhiyun HDMI_AUD_CONF2_INSERT_PCUV = 0x04, 987*4882a593Smuzhiyun 988*4882a593Smuzhiyun /* AUD_CTS3 field values */ 989*4882a593Smuzhiyun HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5, 990*4882a593Smuzhiyun HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0, 991*4882a593Smuzhiyun HDMI_AUD_CTS3_N_SHIFT_1 = 0, 992*4882a593Smuzhiyun HDMI_AUD_CTS3_N_SHIFT_16 = 0x20, 993*4882a593Smuzhiyun HDMI_AUD_CTS3_N_SHIFT_32 = 0x40, 994*4882a593Smuzhiyun HDMI_AUD_CTS3_N_SHIFT_64 = 0x60, 995*4882a593Smuzhiyun HDMI_AUD_CTS3_N_SHIFT_128 = 0x80, 996*4882a593Smuzhiyun HDMI_AUD_CTS3_N_SHIFT_256 = 0xa0, 997*4882a593Smuzhiyun /* note that the CTS3 MANUAL bit has been removed 998*4882a593Smuzhiyun from our part. Can't set it, will read as 0. */ 999*4882a593Smuzhiyun HDMI_AUD_CTS3_CTS_MANUAL = 0x10, 1000*4882a593Smuzhiyun HDMI_AUD_CTS3_AUDCTS19_16_MASK = 0x0f, 1001*4882a593Smuzhiyun 1002*4882a593Smuzhiyun /* HDMI_AUD_INPUTCLKFS field values */ 1003*4882a593Smuzhiyun HDMI_AUD_INPUTCLKFS_128FS = 0, 1004*4882a593Smuzhiyun HDMI_AUD_INPUTCLKFS_256FS = 1, 1005*4882a593Smuzhiyun HDMI_AUD_INPUTCLKFS_512FS = 2, 1006*4882a593Smuzhiyun HDMI_AUD_INPUTCLKFS_64FS = 4, 1007*4882a593Smuzhiyun 1008*4882a593Smuzhiyun /* AHB_DMA_CONF0 field values */ 1009*4882a593Smuzhiyun HDMI_AHB_DMA_CONF0_SW_FIFO_RST_OFFSET = 7, 1010*4882a593Smuzhiyun HDMI_AHB_DMA_CONF0_SW_FIFO_RST_MASK = 0x80, 1011*4882a593Smuzhiyun HDMI_AHB_DMA_CONF0_HBR = 0x10, 1012*4882a593Smuzhiyun HDMI_AHB_DMA_CONF0_EN_HLOCK_OFFSET = 3, 1013*4882a593Smuzhiyun HDMI_AHB_DMA_CONF0_EN_HLOCK_MASK = 0x08, 1014*4882a593Smuzhiyun HDMI_AHB_DMA_CONF0_INCR_TYPE_OFFSET = 1, 1015*4882a593Smuzhiyun HDMI_AHB_DMA_CONF0_INCR_TYPE_MASK = 0x06, 1016*4882a593Smuzhiyun HDMI_AHB_DMA_CONF0_INCR4 = 0x0, 1017*4882a593Smuzhiyun HDMI_AHB_DMA_CONF0_INCR8 = 0x2, 1018*4882a593Smuzhiyun HDMI_AHB_DMA_CONF0_INCR16 = 0x4, 1019*4882a593Smuzhiyun HDMI_AHB_DMA_CONF0_BURST_MODE = 0x1, 1020*4882a593Smuzhiyun 1021*4882a593Smuzhiyun /* HDMI_AHB_DMA_START field values */ 1022*4882a593Smuzhiyun HDMI_AHB_DMA_START_START_OFFSET = 0, 1023*4882a593Smuzhiyun HDMI_AHB_DMA_START_START_MASK = 0x01, 1024*4882a593Smuzhiyun 1025*4882a593Smuzhiyun /* HDMI_AHB_DMA_STOP field values */ 1026*4882a593Smuzhiyun HDMI_AHB_DMA_STOP_STOP_OFFSET = 0, 1027*4882a593Smuzhiyun HDMI_AHB_DMA_STOP_STOP_MASK = 0x01, 1028*4882a593Smuzhiyun 1029*4882a593Smuzhiyun /* AHB_DMA_STAT, AHB_DMA_INT, AHB_DMA_MASK, AHB_DMA_POL field values */ 1030*4882a593Smuzhiyun HDMI_AHB_DMA_DONE = 0x80, 1031*4882a593Smuzhiyun HDMI_AHB_DMA_RETRY_SPLIT = 0x40, 1032*4882a593Smuzhiyun HDMI_AHB_DMA_LOSTOWNERSHIP = 0x20, 1033*4882a593Smuzhiyun HDMI_AHB_DMA_ERROR = 0x10, 1034*4882a593Smuzhiyun HDMI_AHB_DMA_FIFO_THREMPTY = 0x04, 1035*4882a593Smuzhiyun HDMI_AHB_DMA_FIFO_FULL = 0x02, 1036*4882a593Smuzhiyun HDMI_AHB_DMA_FIFO_EMPTY = 0x01, 1037*4882a593Smuzhiyun 1038*4882a593Smuzhiyun /* AHB_DMA_BUFFSTAT, AHB_DMA_BUFFINT,AHB_DMA_BUFFMASK,AHB_DMA_BUFFPOL values */ 1039*4882a593Smuzhiyun HDMI_AHB_DMA_BUFFSTAT_FULL = 0x02, 1040*4882a593Smuzhiyun HDMI_AHB_DMA_BUFFSTAT_EMPTY = 0x01, 1041*4882a593Smuzhiyun 1042*4882a593Smuzhiyun /* MC_CLKDIS field values */ 1043*4882a593Smuzhiyun HDMI_MC_CLKDIS_HDCPCLK_DISABLE = 0x40, 1044*4882a593Smuzhiyun HDMI_MC_CLKDIS_CECCLK_DISABLE = 0x20, 1045*4882a593Smuzhiyun HDMI_MC_CLKDIS_CSCCLK_DISABLE = 0x10, 1046*4882a593Smuzhiyun HDMI_MC_CLKDIS_AUDCLK_DISABLE = 0x8, 1047*4882a593Smuzhiyun HDMI_MC_CLKDIS_PREPCLK_DISABLE = 0x4, 1048*4882a593Smuzhiyun HDMI_MC_CLKDIS_TMDSCLK_DISABLE = 0x2, 1049*4882a593Smuzhiyun HDMI_MC_CLKDIS_PIXELCLK_DISABLE = 0x1, 1050*4882a593Smuzhiyun 1051*4882a593Smuzhiyun /* MC_SWRSTZ field values */ 1052*4882a593Smuzhiyun HDMI_MC_SWRSTZ_I2SSWRST_REQ = 0x08, 1053*4882a593Smuzhiyun HDMI_MC_SWRSTZ_TMDSSWRST_REQ = 0x02, 1054*4882a593Smuzhiyun 1055*4882a593Smuzhiyun /* MC_FLOWCTRL field values */ 1056*4882a593Smuzhiyun HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_MASK = 0x1, 1057*4882a593Smuzhiyun HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_IN_PATH = 0x1, 1058*4882a593Smuzhiyun HDMI_MC_FLOWCTRL_FEED_THROUGH_OFF_CSC_BYPASS = 0x0, 1059*4882a593Smuzhiyun 1060*4882a593Smuzhiyun /* MC_PHYRSTZ field values */ 1061*4882a593Smuzhiyun HDMI_MC_PHYRSTZ_PHYRSTZ = 0x01, 1062*4882a593Smuzhiyun 1063*4882a593Smuzhiyun /* MC_HEACPHY_RST field values */ 1064*4882a593Smuzhiyun HDMI_MC_HEACPHY_RST_ASSERT = 0x1, 1065*4882a593Smuzhiyun HDMI_MC_HEACPHY_RST_DEASSERT = 0x0, 1066*4882a593Smuzhiyun 1067*4882a593Smuzhiyun /* CSC_CFG field values */ 1068*4882a593Smuzhiyun HDMI_CSC_CFG_INTMODE_MASK = 0x30, 1069*4882a593Smuzhiyun HDMI_CSC_CFG_INTMODE_OFFSET = 4, 1070*4882a593Smuzhiyun HDMI_CSC_CFG_INTMODE_DISABLE = 0x00, 1071*4882a593Smuzhiyun HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA1 = 0x10, 1072*4882a593Smuzhiyun HDMI_CSC_CFG_INTMODE_CHROMA_INT_FORMULA2 = 0x20, 1073*4882a593Smuzhiyun HDMI_CSC_CFG_DECMODE_MASK = 0x3, 1074*4882a593Smuzhiyun HDMI_CSC_CFG_DECMODE_OFFSET = 0, 1075*4882a593Smuzhiyun HDMI_CSC_CFG_DECMODE_DISABLE = 0x0, 1076*4882a593Smuzhiyun HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA1 = 0x1, 1077*4882a593Smuzhiyun HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA2 = 0x2, 1078*4882a593Smuzhiyun HDMI_CSC_CFG_DECMODE_CHROMA_INT_FORMULA3 = 0x3, 1079*4882a593Smuzhiyun 1080*4882a593Smuzhiyun /* CSC_SCALE field values */ 1081*4882a593Smuzhiyun HDMI_CSC_SCALE_CSC_COLORDE_PTH_MASK = 0xF0, 1082*4882a593Smuzhiyun HDMI_CSC_SCALE_CSC_COLORDE_PTH_24BPP = 0x00, 1083*4882a593Smuzhiyun HDMI_CSC_SCALE_CSC_COLORDE_PTH_30BPP = 0x50, 1084*4882a593Smuzhiyun HDMI_CSC_SCALE_CSC_COLORDE_PTH_36BPP = 0x60, 1085*4882a593Smuzhiyun HDMI_CSC_SCALE_CSC_COLORDE_PTH_48BPP = 0x70, 1086*4882a593Smuzhiyun HDMI_CSC_SCALE_CSCSCALE_MASK = 0x03, 1087*4882a593Smuzhiyun 1088*4882a593Smuzhiyun /* A_HDCPCFG0 field values */ 1089*4882a593Smuzhiyun HDMI_A_HDCPCFG0_ELVENA_MASK = 0x80, 1090*4882a593Smuzhiyun HDMI_A_HDCPCFG0_ELVENA_ENABLE = 0x80, 1091*4882a593Smuzhiyun HDMI_A_HDCPCFG0_ELVENA_DISABLE = 0x00, 1092*4882a593Smuzhiyun HDMI_A_HDCPCFG0_I2CFASTMODE_MASK = 0x40, 1093*4882a593Smuzhiyun HDMI_A_HDCPCFG0_I2CFASTMODE_ENABLE = 0x40, 1094*4882a593Smuzhiyun HDMI_A_HDCPCFG0_I2CFASTMODE_DISABLE = 0x00, 1095*4882a593Smuzhiyun HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK = 0x20, 1096*4882a593Smuzhiyun HDMI_A_HDCPCFG0_BYPENCRYPTION_ENABLE = 0x20, 1097*4882a593Smuzhiyun HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE = 0x00, 1098*4882a593Smuzhiyun HDMI_A_HDCPCFG0_SYNCRICHECK_MASK = 0x10, 1099*4882a593Smuzhiyun HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE = 0x10, 1100*4882a593Smuzhiyun HDMI_A_HDCPCFG0_SYNCRICHECK_DISABLE = 0x00, 1101*4882a593Smuzhiyun HDMI_A_HDCPCFG0_AVMUTE_MASK = 0x8, 1102*4882a593Smuzhiyun HDMI_A_HDCPCFG0_AVMUTE_ENABLE = 0x8, 1103*4882a593Smuzhiyun HDMI_A_HDCPCFG0_AVMUTE_DISABLE = 0x0, 1104*4882a593Smuzhiyun HDMI_A_HDCPCFG0_RXDETECT_MASK = 0x4, 1105*4882a593Smuzhiyun HDMI_A_HDCPCFG0_RXDETECT_ENABLE = 0x4, 1106*4882a593Smuzhiyun HDMI_A_HDCPCFG0_RXDETECT_DISABLE = 0x0, 1107*4882a593Smuzhiyun HDMI_A_HDCPCFG0_EN11FEATURE_MASK = 0x2, 1108*4882a593Smuzhiyun HDMI_A_HDCPCFG0_EN11FEATURE_ENABLE = 0x2, 1109*4882a593Smuzhiyun HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE = 0x0, 1110*4882a593Smuzhiyun HDMI_A_HDCPCFG0_HDMIDVI_MASK = 0x1, 1111*4882a593Smuzhiyun HDMI_A_HDCPCFG0_HDMIDVI_HDMI = 0x1, 1112*4882a593Smuzhiyun HDMI_A_HDCPCFG0_HDMIDVI_DVI = 0x0, 1113*4882a593Smuzhiyun 1114*4882a593Smuzhiyun /* A_HDCPCFG1 field values */ 1115*4882a593Smuzhiyun HDMI_A_HDCPCFG1_DISSHA1CHECK_MASK = 0x8, 1116*4882a593Smuzhiyun HDMI_A_HDCPCFG1_DISSHA1CHECK_DISABLE = 0x8, 1117*4882a593Smuzhiyun HDMI_A_HDCPCFG1_DISSHA1CHECK_ENABLE = 0x0, 1118*4882a593Smuzhiyun HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK = 0x4, 1119*4882a593Smuzhiyun HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE = 0x4, 1120*4882a593Smuzhiyun HDMI_A_HDCPCFG1_PH2UPSHFTENC_DISABLE = 0x0, 1121*4882a593Smuzhiyun HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK = 0x2, 1122*4882a593Smuzhiyun HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE = 0x2, 1123*4882a593Smuzhiyun HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE = 0x0, 1124*4882a593Smuzhiyun HDMI_A_HDCPCFG1_SWRESET_MASK = 0x1, 1125*4882a593Smuzhiyun HDMI_A_HDCPCFG1_SWRESET_ASSERT = 0x0, 1126*4882a593Smuzhiyun 1127*4882a593Smuzhiyun /* A_VIDPOLCFG field values */ 1128*4882a593Smuzhiyun HDMI_A_VIDPOLCFG_UNENCRYPTCONF_MASK = 0x60, 1129*4882a593Smuzhiyun HDMI_A_VIDPOLCFG_UNENCRYPTCONF_OFFSET = 5, 1130*4882a593Smuzhiyun HDMI_A_VIDPOLCFG_DATAENPOL_MASK = 0x10, 1131*4882a593Smuzhiyun HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_HIGH = 0x10, 1132*4882a593Smuzhiyun HDMI_A_VIDPOLCFG_DATAENPOL_ACTIVE_LOW = 0x0, 1133*4882a593Smuzhiyun HDMI_A_VIDPOLCFG_VSYNCPOL_MASK = 0x8, 1134*4882a593Smuzhiyun HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_HIGH = 0x8, 1135*4882a593Smuzhiyun HDMI_A_VIDPOLCFG_VSYNCPOL_ACTIVE_LOW = 0x0, 1136*4882a593Smuzhiyun HDMI_A_VIDPOLCFG_HSYNCPOL_MASK = 0x2, 1137*4882a593Smuzhiyun HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_HIGH = 0x2, 1138*4882a593Smuzhiyun HDMI_A_VIDPOLCFG_HSYNCPOL_ACTIVE_LOW = 0x0, 1139*4882a593Smuzhiyun 1140*4882a593Smuzhiyun /* I2CM_OPERATION field values */ 1141*4882a593Smuzhiyun HDMI_I2CM_OPERATION_BUS_CLEAR = 0x20, 1142*4882a593Smuzhiyun HDMI_I2CM_OPERATION_WRITE = 0x10, 1143*4882a593Smuzhiyun HDMI_I2CM_OPERATION_READ8_EXT = 0x8, 1144*4882a593Smuzhiyun HDMI_I2CM_OPERATION_READ8 = 0x4, 1145*4882a593Smuzhiyun HDMI_I2CM_OPERATION_READ_EXT = 0x2, 1146*4882a593Smuzhiyun HDMI_I2CM_OPERATION_READ = 0x1, 1147*4882a593Smuzhiyun 1148*4882a593Smuzhiyun /* I2CM_INT field values */ 1149*4882a593Smuzhiyun HDMI_I2CM_INT_DONE_POL = 0x8, 1150*4882a593Smuzhiyun HDMI_I2CM_INT_DONE_MASK = 0x4, 1151*4882a593Smuzhiyun 1152*4882a593Smuzhiyun /* I2CM_CTLINT field values */ 1153*4882a593Smuzhiyun HDMI_I2CM_CTLINT_NAC_POL = 0x80, 1154*4882a593Smuzhiyun HDMI_I2CM_CTLINT_NAC_MASK = 0x40, 1155*4882a593Smuzhiyun HDMI_I2CM_CTLINT_ARB_POL = 0x8, 1156*4882a593Smuzhiyun HDMI_I2CM_CTLINT_ARB_MASK = 0x4, 1157*4882a593Smuzhiyun 1158*4882a593Smuzhiyun /* I2CM_DIV field values */ 1159*4882a593Smuzhiyun HDMI_I2CM_DIV_FAST_STD_MODE = 0x8, 1160*4882a593Smuzhiyun HDMI_I2CM_DIV_FAST_MODE = 0x8, 1161*4882a593Smuzhiyun HDMI_I2CM_DIV_STD_MODE = 0, 1162*4882a593Smuzhiyun }; 1163*4882a593Smuzhiyun 1164*4882a593Smuzhiyun /* 1165*4882a593Smuzhiyun * HDMI 3D TX PHY registers 1166*4882a593Smuzhiyun */ 1167*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PWRCTRL 0x00 1168*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SERDIVCTRL 0x01 1169*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SERCKCTRL 0x02 1170*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SERCKKILLCTRL 0x03 1171*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_TXRESCTRL 0x04 1172*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_CKCALCTRL 0x05 1173*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_CPCE_CTRL 0x06 1174*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_TXCLKMEASCTRL 0x07 1175*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_TXMEASCTRL 0x08 1176*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_CKSYMTXCTRL 0x09 1177*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_CMPSEQCTRL 0x0a 1178*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_CMPPWRCTRL 0x0b 1179*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_CMPMODECTRL 0x0c 1180*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_MEASCTRL 0x0d 1181*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_VLEVCTRL 0x0e 1182*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_D2ACTRL 0x0f 1183*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_CURRCTRL 0x10 1184*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_DRVANACTRL 0x11 1185*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PLLMEASCTRL 0x12 1186*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PLLPHBYCTRL 0x13 1187*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_GRP_CTRL 0x14 1188*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_GMPCTRL 0x15 1189*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_MPLLMEASCTRL 0x16 1190*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_MSM_CTRL 0x17 1191*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SCRPB_STATUS 0x18 1192*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_TXTERM 0x19 1193*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PTRPT_ENBL 0x1a 1194*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PATTERNGEN 0x1b 1195*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SDCAP_MODE 0x1c 1196*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SCOPEMODE 0x1d 1197*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_DIGTXMODE 0x1e 1198*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_STR_STATUS 0x1f 1199*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SCOPECNT0 0x20 1200*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SCOPECNT1 0x21 1201*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SCOPECNT2 0x22 1202*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SCOPECNTCLK 0x23 1203*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SCOPESAMPLE 0x24 1204*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SCOPECNTMSB01 0x25 1205*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_SCOPECNTMSB2CK 0x26 1206*4882a593Smuzhiyun 1207*4882a593Smuzhiyun /* HDMI_3D_TX_PHY_CKCALCTRL values */ 1208*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_CKCALCTRL_OVERRIDE BIT(15) 1209*4882a593Smuzhiyun 1210*4882a593Smuzhiyun /* HDMI_3D_TX_PHY_MSM_CTRL values */ 1211*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_MSM_CTRL_MPLL_PH_SEL_CK BIT(13) 1212*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_CLK_REF_MPLL (0 << 1) 1213*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_OFF (1 << 1) 1214*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_PCLK (2 << 1) 1215*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_MSM_CTRL_CKO_SEL_FB_CLK (3 << 1) 1216*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_MSM_CTRL_SCOPE_CK_SEL BIT(0) 1217*4882a593Smuzhiyun 1218*4882a593Smuzhiyun /* HDMI_3D_TX_PHY_PTRPT_ENBL values */ 1219*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PTRPT_ENBL_OVERRIDE BIT(15) 1220*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT2 BIT(8) 1221*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT1 BIT(7) 1222*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PTRPT_ENBL_PG_SKIP_BIT0 BIT(6) 1223*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PTRPT_ENBL_CK_REF_ENB BIT(5) 1224*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PTRPT_ENBL_RCAL_ENB BIT(4) 1225*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_CLK_ALIGN_ENB BIT(3) 1226*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PTRPT_ENBL_TX_READY BIT(2) 1227*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PTRPT_ENBL_CKO_WORD_ENB BIT(1) 1228*4882a593Smuzhiyun #define HDMI_3D_TX_PHY_PTRPT_ENBL_REFCLK_ENB BIT(0) 1229*4882a593Smuzhiyun 1230*4882a593Smuzhiyun #endif /* __DW_HDMI_H__ */ 1231