xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/synopsys/dw-hdmi-hdcp.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3*4882a593Smuzhiyun  * Author Huicong Xu <xhc@rock-chips.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This software is licensed under the terms of the GNU General Public
6*4882a593Smuzhiyun  * License version 2, as published by the Free Software Foundation, and
7*4882a593Smuzhiyun  * may be copied, distributed, and modified under those terms.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful,
10*4882a593Smuzhiyun  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11*4882a593Smuzhiyun  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12*4882a593Smuzhiyun  * GNU General Public License for more details.
13*4882a593Smuzhiyun  */
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include <linux/clk.h>
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun #include <linux/err.h>
18*4882a593Smuzhiyun #include <linux/hdmi.h>
19*4882a593Smuzhiyun #include <linux/iopoll.h>
20*4882a593Smuzhiyun #include <linux/irq.h>
21*4882a593Smuzhiyun #include <linux/kthread.h>
22*4882a593Smuzhiyun #include <linux/mutex.h>
23*4882a593Smuzhiyun #include <linux/module.h>
24*4882a593Smuzhiyun #include <linux/of_device.h>
25*4882a593Smuzhiyun #include <linux/spinlock.h>
26*4882a593Smuzhiyun #include <linux/soc/rockchip/rk_vendor_storage.h>
27*4882a593Smuzhiyun #include <crypto/sha.h>
28*4882a593Smuzhiyun #include <drm/bridge/dw_hdmi.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include "dw-hdmi.h"
31*4882a593Smuzhiyun #include "dw-hdmi-hdcp.h"
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define HDCP_KEY_SIZE		308
34*4882a593Smuzhiyun #define HDCP_KEY_SEED_SIZE	2
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define KSV_LEN			5
37*4882a593Smuzhiyun #define HEADER			10
38*4882a593Smuzhiyun #define SHAMAX			20
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define MAX_DOWNSTREAM_DEVICE_NUM	5
41*4882a593Smuzhiyun #define DPK_WR_OK_TIMEOUT_US		30000
42*4882a593Smuzhiyun #define HDMI_HDCP1X_ID			5
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /* HDCP Registers */
45*4882a593Smuzhiyun #define HDMI_HDCPREG_RMCTL	0x780e
46*4882a593Smuzhiyun #define HDMI_HDCPREG_RMSTS	0x780f
47*4882a593Smuzhiyun #define HDMI_HDCPREG_SEED0	0x7810
48*4882a593Smuzhiyun #define HDMI_HDCPREG_SEED1	0x7811
49*4882a593Smuzhiyun #define HDMI_HDCPREG_DPK0	0x7812
50*4882a593Smuzhiyun #define HDMI_HDCPREG_DPK1	0x7813
51*4882a593Smuzhiyun #define HDMI_HDCPREG_DPK2	0x7814
52*4882a593Smuzhiyun #define HDMI_HDCPREG_DPK3	0x7815
53*4882a593Smuzhiyun #define HDMI_HDCPREG_DPK4	0x7816
54*4882a593Smuzhiyun #define HDMI_HDCPREG_DPK5	0x7817
55*4882a593Smuzhiyun #define HDMI_HDCPREG_DPK6	0x7818
56*4882a593Smuzhiyun #define HDMI_HDCP2REG_CTRL	0x7904
57*4882a593Smuzhiyun #define HDMI_HDCP2REG_MASK	0x790c
58*4882a593Smuzhiyun #define HDMI_HDCP2REG_MUTE	0x790e
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun enum dw_hdmi_hdcp_state {
61*4882a593Smuzhiyun 	DW_HDCP_DISABLED,
62*4882a593Smuzhiyun 	DW_HDCP_AUTH_START,
63*4882a593Smuzhiyun 	DW_HDCP_AUTH_SUCCESS,
64*4882a593Smuzhiyun 	DW_HDCP_AUTH_FAIL,
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun enum {
68*4882a593Smuzhiyun 	DW_HDMI_HDCP_KSV_LEN = 8,
69*4882a593Smuzhiyun 	DW_HDMI_HDCP_SHA_LEN = 20,
70*4882a593Smuzhiyun 	DW_HDMI_HDCP_DPK_LEN = 280,
71*4882a593Smuzhiyun 	DW_HDMI_HDCP_KEY_LEN = 308,
72*4882a593Smuzhiyun 	DW_HDMI_HDCP_SEED_LEN = 2,
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun enum {
76*4882a593Smuzhiyun 	HDMI_MC_CLKDIS_HDCPCLK_MASK = 0x40,
77*4882a593Smuzhiyun 	HDMI_MC_CLKDIS_HDCPCLK_ENABLE = 0x00,
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_SHA1_FAIL_MASK = 0X08,
80*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_SHA1_FAIL_DISABLE = 0X00,
81*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_SHA1_FAIL_ENABLE = 0X08,
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_KSV_UPDATE_MASK = 0X04,
84*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_KSV_UPDATE_DISABLE = 0X00,
85*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_KSV_UPDATE_ENABLE = 0X04,
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_KSV_MEM_REQ_MASK = 0X01,
88*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_KSV_MEM_REQ_DISABLE = 0X00,
89*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_KSV_MEM_REQ_ENABLE = 0X01,
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_KSV_MEM_ACCESS_MASK = 0X02,
92*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_KSV_MEM_ACCESS_DISABLE = 0X00,
93*4882a593Smuzhiyun 	HDMI_A_SRMCTRL_KSV_MEM_ACCESS_ENABLE = 0X02,
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	HDMI_A_SRM_BASE_MAX_DEVS_EXCEEDED = 0x80,
96*4882a593Smuzhiyun 	HDMI_A_SRM_BASE_DEVICE_COUNT = 0x7f,
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	HDMI_A_SRM_BASE_MAX_CASCADE_EXCEEDED = 0x08,
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	HDMI_A_APIINTSTAT_KSVSHA1_CALC_INT = 0x02,
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	/* HDCPREG_RMSTS field values */
103*4882a593Smuzhiyun 	DPK_WR_OK_STS = 0x40,
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	HDMI_A_HDCP22_MASK = 0x40,
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	HDMI_HDCP2_OVR_EN_MASK = 0x02,
108*4882a593Smuzhiyun 	HDMI_HDCP2_OVR_ENABLE = 0x02,
109*4882a593Smuzhiyun 	HDMI_HDCP2_OVR_DISABLE = 0x00,
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	HDMI_HDCP2_FORCE_MASK = 0x04,
112*4882a593Smuzhiyun 	HDMI_HDCP2_FORCE_ENABLE = 0x04,
113*4882a593Smuzhiyun 	HDMI_HDCP2_FORCE_DISABLE = 0x00,
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun struct sha_t {
117*4882a593Smuzhiyun 	u8 mlength[8];
118*4882a593Smuzhiyun 	u8 mblock[64];
119*4882a593Smuzhiyun 	int mindex;
120*4882a593Smuzhiyun 	int mcomputed;
121*4882a593Smuzhiyun 	int mcorrupted;
122*4882a593Smuzhiyun 	unsigned int mdigest[5];
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun static struct dw_hdcp *g_hdcp;
126*4882a593Smuzhiyun 
shacircularshift(unsigned int bits,unsigned int word)127*4882a593Smuzhiyun static inline unsigned int shacircularshift(unsigned int bits,
128*4882a593Smuzhiyun 					    unsigned int word)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	return (((word << bits) & 0xFFFFFFFF) | (word >> (32 - bits)));
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
hdcp_modb(struct dw_hdcp * hdcp,u8 data,u8 mask,unsigned int reg)133*4882a593Smuzhiyun static void hdcp_modb(struct dw_hdcp *hdcp, u8 data, u8 mask, unsigned int reg)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun 	struct dw_hdmi *hdmi = hdcp->hdmi;
136*4882a593Smuzhiyun 	u8 val = hdcp->read(hdmi, reg) & ~mask;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	val |= data & mask;
139*4882a593Smuzhiyun 	hdcp->write(hdmi, val, reg);
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun 
sha_reset(struct sha_t * sha)142*4882a593Smuzhiyun static void sha_reset(struct sha_t *sha)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	u32 i = 0;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	sha->mindex = 0;
147*4882a593Smuzhiyun 	sha->mcomputed = false;
148*4882a593Smuzhiyun 	sha->mcorrupted = false;
149*4882a593Smuzhiyun 	for (i = 0; i < sizeof(sha->mlength); i++)
150*4882a593Smuzhiyun 		sha->mlength[i] = 0;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	sha1_init(sha->mdigest);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun 
sha_processblock(struct sha_t * sha)155*4882a593Smuzhiyun static void sha_processblock(struct sha_t *sha)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	u32 array[SHA1_WORKSPACE_WORDS];
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	sha1_transform(sha->mdigest, sha->mblock, array);
160*4882a593Smuzhiyun 	sha->mindex = 0;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun 
sha_padmessage(struct sha_t * sha)163*4882a593Smuzhiyun static void sha_padmessage(struct sha_t *sha)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun 	/*
166*4882a593Smuzhiyun 	 *  Check to see if the current message block is too small to hold
167*4882a593Smuzhiyun 	 *  the initial padding bits and length.  If so, we will pad the
168*4882a593Smuzhiyun 	 *  block, process it, and then continue padding into a second
169*4882a593Smuzhiyun 	 *  block.
170*4882a593Smuzhiyun 	 */
171*4882a593Smuzhiyun 	if (sha->mindex > 55) {
172*4882a593Smuzhiyun 		sha->mblock[sha->mindex++] = 0x80;
173*4882a593Smuzhiyun 		while (sha->mindex < 64)
174*4882a593Smuzhiyun 			sha->mblock[sha->mindex++] = 0;
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 		sha_processblock(sha);
177*4882a593Smuzhiyun 		while (sha->mindex < 56)
178*4882a593Smuzhiyun 			sha->mblock[sha->mindex++] = 0;
179*4882a593Smuzhiyun 	} else {
180*4882a593Smuzhiyun 		sha->mblock[sha->mindex++] = 0x80;
181*4882a593Smuzhiyun 		while (sha->mindex < 56)
182*4882a593Smuzhiyun 			sha->mblock[sha->mindex++] = 0;
183*4882a593Smuzhiyun 	}
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	/* Store the message length as the last 8 octets */
186*4882a593Smuzhiyun 	sha->mblock[56] = sha->mlength[7];
187*4882a593Smuzhiyun 	sha->mblock[57] = sha->mlength[6];
188*4882a593Smuzhiyun 	sha->mblock[58] = sha->mlength[5];
189*4882a593Smuzhiyun 	sha->mblock[59] = sha->mlength[4];
190*4882a593Smuzhiyun 	sha->mblock[60] = sha->mlength[3];
191*4882a593Smuzhiyun 	sha->mblock[61] = sha->mlength[2];
192*4882a593Smuzhiyun 	sha->mblock[62] = sha->mlength[1];
193*4882a593Smuzhiyun 	sha->mblock[63] = sha->mlength[0];
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	sha_processblock(sha);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun 
sha_result(struct sha_t * sha)198*4882a593Smuzhiyun static int sha_result(struct sha_t *sha)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun 	if (sha->mcorrupted)
201*4882a593Smuzhiyun 		return false;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	if (sha->mcomputed == 0) {
204*4882a593Smuzhiyun 		sha_padmessage(sha);
205*4882a593Smuzhiyun 		sha->mcomputed = true;
206*4882a593Smuzhiyun 	}
207*4882a593Smuzhiyun 	return true;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
sha_input(struct sha_t * sha,const u8 * data,u32 size)210*4882a593Smuzhiyun static void sha_input(struct sha_t *sha, const u8 *data, u32 size)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	int i = 0;
213*4882a593Smuzhiyun 	unsigned int j = 0;
214*4882a593Smuzhiyun 	int rc = true;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	if (data == 0 || size == 0)
217*4882a593Smuzhiyun 		return;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	if (sha->mcomputed || sha->mcorrupted) {
220*4882a593Smuzhiyun 		sha->mcorrupted = true;
221*4882a593Smuzhiyun 		return;
222*4882a593Smuzhiyun 	}
223*4882a593Smuzhiyun 	while (size-- && !sha->mcorrupted) {
224*4882a593Smuzhiyun 		sha->mblock[sha->mindex++] = *data;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 		for (i = 0; i < 8; i++) {
227*4882a593Smuzhiyun 			rc = true;
228*4882a593Smuzhiyun 			for (j = 0; j < sizeof(sha->mlength); j++) {
229*4882a593Smuzhiyun 				sha->mlength[j]++;
230*4882a593Smuzhiyun 				if (sha->mlength[j] != 0) {
231*4882a593Smuzhiyun 					rc = false;
232*4882a593Smuzhiyun 					break;
233*4882a593Smuzhiyun 				}
234*4882a593Smuzhiyun 			}
235*4882a593Smuzhiyun 			sha->mcorrupted = (sha->mcorrupted  ||
236*4882a593Smuzhiyun 					   rc) ? true : false;
237*4882a593Smuzhiyun 		}
238*4882a593Smuzhiyun 		/* if corrupted then message is too long */
239*4882a593Smuzhiyun 		if (sha->mindex == 64)
240*4882a593Smuzhiyun 			sha_processblock(sha);
241*4882a593Smuzhiyun 		data++;
242*4882a593Smuzhiyun 	}
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun 
hdcp_verify_ksv(const u8 * data,u32 size)245*4882a593Smuzhiyun static int hdcp_verify_ksv(const u8 *data, u32 size)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun 	u32 i = 0;
248*4882a593Smuzhiyun 	struct sha_t sha;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	if ((!data) || (size < (HEADER + SHAMAX)))
251*4882a593Smuzhiyun 		return false;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	sha_reset(&sha);
254*4882a593Smuzhiyun 	sha_input(&sha, data, size - SHAMAX);
255*4882a593Smuzhiyun 	if (sha_result(&sha) == false)
256*4882a593Smuzhiyun 		return false;
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	for (i = 0; i < SHAMAX; i++) {
259*4882a593Smuzhiyun 		if (data[size - SHAMAX + i] != (u8)(sha.mdigest[i / 4]
260*4882a593Smuzhiyun 				>> ((i % 4) * 8)))
261*4882a593Smuzhiyun 			return false;
262*4882a593Smuzhiyun 	}
263*4882a593Smuzhiyun 	return true;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun 
hdcp_load_keys_cb(struct dw_hdcp * hdcp)266*4882a593Smuzhiyun static int hdcp_load_keys_cb(struct dw_hdcp *hdcp)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun 	u32 size;
269*4882a593Smuzhiyun 	u8 hdcp_vendor_data[320];
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	hdcp->keys = kmalloc(HDCP_KEY_SIZE, GFP_KERNEL);
272*4882a593Smuzhiyun 	if (!hdcp->keys)
273*4882a593Smuzhiyun 		return -ENOMEM;
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	hdcp->seeds = kmalloc(HDCP_KEY_SEED_SIZE, GFP_KERNEL);
276*4882a593Smuzhiyun 	if (!hdcp->seeds) {
277*4882a593Smuzhiyun 		kfree(hdcp->keys);
278*4882a593Smuzhiyun 		return -ENOMEM;
279*4882a593Smuzhiyun 	}
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	size = rk_vendor_read(HDMI_HDCP1X_ID, hdcp_vendor_data, 314);
282*4882a593Smuzhiyun 	if (size < (HDCP_KEY_SIZE + HDCP_KEY_SEED_SIZE)) {
283*4882a593Smuzhiyun 		dev_dbg(hdcp->dev, "HDCP: read size %d\n", size);
284*4882a593Smuzhiyun 		memset(hdcp->keys, 0, HDCP_KEY_SIZE);
285*4882a593Smuzhiyun 		memset(hdcp->seeds, 0, HDCP_KEY_SEED_SIZE);
286*4882a593Smuzhiyun 	} else {
287*4882a593Smuzhiyun 		memcpy(hdcp->keys, hdcp_vendor_data, HDCP_KEY_SIZE);
288*4882a593Smuzhiyun 		memcpy(hdcp->seeds, hdcp_vendor_data + HDCP_KEY_SIZE,
289*4882a593Smuzhiyun 		       HDCP_KEY_SEED_SIZE);
290*4882a593Smuzhiyun 	}
291*4882a593Smuzhiyun 	return 0;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun 
dw_hdmi_hdcp_load_key(struct dw_hdcp * hdcp)294*4882a593Smuzhiyun static int dw_hdmi_hdcp_load_key(struct dw_hdcp *hdcp)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun 	int i, j;
297*4882a593Smuzhiyun 	int ret, val;
298*4882a593Smuzhiyun 	void __iomem *reg_rmsts_addr;
299*4882a593Smuzhiyun 	struct hdcp_keys *hdcp_keys;
300*4882a593Smuzhiyun 	struct dw_hdmi *hdmi = hdcp->hdmi;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	if (!hdcp->keys) {
303*4882a593Smuzhiyun 		ret = hdcp_load_keys_cb(hdcp);
304*4882a593Smuzhiyun 		if (ret)
305*4882a593Smuzhiyun 			return ret;
306*4882a593Smuzhiyun 	}
307*4882a593Smuzhiyun 	hdcp_keys = hdcp->keys;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	if (hdcp->reg_io_width == 4)
310*4882a593Smuzhiyun 		reg_rmsts_addr = hdcp->regs + (HDMI_HDCPREG_RMSTS << 2);
311*4882a593Smuzhiyun 	else if (hdcp->reg_io_width == 1)
312*4882a593Smuzhiyun 		reg_rmsts_addr = hdcp->regs + HDMI_HDCPREG_RMSTS;
313*4882a593Smuzhiyun 	else
314*4882a593Smuzhiyun 		return -EPERM;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	/* Disable decryption logic */
317*4882a593Smuzhiyun 	hdcp->write(hdmi, 0, HDMI_HDCPREG_RMCTL);
318*4882a593Smuzhiyun 	ret = readx_poll_timeout(readl, reg_rmsts_addr, val,
319*4882a593Smuzhiyun 				 val & DPK_WR_OK_STS, 1000,
320*4882a593Smuzhiyun 				 DPK_WR_OK_TIMEOUT_US);
321*4882a593Smuzhiyun 	if (ret)
322*4882a593Smuzhiyun 		return ret;
323*4882a593Smuzhiyun 	hdcp->write(hdmi, 0, HDMI_HDCPREG_DPK6);
324*4882a593Smuzhiyun 	hdcp->write(hdmi, 0, HDMI_HDCPREG_DPK5);
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	/* The useful data in ksv should be 5 byte */
327*4882a593Smuzhiyun 	for (i = 4; i >= 0; i--)
328*4882a593Smuzhiyun 		hdcp->write(hdmi, hdcp_keys->KSV[i], HDMI_HDCPREG_DPK0 + i);
329*4882a593Smuzhiyun 	ret = readx_poll_timeout(readl, reg_rmsts_addr, val,
330*4882a593Smuzhiyun 				 val & DPK_WR_OK_STS, 1000,
331*4882a593Smuzhiyun 				 DPK_WR_OK_TIMEOUT_US);
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	if (ret)
334*4882a593Smuzhiyun 		return ret;
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	/* Enable decryption logic */
337*4882a593Smuzhiyun 	if (hdcp->seeds) {
338*4882a593Smuzhiyun 		hdcp->write(hdmi, 1, HDMI_HDCPREG_RMCTL);
339*4882a593Smuzhiyun 		hdcp->write(hdmi, hdcp->seeds[0], HDMI_HDCPREG_SEED1);
340*4882a593Smuzhiyun 		hdcp->write(hdmi, hdcp->seeds[1], HDMI_HDCPREG_SEED0);
341*4882a593Smuzhiyun 	} else {
342*4882a593Smuzhiyun 		hdcp->write(hdmi, 0, HDMI_HDCPREG_RMCTL);
343*4882a593Smuzhiyun 	}
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	/* Write encrypt device private key */
346*4882a593Smuzhiyun 	for (i = 0; i < DW_HDMI_HDCP_DPK_LEN - 6; i += 7) {
347*4882a593Smuzhiyun 		for (j = 6; j >= 0; j--)
348*4882a593Smuzhiyun 			hdcp->write(hdmi, hdcp_keys->devicekey[i + j],
349*4882a593Smuzhiyun 				    HDMI_HDCPREG_DPK0 + j);
350*4882a593Smuzhiyun 		ret = readx_poll_timeout(readl, reg_rmsts_addr, val,
351*4882a593Smuzhiyun 					 val & DPK_WR_OK_STS, 1000,
352*4882a593Smuzhiyun 					 DPK_WR_OK_TIMEOUT_US);
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 		if (ret)
355*4882a593Smuzhiyun 			return ret;
356*4882a593Smuzhiyun 	}
357*4882a593Smuzhiyun 	return 0;
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun 
dw_hdmi_hdcp_start(struct dw_hdcp * hdcp)360*4882a593Smuzhiyun static int dw_hdmi_hdcp_start(struct dw_hdcp *hdcp)
361*4882a593Smuzhiyun {
362*4882a593Smuzhiyun 	struct dw_hdmi *hdmi = hdcp->hdmi;
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	if (!hdcp->enable)
365*4882a593Smuzhiyun 		return -EPERM;
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	if (!(hdcp->read(hdmi, HDMI_HDCPREG_RMSTS) & 0x3f))
368*4882a593Smuzhiyun 		dw_hdmi_hdcp_load_key(hdcp);
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	hdcp_modb(hdcp, HDMI_FC_INVIDCONF_HDCP_KEEPOUT_ACTIVE,
371*4882a593Smuzhiyun 		  HDMI_FC_INVIDCONF_HDCP_KEEPOUT_MASK,
372*4882a593Smuzhiyun 		  HDMI_FC_INVIDCONF);
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	hdcp->remaining_times = hdcp->retry_times;
375*4882a593Smuzhiyun 	if (hdcp->read(hdmi, HDMI_CONFIG1_ID) & HDMI_A_HDCP22_MASK) {
376*4882a593Smuzhiyun 		if (hdcp->hdcp2_enable == 0) {
377*4882a593Smuzhiyun 			hdcp_modb(hdcp, HDMI_HDCP2_OVR_ENABLE |
378*4882a593Smuzhiyun 				  HDMI_HDCP2_FORCE_DISABLE,
379*4882a593Smuzhiyun 				  HDMI_HDCP2_OVR_EN_MASK |
380*4882a593Smuzhiyun 				  HDMI_HDCP2_FORCE_MASK,
381*4882a593Smuzhiyun 				  HDMI_HDCP2REG_CTRL);
382*4882a593Smuzhiyun 			hdcp->write(hdmi, 0xff, HDMI_HDCP2REG_MASK);
383*4882a593Smuzhiyun 			hdcp->write(hdmi, 0xff, HDMI_HDCP2REG_MUTE);
384*4882a593Smuzhiyun 		} else {
385*4882a593Smuzhiyun 			hdcp_modb(hdcp, HDMI_HDCP2_OVR_DISABLE |
386*4882a593Smuzhiyun 				  HDMI_HDCP2_FORCE_DISABLE,
387*4882a593Smuzhiyun 				  HDMI_HDCP2_OVR_EN_MASK |
388*4882a593Smuzhiyun 				  HDMI_HDCP2_FORCE_MASK,
389*4882a593Smuzhiyun 				  HDMI_HDCP2REG_CTRL);
390*4882a593Smuzhiyun 			hdcp->write(hdmi, 0x00, HDMI_HDCP2REG_MASK);
391*4882a593Smuzhiyun 			hdcp->write(hdmi, 0x00, HDMI_HDCP2REG_MUTE);
392*4882a593Smuzhiyun 		}
393*4882a593Smuzhiyun 	}
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	hdcp->write(hdmi, 0x40, HDMI_A_OESSWCFG);
396*4882a593Smuzhiyun 		    hdcp_modb(hdcp, HDMI_A_HDCPCFG0_BYPENCRYPTION_DISABLE |
397*4882a593Smuzhiyun 		    HDMI_A_HDCPCFG0_EN11FEATURE_DISABLE |
398*4882a593Smuzhiyun 		    HDMI_A_HDCPCFG0_SYNCRICHECK_ENABLE,
399*4882a593Smuzhiyun 		    HDMI_A_HDCPCFG0_BYPENCRYPTION_MASK |
400*4882a593Smuzhiyun 		    HDMI_A_HDCPCFG0_EN11FEATURE_MASK |
401*4882a593Smuzhiyun 		    HDMI_A_HDCPCFG0_SYNCRICHECK_MASK, HDMI_A_HDCPCFG0);
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	hdcp_modb(hdcp, HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_ENABLE |
404*4882a593Smuzhiyun 		  HDMI_A_HDCPCFG1_PH2UPSHFTENC_ENABLE,
405*4882a593Smuzhiyun 		  HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK |
406*4882a593Smuzhiyun 		  HDMI_A_HDCPCFG1_PH2UPSHFTENC_MASK, HDMI_A_HDCPCFG1);
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	/* Reset HDCP Engine */
409*4882a593Smuzhiyun 	if (hdcp->read(hdmi, HDMI_MC_CLKDIS) & HDMI_MC_CLKDIS_HDCPCLK_MASK) {
410*4882a593Smuzhiyun 		hdcp_modb(hdcp, HDMI_A_HDCPCFG1_SWRESET_ASSERT,
411*4882a593Smuzhiyun 			  HDMI_A_HDCPCFG1_SWRESET_MASK, HDMI_A_HDCPCFG1);
412*4882a593Smuzhiyun 	}
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	hdcp->write(hdmi, 0x00, HDMI_A_APIINTMSK);
415*4882a593Smuzhiyun 	hdcp_modb(hdcp, HDMI_A_HDCPCFG0_RXDETECT_ENABLE,
416*4882a593Smuzhiyun 		  HDMI_A_HDCPCFG0_RXDETECT_MASK, HDMI_A_HDCPCFG0);
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 	/*
419*4882a593Smuzhiyun 	 * XXX: to sleep 100ms here between output hdmi and enable hdcpclk,
420*4882a593Smuzhiyun 	 * otherwise hdcp auth fail when Connect to repeater
421*4882a593Smuzhiyun 	 */
422*4882a593Smuzhiyun 	msleep(100);
423*4882a593Smuzhiyun 	hdcp_modb(hdcp, HDMI_MC_CLKDIS_HDCPCLK_ENABLE,
424*4882a593Smuzhiyun 		  HDMI_MC_CLKDIS_HDCPCLK_MASK, HDMI_MC_CLKDIS);
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	hdcp->status = DW_HDCP_AUTH_START;
427*4882a593Smuzhiyun 	dev_dbg(hdcp->dev, "%s success\n", __func__);
428*4882a593Smuzhiyun 	return 0;
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun 
dw_hdmi_hdcp_stop(struct dw_hdcp * hdcp)431*4882a593Smuzhiyun static int dw_hdmi_hdcp_stop(struct dw_hdcp *hdcp)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun 	struct dw_hdmi *hdmi = hdcp->hdmi;
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	if (!hdcp->enable)
436*4882a593Smuzhiyun 		return -EPERM;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	hdcp_modb(hdcp, HDMI_MC_CLKDIS_HDCPCLK_DISABLE,
439*4882a593Smuzhiyun 		  HDMI_MC_CLKDIS_HDCPCLK_MASK, HDMI_MC_CLKDIS);
440*4882a593Smuzhiyun 	hdcp->write(hdmi, 0xff, HDMI_A_APIINTMSK);
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	hdcp_modb(hdcp, HDMI_A_HDCPCFG0_RXDETECT_DISABLE,
443*4882a593Smuzhiyun 		  HDMI_A_HDCPCFG0_RXDETECT_MASK, HDMI_A_HDCPCFG0);
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	hdcp_modb(hdcp, HDMI_A_SRMCTRL_SHA1_FAIL_DISABLE |
446*4882a593Smuzhiyun 		  HDMI_A_SRMCTRL_KSV_UPDATE_DISABLE,
447*4882a593Smuzhiyun 		  HDMI_A_SRMCTRL_SHA1_FAIL_MASK |
448*4882a593Smuzhiyun 		  HDMI_A_SRMCTRL_KSV_UPDATE_MASK, HDMI_A_SRMCTRL);
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	hdcp->status = DW_HDCP_DISABLED;
451*4882a593Smuzhiyun 	return 0;
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun 
dw_hdmi_hdcp_ksvsha1(struct dw_hdcp * hdcp)454*4882a593Smuzhiyun static int dw_hdmi_hdcp_ksvsha1(struct dw_hdcp *hdcp)
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun 	int rc = 0, value, list, i;
457*4882a593Smuzhiyun 	char bstaus0, bstaus1;
458*4882a593Smuzhiyun 	char *ksvlistbuf;
459*4882a593Smuzhiyun 	struct dw_hdmi *hdmi = hdcp->hdmi;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	hdcp_modb(hdcp, HDMI_A_SRMCTRL_KSV_MEM_REQ_ENABLE,
462*4882a593Smuzhiyun 		  HDMI_A_SRMCTRL_KSV_MEM_REQ_MASK, HDMI_A_SRMCTRL);
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	list = 20;
465*4882a593Smuzhiyun 	do {
466*4882a593Smuzhiyun 		value = hdcp->read(hdmi, HDMI_A_SRMCTRL);
467*4882a593Smuzhiyun 		usleep_range(500, 1000);
468*4882a593Smuzhiyun 	} while ((value & HDMI_A_SRMCTRL_KSV_MEM_ACCESS_MASK) == 0 && --list);
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	if ((value & HDMI_A_SRMCTRL_KSV_MEM_ACCESS_MASK) == 0) {
471*4882a593Smuzhiyun 		dev_err(hdcp->dev, "KSV memory can not access\n");
472*4882a593Smuzhiyun 		rc = -EPERM;
473*4882a593Smuzhiyun 		goto out;
474*4882a593Smuzhiyun 	}
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	hdcp->read(hdmi, HDMI_A_SRM_BASE);
477*4882a593Smuzhiyun 	bstaus0 = hdcp->read(hdmi, HDMI_A_SRM_BASE + 1);
478*4882a593Smuzhiyun 	bstaus1 = hdcp->read(hdmi, HDMI_A_SRM_BASE + 2);
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	if (bstaus0 & HDMI_A_SRM_BASE_MAX_DEVS_EXCEEDED) {
481*4882a593Smuzhiyun 		dev_err(hdcp->dev, "MAX_DEVS_EXCEEDED\n");
482*4882a593Smuzhiyun 		rc = -EPERM;
483*4882a593Smuzhiyun 		goto out;
484*4882a593Smuzhiyun 	}
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	list = bstaus0 & HDMI_A_SRM_BASE_DEVICE_COUNT;
487*4882a593Smuzhiyun 	if (list > MAX_DOWNSTREAM_DEVICE_NUM) {
488*4882a593Smuzhiyun 		dev_err(hdcp->dev, "MAX_DOWNSTREAM_DEVICE_NUM\n");
489*4882a593Smuzhiyun 		rc = -EPERM;
490*4882a593Smuzhiyun 		goto out;
491*4882a593Smuzhiyun 	}
492*4882a593Smuzhiyun 	if (bstaus1 & HDMI_A_SRM_BASE_MAX_CASCADE_EXCEEDED) {
493*4882a593Smuzhiyun 		dev_err(hdcp->dev, "MAX_CASCADE_EXCEEDED\n");
494*4882a593Smuzhiyun 		rc = -EPERM;
495*4882a593Smuzhiyun 		goto out;
496*4882a593Smuzhiyun 	}
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	value = (list * KSV_LEN) + HEADER + SHAMAX;
499*4882a593Smuzhiyun 	ksvlistbuf = kmalloc(value, GFP_KERNEL);
500*4882a593Smuzhiyun 	if (!ksvlistbuf) {
501*4882a593Smuzhiyun 		rc = -ENOMEM;
502*4882a593Smuzhiyun 		goto out;
503*4882a593Smuzhiyun 	}
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	ksvlistbuf[(list * KSV_LEN)] = bstaus0;
506*4882a593Smuzhiyun 	ksvlistbuf[(list * KSV_LEN) + 1] = bstaus1;
507*4882a593Smuzhiyun 	for (i = 2; i < value; i++) {
508*4882a593Smuzhiyun 		if (i < HEADER)	/* BSTATUS & M0 */
509*4882a593Smuzhiyun 			ksvlistbuf[(list * KSV_LEN) + i] =
510*4882a593Smuzhiyun 				hdcp->read(hdmi, HDMI_A_SRM_BASE + i + 1);
511*4882a593Smuzhiyun 		else if (i < (HEADER + (list * KSV_LEN))) /* KSV list */
512*4882a593Smuzhiyun 			ksvlistbuf[i - HEADER] =
513*4882a593Smuzhiyun 				hdcp->read(hdmi, HDMI_A_SRM_BASE + i + 1);
514*4882a593Smuzhiyun 		else /* SHA */
515*4882a593Smuzhiyun 			ksvlistbuf[i] =
516*4882a593Smuzhiyun 				hdcp->read(hdmi, HDMI_A_SRM_BASE + i + 1);
517*4882a593Smuzhiyun 	}
518*4882a593Smuzhiyun 	if (hdcp_verify_ksv(ksvlistbuf, value) == true) {
519*4882a593Smuzhiyun 		rc = 0;
520*4882a593Smuzhiyun 		dev_dbg(hdcp->dev, "ksv check valid\n");
521*4882a593Smuzhiyun 	} else {
522*4882a593Smuzhiyun 		dev_err(hdcp->dev, "ksv check invalid\n");
523*4882a593Smuzhiyun 		rc = -1;
524*4882a593Smuzhiyun 	}
525*4882a593Smuzhiyun 	kfree(ksvlistbuf);
526*4882a593Smuzhiyun out:
527*4882a593Smuzhiyun 	hdcp_modb(hdcp, HDMI_A_SRMCTRL_KSV_MEM_REQ_DISABLE,
528*4882a593Smuzhiyun 		  HDMI_A_SRMCTRL_KSV_MEM_REQ_MASK, HDMI_A_SRMCTRL);
529*4882a593Smuzhiyun 	return rc;
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun 
dw_hdmi_hdcp_2nd_auth(struct dw_hdcp * hdcp)532*4882a593Smuzhiyun static void dw_hdmi_hdcp_2nd_auth(struct dw_hdcp *hdcp)
533*4882a593Smuzhiyun {
534*4882a593Smuzhiyun 	if (dw_hdmi_hdcp_ksvsha1(hdcp))
535*4882a593Smuzhiyun 		hdcp_modb(hdcp, HDMI_A_SRMCTRL_SHA1_FAIL_ENABLE |
536*4882a593Smuzhiyun 			  HDMI_A_SRMCTRL_KSV_UPDATE_ENABLE,
537*4882a593Smuzhiyun 			  HDMI_A_SRMCTRL_SHA1_FAIL_MASK |
538*4882a593Smuzhiyun 			  HDMI_A_SRMCTRL_KSV_UPDATE_MASK, HDMI_A_SRMCTRL);
539*4882a593Smuzhiyun 	else
540*4882a593Smuzhiyun 		hdcp_modb(hdcp, HDMI_A_SRMCTRL_SHA1_FAIL_DISABLE |
541*4882a593Smuzhiyun 			  HDMI_A_SRMCTRL_KSV_UPDATE_ENABLE,
542*4882a593Smuzhiyun 			  HDMI_A_SRMCTRL_SHA1_FAIL_MASK |
543*4882a593Smuzhiyun 			  HDMI_A_SRMCTRL_KSV_UPDATE_MASK, HDMI_A_SRMCTRL);
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun 
dw_hdmi_hdcp_isr(struct dw_hdcp * hdcp,int hdcp_int)546*4882a593Smuzhiyun static void dw_hdmi_hdcp_isr(struct dw_hdcp *hdcp, int hdcp_int)
547*4882a593Smuzhiyun {
548*4882a593Smuzhiyun 	dev_dbg(hdcp->dev, "hdcp_int is 0x%02x\n", hdcp_int);
549*4882a593Smuzhiyun 	if (hdcp_int & HDMI_A_APIINTSTAT_KSVSHA1_CALC_INT) {
550*4882a593Smuzhiyun 		dev_dbg(hdcp->dev, "hdcp sink is a repeater\n");
551*4882a593Smuzhiyun 		dw_hdmi_hdcp_2nd_auth(hdcp);
552*4882a593Smuzhiyun 	}
553*4882a593Smuzhiyun 	if (hdcp_int & 0x40) {
554*4882a593Smuzhiyun 		hdcp->status = DW_HDCP_AUTH_FAIL;
555*4882a593Smuzhiyun 		if (hdcp->remaining_times > 1)
556*4882a593Smuzhiyun 			hdcp->remaining_times--;
557*4882a593Smuzhiyun 		else if (hdcp->remaining_times == 1)
558*4882a593Smuzhiyun 			hdcp_modb(hdcp,
559*4882a593Smuzhiyun 				  HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_DISABLE,
560*4882a593Smuzhiyun 				  HDMI_A_HDCPCFG1_ENCRYPTIONDISABLE_MASK,
561*4882a593Smuzhiyun 				  HDMI_A_HDCPCFG1);
562*4882a593Smuzhiyun 	}
563*4882a593Smuzhiyun 	if (hdcp_int & 0x80) {
564*4882a593Smuzhiyun 		dev_dbg(hdcp->dev, "hdcp auth success\n");
565*4882a593Smuzhiyun 		hdcp->status = DW_HDCP_AUTH_SUCCESS;
566*4882a593Smuzhiyun 	}
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun 
hdcp_enable_read(struct device * device,struct device_attribute * attr,char * buf)569*4882a593Smuzhiyun static ssize_t hdcp_enable_read(struct device *device,
570*4882a593Smuzhiyun 				struct device_attribute *attr, char *buf)
571*4882a593Smuzhiyun {
572*4882a593Smuzhiyun 	bool enable = 0;
573*4882a593Smuzhiyun 	struct dw_hdcp *hdcp = g_hdcp;
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun 	if (hdcp)
576*4882a593Smuzhiyun 		enable = hdcp->enable;
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	return snprintf(buf, PAGE_SIZE, "%d\n", enable);
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun 
hdcp_enable_write(struct device * device,struct device_attribute * attr,const char * buf,size_t count)581*4882a593Smuzhiyun static ssize_t hdcp_enable_write(struct device *device,
582*4882a593Smuzhiyun 				 struct device_attribute *attr,
583*4882a593Smuzhiyun 				 const char *buf, size_t count)
584*4882a593Smuzhiyun {
585*4882a593Smuzhiyun 	bool enable;
586*4882a593Smuzhiyun 	struct dw_hdcp *hdcp = g_hdcp;
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun 	if (!hdcp)
589*4882a593Smuzhiyun 		return -EINVAL;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	if (kstrtobool(buf, &enable))
592*4882a593Smuzhiyun 		return -EINVAL;
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	if (hdcp->enable != enable) {
595*4882a593Smuzhiyun 		if (enable) {
596*4882a593Smuzhiyun 			hdcp->enable = enable;
597*4882a593Smuzhiyun 			if (hdcp->read(hdcp->hdmi, HDMI_PHY_STAT0) &
598*4882a593Smuzhiyun 			    HDMI_PHY_HPD)
599*4882a593Smuzhiyun 				dw_hdmi_hdcp_start(hdcp);
600*4882a593Smuzhiyun 		} else {
601*4882a593Smuzhiyun 			dw_hdmi_hdcp_stop(hdcp);
602*4882a593Smuzhiyun 			hdcp->enable = enable;
603*4882a593Smuzhiyun 		}
604*4882a593Smuzhiyun 	}
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun 	return count;
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun static DEVICE_ATTR(enable, 0644, hdcp_enable_read, hdcp_enable_write);
610*4882a593Smuzhiyun 
hdcp_trytimes_read(struct device * device,struct device_attribute * attr,char * buf)611*4882a593Smuzhiyun static ssize_t hdcp_trytimes_read(struct device *device,
612*4882a593Smuzhiyun 				  struct device_attribute *attr, char *buf)
613*4882a593Smuzhiyun {
614*4882a593Smuzhiyun 	int trytimes = 0;
615*4882a593Smuzhiyun 	struct dw_hdcp *hdcp = g_hdcp;
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun 	if (hdcp)
618*4882a593Smuzhiyun 		trytimes = hdcp->retry_times;
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun 	return snprintf(buf, PAGE_SIZE, "%d\n", trytimes);
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun 
hdcp_trytimes_write(struct device * device,struct device_attribute * attr,const char * buf,size_t count)623*4882a593Smuzhiyun static ssize_t hdcp_trytimes_write(struct device *device,
624*4882a593Smuzhiyun 				   struct device_attribute *attr,
625*4882a593Smuzhiyun 				   const char *buf, size_t count)
626*4882a593Smuzhiyun {
627*4882a593Smuzhiyun 	int trytimes;
628*4882a593Smuzhiyun 	struct dw_hdcp *hdcp = g_hdcp;
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	if (!hdcp)
631*4882a593Smuzhiyun 		return -EINVAL;
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 	if (kstrtoint(buf, 0, &trytimes))
634*4882a593Smuzhiyun 		return -EINVAL;
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun 	if (hdcp->retry_times != trytimes) {
637*4882a593Smuzhiyun 		hdcp->retry_times = trytimes;
638*4882a593Smuzhiyun 		hdcp->remaining_times = hdcp->retry_times;
639*4882a593Smuzhiyun 	}
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	return count;
642*4882a593Smuzhiyun }
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun static DEVICE_ATTR(trytimes, 0644, hdcp_trytimes_read, hdcp_trytimes_write);
645*4882a593Smuzhiyun 
hdcp_status_read(struct device * device,struct device_attribute * attr,char * buf)646*4882a593Smuzhiyun static ssize_t hdcp_status_read(struct device *device,
647*4882a593Smuzhiyun 				struct device_attribute *attr, char *buf)
648*4882a593Smuzhiyun {
649*4882a593Smuzhiyun 	int status = DW_HDCP_DISABLED;
650*4882a593Smuzhiyun 	struct dw_hdcp *hdcp = g_hdcp;
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 	if (hdcp)
653*4882a593Smuzhiyun 		status = hdcp->status;
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	if (status == DW_HDCP_DISABLED)
656*4882a593Smuzhiyun 		return snprintf(buf, PAGE_SIZE, "hdcp disable\n");
657*4882a593Smuzhiyun 	else if (status == DW_HDCP_AUTH_START)
658*4882a593Smuzhiyun 		return snprintf(buf, PAGE_SIZE, "hdcp_auth_start\n");
659*4882a593Smuzhiyun 	else if (status == DW_HDCP_AUTH_SUCCESS)
660*4882a593Smuzhiyun 		return snprintf(buf, PAGE_SIZE, "hdcp_auth_success\n");
661*4882a593Smuzhiyun 	else if (status == DW_HDCP_AUTH_FAIL)
662*4882a593Smuzhiyun 		return snprintf(buf, PAGE_SIZE, "hdcp_auth_fail\n");
663*4882a593Smuzhiyun 	else
664*4882a593Smuzhiyun 		return snprintf(buf, PAGE_SIZE, "unknown status\n");
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun static DEVICE_ATTR(status, 0444, hdcp_status_read, NULL);
668*4882a593Smuzhiyun 
dw_hdmi_hdcp_probe(struct platform_device * pdev)669*4882a593Smuzhiyun static int dw_hdmi_hdcp_probe(struct platform_device *pdev)
670*4882a593Smuzhiyun {
671*4882a593Smuzhiyun 	int ret = 0;
672*4882a593Smuzhiyun 	struct dw_hdcp *hdcp = pdev->dev.platform_data;
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun 	g_hdcp = hdcp;
675*4882a593Smuzhiyun 	hdcp->mdev.minor = MISC_DYNAMIC_MINOR;
676*4882a593Smuzhiyun 	hdcp->mdev.name = "hdmi_hdcp1x";
677*4882a593Smuzhiyun 	hdcp->mdev.mode = 0666;
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 	if (misc_register(&hdcp->mdev)) {
680*4882a593Smuzhiyun 		dev_err(&pdev->dev, "HDCP: Could not add character driver\n");
681*4882a593Smuzhiyun 		return -EINVAL;
682*4882a593Smuzhiyun 	}
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun 	ret = device_create_file(hdcp->mdev.this_device, &dev_attr_enable);
685*4882a593Smuzhiyun 	if (ret) {
686*4882a593Smuzhiyun 		dev_err(&pdev->dev, "HDCP: Could not add sys file enable\n");
687*4882a593Smuzhiyun 		ret = -EINVAL;
688*4882a593Smuzhiyun 		goto error0;
689*4882a593Smuzhiyun 	}
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	ret = device_create_file(hdcp->mdev.this_device, &dev_attr_trytimes);
692*4882a593Smuzhiyun 	if (ret) {
693*4882a593Smuzhiyun 		dev_err(&pdev->dev, "HDCP: Could not add sys file trytimes\n");
694*4882a593Smuzhiyun 		ret = -EINVAL;
695*4882a593Smuzhiyun 		goto error1;
696*4882a593Smuzhiyun 	}
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	ret = device_create_file(hdcp->mdev.this_device, &dev_attr_status);
699*4882a593Smuzhiyun 	if (ret) {
700*4882a593Smuzhiyun 		dev_err(&pdev->dev, "HDCP: Could not add sys file status\n");
701*4882a593Smuzhiyun 		ret = -EINVAL;
702*4882a593Smuzhiyun 		goto error2;
703*4882a593Smuzhiyun 	}
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	/* retry time if hdcp auth fail. unlimited time if set 0 */
706*4882a593Smuzhiyun 	hdcp->retry_times = 0;
707*4882a593Smuzhiyun 	hdcp->dev = &pdev->dev;
708*4882a593Smuzhiyun 	hdcp->hdcp_start = dw_hdmi_hdcp_start;
709*4882a593Smuzhiyun 	hdcp->hdcp_stop = dw_hdmi_hdcp_stop;
710*4882a593Smuzhiyun 	hdcp->hdcp_isr = dw_hdmi_hdcp_isr;
711*4882a593Smuzhiyun 	dev_dbg(hdcp->dev, "%s success\n", __func__);
712*4882a593Smuzhiyun 	return 0;
713*4882a593Smuzhiyun 
714*4882a593Smuzhiyun error2:
715*4882a593Smuzhiyun 	device_remove_file(hdcp->mdev.this_device, &dev_attr_trytimes);
716*4882a593Smuzhiyun error1:
717*4882a593Smuzhiyun 	device_remove_file(hdcp->mdev.this_device, &dev_attr_enable);
718*4882a593Smuzhiyun error0:
719*4882a593Smuzhiyun 	misc_deregister(&hdcp->mdev);
720*4882a593Smuzhiyun 	return ret;
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun 
dw_hdmi_hdcp_remove(struct platform_device * pdev)723*4882a593Smuzhiyun static int dw_hdmi_hdcp_remove(struct platform_device *pdev)
724*4882a593Smuzhiyun {
725*4882a593Smuzhiyun 	struct dw_hdcp *hdcp = pdev->dev.platform_data;
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun 	device_remove_file(hdcp->mdev.this_device, &dev_attr_trytimes);
728*4882a593Smuzhiyun 	device_remove_file(hdcp->mdev.this_device, &dev_attr_enable);
729*4882a593Smuzhiyun 	device_remove_file(hdcp->mdev.this_device, &dev_attr_status);
730*4882a593Smuzhiyun 	misc_deregister(&hdcp->mdev);
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun 	kfree(hdcp->keys);
733*4882a593Smuzhiyun 	kfree(hdcp->seeds);
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	return 0;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun 
738*4882a593Smuzhiyun static struct platform_driver dw_hdmi_hdcp_driver = {
739*4882a593Smuzhiyun 	.probe  = dw_hdmi_hdcp_probe,
740*4882a593Smuzhiyun 	.remove = dw_hdmi_hdcp_remove,
741*4882a593Smuzhiyun 	.driver = {
742*4882a593Smuzhiyun 		.name = DW_HDCP_DRIVER_NAME,
743*4882a593Smuzhiyun 	},
744*4882a593Smuzhiyun };
745*4882a593Smuzhiyun 
746*4882a593Smuzhiyun module_platform_driver(dw_hdmi_hdcp_driver);
747*4882a593Smuzhiyun MODULE_DESCRIPTION("DW HDMI transmitter HDCP driver");
748*4882a593Smuzhiyun MODULE_LICENSE("GPL");
749