1*4882a593Smuzhiyun #ifndef DW_HDMI_CEC_H 2*4882a593Smuzhiyun #define DW_HDMI_CEC_H 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun struct dw_hdmi; 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #define CEC_EN BIT(0) 7*4882a593Smuzhiyun #define CEC_WAKE BIT(1) 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun struct dw_hdmi_cec_ops { 10*4882a593Smuzhiyun void (*write)(struct dw_hdmi *hdmi, u8 val, int offset); 11*4882a593Smuzhiyun u8 (*read)(struct dw_hdmi *hdmi, int offset); 12*4882a593Smuzhiyun void (*enable)(struct dw_hdmi *hdmi); 13*4882a593Smuzhiyun void (*disable)(struct dw_hdmi *hdmi); 14*4882a593Smuzhiyun void (*mod)(struct dw_hdmi *hdmi, u8 data, u8 mask, unsigned int reg); 15*4882a593Smuzhiyun }; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun struct dw_hdmi_cec_data { 18*4882a593Smuzhiyun struct dw_hdmi *hdmi; 19*4882a593Smuzhiyun const struct dw_hdmi_cec_ops *ops; 20*4882a593Smuzhiyun int irq; 21*4882a593Smuzhiyun int wake_irq; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun void dw_hdmi_hpd_wake_up(struct platform_device *pdev); 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #endif 27