1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef DW_HDMI_AUDIO_H 3*4882a593Smuzhiyun #define DW_HDMI_AUDIO_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun struct dw_hdmi; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun struct dw_hdmi_audio_data { 8*4882a593Smuzhiyun phys_addr_t phys; 9*4882a593Smuzhiyun void __iomem *base; 10*4882a593Smuzhiyun int irq; 11*4882a593Smuzhiyun struct dw_hdmi *hdmi; 12*4882a593Smuzhiyun u8 *(*get_eld)(struct dw_hdmi *hdmi); 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun struct dw_hdmi_i2s_audio_data { 16*4882a593Smuzhiyun struct dw_hdmi *hdmi; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun void (*write)(struct dw_hdmi *hdmi, u8 val, int offset); 19*4882a593Smuzhiyun u8 (*read)(struct dw_hdmi *hdmi, int offset); 20*4882a593Smuzhiyun u8 *(*get_eld)(struct dw_hdmi *hdmi); 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #endif 24