1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyunconfig DRM_CDNS_MHDP8546 3*4882a593Smuzhiyun tristate "Cadence DPI/DP bridge" 4*4882a593Smuzhiyun select DRM_KMS_HELPER 5*4882a593Smuzhiyun select DRM_PANEL_BRIDGE 6*4882a593Smuzhiyun depends on OF 7*4882a593Smuzhiyun help 8*4882a593Smuzhiyun Support Cadence DPI to DP bridge. This is an internal 9*4882a593Smuzhiyun bridge and is meant to be directly embedded in a SoC. 10*4882a593Smuzhiyun It takes a DPI stream as input and outputs it encoded 11*4882a593Smuzhiyun in DP format. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunif DRM_CDNS_MHDP8546 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunconfig DRM_CDNS_MHDP8546_J721E 16*4882a593Smuzhiyun depends on ARCH_K3 || COMPILE_TEST 17*4882a593Smuzhiyun bool "J721E Cadence DPI/DP wrapper support" 18*4882a593Smuzhiyun default y 19*4882a593Smuzhiyun help 20*4882a593Smuzhiyun Support J721E Cadence DPI/DP wrapper. This is a wrapper 21*4882a593Smuzhiyun which adds support for J721E related platform ops. It 22*4882a593Smuzhiyun initializes the J721E Display Port and sets up the 23*4882a593Smuzhiyun clock and data muxes. 24*4882a593Smuzhiyunendif 25