1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef AST_DRAM_TABLES_H 3*4882a593Smuzhiyun #define AST_DRAM_TABLES_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* DRAM timing tables */ 6*4882a593Smuzhiyun struct ast_dramstruct { 7*4882a593Smuzhiyun u16 index; 8*4882a593Smuzhiyun u32 data; 9*4882a593Smuzhiyun }; 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun static const struct ast_dramstruct ast2000_dram_table_data[] = { 12*4882a593Smuzhiyun { 0x0108, 0x00000000 }, 13*4882a593Smuzhiyun { 0x0120, 0x00004a21 }, 14*4882a593Smuzhiyun { 0xFF00, 0x00000043 }, 15*4882a593Smuzhiyun { 0x0000, 0xFFFFFFFF }, 16*4882a593Smuzhiyun { 0x0004, 0x00000089 }, 17*4882a593Smuzhiyun { 0x0008, 0x22331353 }, 18*4882a593Smuzhiyun { 0x000C, 0x0d07000b }, 19*4882a593Smuzhiyun { 0x0010, 0x11113333 }, 20*4882a593Smuzhiyun { 0x0020, 0x00110350 }, 21*4882a593Smuzhiyun { 0x0028, 0x1e0828f0 }, 22*4882a593Smuzhiyun { 0x0024, 0x00000001 }, 23*4882a593Smuzhiyun { 0x001C, 0x00000000 }, 24*4882a593Smuzhiyun { 0x0014, 0x00000003 }, 25*4882a593Smuzhiyun { 0xFF00, 0x00000043 }, 26*4882a593Smuzhiyun { 0x0018, 0x00000131 }, 27*4882a593Smuzhiyun { 0x0014, 0x00000001 }, 28*4882a593Smuzhiyun { 0xFF00, 0x00000043 }, 29*4882a593Smuzhiyun { 0x0018, 0x00000031 }, 30*4882a593Smuzhiyun { 0x0014, 0x00000001 }, 31*4882a593Smuzhiyun { 0xFF00, 0x00000043 }, 32*4882a593Smuzhiyun { 0x0028, 0x1e0828f1 }, 33*4882a593Smuzhiyun { 0x0024, 0x00000003 }, 34*4882a593Smuzhiyun { 0x002C, 0x1f0f28fb }, 35*4882a593Smuzhiyun { 0x0030, 0xFFFFFE01 }, 36*4882a593Smuzhiyun { 0xFFFF, 0xFFFFFFFF } 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun static const struct ast_dramstruct ast1100_dram_table_data[] = { 40*4882a593Smuzhiyun { 0x2000, 0x1688a8a8 }, 41*4882a593Smuzhiyun { 0x2020, 0x000041f0 }, 42*4882a593Smuzhiyun { 0xFF00, 0x00000043 }, 43*4882a593Smuzhiyun { 0x0000, 0xfc600309 }, 44*4882a593Smuzhiyun { 0x006C, 0x00909090 }, 45*4882a593Smuzhiyun { 0x0064, 0x00050000 }, 46*4882a593Smuzhiyun { 0x0004, 0x00000585 }, 47*4882a593Smuzhiyun { 0x0008, 0x0011030f }, 48*4882a593Smuzhiyun { 0x0010, 0x22201724 }, 49*4882a593Smuzhiyun { 0x0018, 0x1e29011a }, 50*4882a593Smuzhiyun { 0x0020, 0x00c82222 }, 51*4882a593Smuzhiyun { 0x0014, 0x01001523 }, 52*4882a593Smuzhiyun { 0x001C, 0x1024010d }, 53*4882a593Smuzhiyun { 0x0024, 0x00cb2522 }, 54*4882a593Smuzhiyun { 0x0038, 0xffffff82 }, 55*4882a593Smuzhiyun { 0x003C, 0x00000000 }, 56*4882a593Smuzhiyun { 0x0040, 0x00000000 }, 57*4882a593Smuzhiyun { 0x0044, 0x00000000 }, 58*4882a593Smuzhiyun { 0x0048, 0x00000000 }, 59*4882a593Smuzhiyun { 0x004C, 0x00000000 }, 60*4882a593Smuzhiyun { 0x0050, 0x00000000 }, 61*4882a593Smuzhiyun { 0x0054, 0x00000000 }, 62*4882a593Smuzhiyun { 0x0058, 0x00000000 }, 63*4882a593Smuzhiyun { 0x005C, 0x00000000 }, 64*4882a593Smuzhiyun { 0x0060, 0x032aa02a }, 65*4882a593Smuzhiyun { 0x0064, 0x002d3000 }, 66*4882a593Smuzhiyun { 0x0068, 0x00000000 }, 67*4882a593Smuzhiyun { 0x0070, 0x00000000 }, 68*4882a593Smuzhiyun { 0x0074, 0x00000000 }, 69*4882a593Smuzhiyun { 0x0078, 0x00000000 }, 70*4882a593Smuzhiyun { 0x007C, 0x00000000 }, 71*4882a593Smuzhiyun { 0x0034, 0x00000001 }, 72*4882a593Smuzhiyun { 0xFF00, 0x00000043 }, 73*4882a593Smuzhiyun { 0x002C, 0x00000732 }, 74*4882a593Smuzhiyun { 0x0030, 0x00000040 }, 75*4882a593Smuzhiyun { 0x0028, 0x00000005 }, 76*4882a593Smuzhiyun { 0x0028, 0x00000007 }, 77*4882a593Smuzhiyun { 0x0028, 0x00000003 }, 78*4882a593Smuzhiyun { 0x0028, 0x00000001 }, 79*4882a593Smuzhiyun { 0x000C, 0x00005a08 }, 80*4882a593Smuzhiyun { 0x002C, 0x00000632 }, 81*4882a593Smuzhiyun { 0x0028, 0x00000001 }, 82*4882a593Smuzhiyun { 0x0030, 0x000003c0 }, 83*4882a593Smuzhiyun { 0x0028, 0x00000003 }, 84*4882a593Smuzhiyun { 0x0030, 0x00000040 }, 85*4882a593Smuzhiyun { 0x0028, 0x00000003 }, 86*4882a593Smuzhiyun { 0x000C, 0x00005a21 }, 87*4882a593Smuzhiyun { 0x0034, 0x00007c03 }, 88*4882a593Smuzhiyun { 0x0120, 0x00004c41 }, 89*4882a593Smuzhiyun { 0xffff, 0xffffffff }, 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun static const struct ast_dramstruct ast2100_dram_table_data[] = { 93*4882a593Smuzhiyun { 0x2000, 0x1688a8a8 }, 94*4882a593Smuzhiyun { 0x2020, 0x00004120 }, 95*4882a593Smuzhiyun { 0xFF00, 0x00000043 }, 96*4882a593Smuzhiyun { 0x0000, 0xfc600309 }, 97*4882a593Smuzhiyun { 0x006C, 0x00909090 }, 98*4882a593Smuzhiyun { 0x0064, 0x00070000 }, 99*4882a593Smuzhiyun { 0x0004, 0x00000489 }, 100*4882a593Smuzhiyun { 0x0008, 0x0011030f }, 101*4882a593Smuzhiyun { 0x0010, 0x32302926 }, 102*4882a593Smuzhiyun { 0x0018, 0x274c0122 }, 103*4882a593Smuzhiyun { 0x0020, 0x00ce2222 }, 104*4882a593Smuzhiyun { 0x0014, 0x01001523 }, 105*4882a593Smuzhiyun { 0x001C, 0x1024010d }, 106*4882a593Smuzhiyun { 0x0024, 0x00cb2522 }, 107*4882a593Smuzhiyun { 0x0038, 0xffffff82 }, 108*4882a593Smuzhiyun { 0x003C, 0x00000000 }, 109*4882a593Smuzhiyun { 0x0040, 0x00000000 }, 110*4882a593Smuzhiyun { 0x0044, 0x00000000 }, 111*4882a593Smuzhiyun { 0x0048, 0x00000000 }, 112*4882a593Smuzhiyun { 0x004C, 0x00000000 }, 113*4882a593Smuzhiyun { 0x0050, 0x00000000 }, 114*4882a593Smuzhiyun { 0x0054, 0x00000000 }, 115*4882a593Smuzhiyun { 0x0058, 0x00000000 }, 116*4882a593Smuzhiyun { 0x005C, 0x00000000 }, 117*4882a593Smuzhiyun { 0x0060, 0x0f2aa02a }, 118*4882a593Smuzhiyun { 0x0064, 0x003f3005 }, 119*4882a593Smuzhiyun { 0x0068, 0x02020202 }, 120*4882a593Smuzhiyun { 0x0070, 0x00000000 }, 121*4882a593Smuzhiyun { 0x0074, 0x00000000 }, 122*4882a593Smuzhiyun { 0x0078, 0x00000000 }, 123*4882a593Smuzhiyun { 0x007C, 0x00000000 }, 124*4882a593Smuzhiyun { 0x0034, 0x00000001 }, 125*4882a593Smuzhiyun { 0xFF00, 0x00000043 }, 126*4882a593Smuzhiyun { 0x002C, 0x00000942 }, 127*4882a593Smuzhiyun { 0x0030, 0x00000040 }, 128*4882a593Smuzhiyun { 0x0028, 0x00000005 }, 129*4882a593Smuzhiyun { 0x0028, 0x00000007 }, 130*4882a593Smuzhiyun { 0x0028, 0x00000003 }, 131*4882a593Smuzhiyun { 0x0028, 0x00000001 }, 132*4882a593Smuzhiyun { 0x000C, 0x00005a08 }, 133*4882a593Smuzhiyun { 0x002C, 0x00000842 }, 134*4882a593Smuzhiyun { 0x0028, 0x00000001 }, 135*4882a593Smuzhiyun { 0x0030, 0x000003c0 }, 136*4882a593Smuzhiyun { 0x0028, 0x00000003 }, 137*4882a593Smuzhiyun { 0x0030, 0x00000040 }, 138*4882a593Smuzhiyun { 0x0028, 0x00000003 }, 139*4882a593Smuzhiyun { 0x000C, 0x00005a21 }, 140*4882a593Smuzhiyun { 0x0034, 0x00007c03 }, 141*4882a593Smuzhiyun { 0x0120, 0x00005061 }, 142*4882a593Smuzhiyun { 0xffff, 0xffffffff }, 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun /* 146*4882a593Smuzhiyun * AST2500 DRAM settings modules 147*4882a593Smuzhiyun */ 148*4882a593Smuzhiyun #define REGTBL_NUM 17 149*4882a593Smuzhiyun #define REGIDX_010 0 150*4882a593Smuzhiyun #define REGIDX_014 1 151*4882a593Smuzhiyun #define REGIDX_018 2 152*4882a593Smuzhiyun #define REGIDX_020 3 153*4882a593Smuzhiyun #define REGIDX_024 4 154*4882a593Smuzhiyun #define REGIDX_02C 5 155*4882a593Smuzhiyun #define REGIDX_030 6 156*4882a593Smuzhiyun #define REGIDX_214 7 157*4882a593Smuzhiyun #define REGIDX_2E0 8 158*4882a593Smuzhiyun #define REGIDX_2E4 9 159*4882a593Smuzhiyun #define REGIDX_2E8 10 160*4882a593Smuzhiyun #define REGIDX_2EC 11 161*4882a593Smuzhiyun #define REGIDX_2F0 12 162*4882a593Smuzhiyun #define REGIDX_2F4 13 163*4882a593Smuzhiyun #define REGIDX_2F8 14 164*4882a593Smuzhiyun #define REGIDX_RFC 15 165*4882a593Smuzhiyun #define REGIDX_PLL 16 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun static const u32 ast2500_ddr3_1600_timing_table[REGTBL_NUM] = { 168*4882a593Smuzhiyun 0x64604D38, /* 0x010 */ 169*4882a593Smuzhiyun 0x29690599, /* 0x014 */ 170*4882a593Smuzhiyun 0x00000300, /* 0x018 */ 171*4882a593Smuzhiyun 0x00000000, /* 0x020 */ 172*4882a593Smuzhiyun 0x00000000, /* 0x024 */ 173*4882a593Smuzhiyun 0x02181E70, /* 0x02C */ 174*4882a593Smuzhiyun 0x00000040, /* 0x030 */ 175*4882a593Smuzhiyun 0x00000024, /* 0x214 */ 176*4882a593Smuzhiyun 0x02001300, /* 0x2E0 */ 177*4882a593Smuzhiyun 0x0E0000A0, /* 0x2E4 */ 178*4882a593Smuzhiyun 0x000E001B, /* 0x2E8 */ 179*4882a593Smuzhiyun 0x35B8C105, /* 0x2EC */ 180*4882a593Smuzhiyun 0x08090408, /* 0x2F0 */ 181*4882a593Smuzhiyun 0x9B000800, /* 0x2F4 */ 182*4882a593Smuzhiyun 0x0E400A00, /* 0x2F8 */ 183*4882a593Smuzhiyun 0x9971452F, /* tRFC */ 184*4882a593Smuzhiyun 0x000071C1 /* PLL */ 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun static const u32 ast2500_ddr4_1600_timing_table[REGTBL_NUM] = { 188*4882a593Smuzhiyun 0x63604E37, /* 0x010 */ 189*4882a593Smuzhiyun 0xE97AFA99, /* 0x014 */ 190*4882a593Smuzhiyun 0x00019000, /* 0x018 */ 191*4882a593Smuzhiyun 0x08000000, /* 0x020 */ 192*4882a593Smuzhiyun 0x00000400, /* 0x024 */ 193*4882a593Smuzhiyun 0x00000410, /* 0x02C */ 194*4882a593Smuzhiyun 0x00000101, /* 0x030 */ 195*4882a593Smuzhiyun 0x00000024, /* 0x214 */ 196*4882a593Smuzhiyun 0x03002900, /* 0x2E0 */ 197*4882a593Smuzhiyun 0x0E0000A0, /* 0x2E4 */ 198*4882a593Smuzhiyun 0x000E001C, /* 0x2E8 */ 199*4882a593Smuzhiyun 0x35B8C106, /* 0x2EC */ 200*4882a593Smuzhiyun 0x08080607, /* 0x2F0 */ 201*4882a593Smuzhiyun 0x9B000900, /* 0x2F4 */ 202*4882a593Smuzhiyun 0x0E400A00, /* 0x2F8 */ 203*4882a593Smuzhiyun 0x99714545, /* tRFC */ 204*4882a593Smuzhiyun 0x000071C1 /* PLL */ 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun 207*4882a593Smuzhiyun #endif 208