xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/discovery.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2018 Advanced Micro Devices, Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun  * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*4882a593Smuzhiyun  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun  * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  */
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #ifndef _DISCOVERY_H_
25*4882a593Smuzhiyun #define _DISCOVERY_H_
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define PSP_HEADER_SIZE                 256
28*4882a593Smuzhiyun #define BINARY_SIGNATURE                0x28211407
29*4882a593Smuzhiyun #define DISCOVERY_TABLE_SIGNATURE       0x53445049
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun typedef enum
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun 	IP_DISCOVERY = 0,
34*4882a593Smuzhiyun 	GC,
35*4882a593Smuzhiyun 	HARVEST_INFO,
36*4882a593Smuzhiyun 	TABLE_4,
37*4882a593Smuzhiyun 	RESERVED_1,
38*4882a593Smuzhiyun 	RESERVED_2,
39*4882a593Smuzhiyun 	TOTAL_TABLES = 6
40*4882a593Smuzhiyun } table;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #pragma pack(1)
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun typedef struct table_info
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	uint16_t offset;   /* Byte offset */
47*4882a593Smuzhiyun 	uint16_t checksum; /* Byte sum of the table */
48*4882a593Smuzhiyun 	uint16_t size;     /* Table size */
49*4882a593Smuzhiyun 	uint16_t padding;
50*4882a593Smuzhiyun } table_info;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun typedef struct binary_header
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun 	/* psp structure should go at the top of this structure */
55*4882a593Smuzhiyun 	uint32_t binary_signature; /* 0x7, 0x14, 0x21, 0x28 */
56*4882a593Smuzhiyun 	uint16_t version_major;
57*4882a593Smuzhiyun 	uint16_t version_minor;
58*4882a593Smuzhiyun 	uint16_t binary_checksum;  /* Byte sum of the binary after this field */
59*4882a593Smuzhiyun 	uint16_t binary_size;      /* Binary Size*/
60*4882a593Smuzhiyun 	table_info table_list[TOTAL_TABLES];
61*4882a593Smuzhiyun } binary_header;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun typedef struct die_info
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	uint16_t die_id;
66*4882a593Smuzhiyun 	uint16_t die_offset; /* Points to the corresponding die_header structure */
67*4882a593Smuzhiyun } die_info;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun typedef struct ip_discovery_header
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	uint32_t signature;    /* Table Signature */
73*4882a593Smuzhiyun 	uint16_t version;      /* Table Version */
74*4882a593Smuzhiyun 	uint16_t size;         /* Table Size */
75*4882a593Smuzhiyun 	uint32_t id;           /* Table ID */
76*4882a593Smuzhiyun 	uint16_t num_dies;     /* Number of Dies */
77*4882a593Smuzhiyun 	die_info die_info[16]; /* list die information for up to 16 dies */
78*4882a593Smuzhiyun 	uint16_t padding[1];   /* padding */
79*4882a593Smuzhiyun } ip_discovery_header;
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun typedef struct ip
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	uint16_t hw_id;           /* Hardware ID */
84*4882a593Smuzhiyun 	uint8_t number_instance;  /* instance of the IP */
85*4882a593Smuzhiyun 	uint8_t num_base_address; /* Number of Base Addresses */
86*4882a593Smuzhiyun 	uint8_t major;            /* HCID Major */
87*4882a593Smuzhiyun 	uint8_t minor;            /* HCID Minor */
88*4882a593Smuzhiyun 	uint8_t revision;         /* HCID Revision */
89*4882a593Smuzhiyun #if defined(__BIG_ENDIAN)
90*4882a593Smuzhiyun 	uint8_t reserved : 4;     /* Placeholder field */
91*4882a593Smuzhiyun 	uint8_t harvest : 4;      /* Harvest */
92*4882a593Smuzhiyun #else
93*4882a593Smuzhiyun 	uint8_t harvest : 4;      /* Harvest */
94*4882a593Smuzhiyun 	uint8_t reserved : 4;     /* Placeholder field */
95*4882a593Smuzhiyun #endif
96*4882a593Smuzhiyun 	uint32_t base_address[1]; /* variable number of Addresses */
97*4882a593Smuzhiyun } ip;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun typedef struct die_header
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	uint16_t die_id;
102*4882a593Smuzhiyun 	uint16_t num_ips;
103*4882a593Smuzhiyun } die_header;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun typedef struct ip_structure
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun 	ip_discovery_header* header;
108*4882a593Smuzhiyun 	struct die
109*4882a593Smuzhiyun 	{
110*4882a593Smuzhiyun 		die_header *die_header;
111*4882a593Smuzhiyun 		ip *ip_list;
112*4882a593Smuzhiyun 	} die;
113*4882a593Smuzhiyun } ip_structure;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun struct gpu_info_header {
116*4882a593Smuzhiyun 	uint32_t table_id;      /* table ID */
117*4882a593Smuzhiyun 	uint16_t version_major; /* table version */
118*4882a593Smuzhiyun 	uint16_t version_minor; /* table version */
119*4882a593Smuzhiyun 	uint32_t size;          /* size of the entire header+data in bytes */
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun struct gc_info_v1_0 {
123*4882a593Smuzhiyun 	struct gpu_info_header header;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	uint32_t gc_num_se;
126*4882a593Smuzhiyun 	uint32_t gc_num_wgp0_per_sa;
127*4882a593Smuzhiyun 	uint32_t gc_num_wgp1_per_sa;
128*4882a593Smuzhiyun 	uint32_t gc_num_rb_per_se;
129*4882a593Smuzhiyun 	uint32_t gc_num_gl2c;
130*4882a593Smuzhiyun 	uint32_t gc_num_gprs;
131*4882a593Smuzhiyun 	uint32_t gc_num_max_gs_thds;
132*4882a593Smuzhiyun 	uint32_t gc_gs_table_depth;
133*4882a593Smuzhiyun 	uint32_t gc_gsprim_buff_depth;
134*4882a593Smuzhiyun 	uint32_t gc_parameter_cache_depth;
135*4882a593Smuzhiyun 	uint32_t gc_double_offchip_lds_buffer;
136*4882a593Smuzhiyun 	uint32_t gc_wave_size;
137*4882a593Smuzhiyun 	uint32_t gc_max_waves_per_simd;
138*4882a593Smuzhiyun 	uint32_t gc_max_scratch_slots_per_cu;
139*4882a593Smuzhiyun 	uint32_t gc_lds_size;
140*4882a593Smuzhiyun 	uint32_t gc_num_sc_per_se;
141*4882a593Smuzhiyun 	uint32_t gc_num_sa_per_se;
142*4882a593Smuzhiyun 	uint32_t gc_num_packer_per_sc;
143*4882a593Smuzhiyun 	uint32_t gc_num_gl2a;
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun struct gc_info_v1_1 {
147*4882a593Smuzhiyun 	struct gpu_info_header header;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	uint32_t gc_num_se;
150*4882a593Smuzhiyun 	uint32_t gc_num_wgp0_per_sa;
151*4882a593Smuzhiyun 	uint32_t gc_num_wgp1_per_sa;
152*4882a593Smuzhiyun 	uint32_t gc_num_rb_per_se;
153*4882a593Smuzhiyun 	uint32_t gc_num_gl2c;
154*4882a593Smuzhiyun 	uint32_t gc_num_gprs;
155*4882a593Smuzhiyun 	uint32_t gc_num_max_gs_thds;
156*4882a593Smuzhiyun 	uint32_t gc_gs_table_depth;
157*4882a593Smuzhiyun 	uint32_t gc_gsprim_buff_depth;
158*4882a593Smuzhiyun 	uint32_t gc_parameter_cache_depth;
159*4882a593Smuzhiyun 	uint32_t gc_double_offchip_lds_buffer;
160*4882a593Smuzhiyun 	uint32_t gc_wave_size;
161*4882a593Smuzhiyun 	uint32_t gc_max_waves_per_simd;
162*4882a593Smuzhiyun 	uint32_t gc_max_scratch_slots_per_cu;
163*4882a593Smuzhiyun 	uint32_t gc_lds_size;
164*4882a593Smuzhiyun 	uint32_t gc_num_sc_per_se;
165*4882a593Smuzhiyun 	uint32_t gc_num_sa_per_se;
166*4882a593Smuzhiyun 	uint32_t gc_num_packer_per_sc;
167*4882a593Smuzhiyun 	uint32_t gc_num_gl2a;
168*4882a593Smuzhiyun 	uint32_t gc_num_tcp_per_sa;
169*4882a593Smuzhiyun 	uint32_t gc_num_sdp_interface;
170*4882a593Smuzhiyun 	uint32_t gc_num_tcps;
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun struct gc_info_v2_0 {
174*4882a593Smuzhiyun 	struct gpu_info_header header;
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	uint32_t gc_num_se;
177*4882a593Smuzhiyun 	uint32_t gc_num_cu_per_sh;
178*4882a593Smuzhiyun 	uint32_t gc_num_sh_per_se;
179*4882a593Smuzhiyun 	uint32_t gc_num_rb_per_se;
180*4882a593Smuzhiyun 	uint32_t gc_num_tccs;
181*4882a593Smuzhiyun 	uint32_t gc_num_gprs;
182*4882a593Smuzhiyun 	uint32_t gc_num_max_gs_thds;
183*4882a593Smuzhiyun 	uint32_t gc_gs_table_depth;
184*4882a593Smuzhiyun 	uint32_t gc_gsprim_buff_depth;
185*4882a593Smuzhiyun 	uint32_t gc_parameter_cache_depth;
186*4882a593Smuzhiyun 	uint32_t gc_double_offchip_lds_buffer;
187*4882a593Smuzhiyun 	uint32_t gc_wave_size;
188*4882a593Smuzhiyun 	uint32_t gc_max_waves_per_simd;
189*4882a593Smuzhiyun 	uint32_t gc_max_scratch_slots_per_cu;
190*4882a593Smuzhiyun 	uint32_t gc_lds_size;
191*4882a593Smuzhiyun 	uint32_t gc_num_sc_per_se;
192*4882a593Smuzhiyun 	uint32_t gc_num_packer_per_sc;
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun typedef struct harvest_info_header {
196*4882a593Smuzhiyun 	uint32_t signature; /* Table Signature */
197*4882a593Smuzhiyun 	uint32_t version;   /* Table Version */
198*4882a593Smuzhiyun } harvest_info_header;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun typedef struct harvest_info {
201*4882a593Smuzhiyun 	uint16_t hw_id;          /* Hardware ID */
202*4882a593Smuzhiyun 	uint8_t number_instance; /* Instance of the IP */
203*4882a593Smuzhiyun 	uint8_t reserved;        /* Reserved for alignment */
204*4882a593Smuzhiyun } harvest_info;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun typedef struct harvest_table {
207*4882a593Smuzhiyun 	harvest_info_header header;
208*4882a593Smuzhiyun 	harvest_info list[32];
209*4882a593Smuzhiyun } harvest_table;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun #pragma pack()
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun #endif
214