xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/atomfirmwareid.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /****************************************************************************\
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun *  File Name      atomfirmwareid.h
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun *  Description    ATOM BIOS command/data table ID definition header file
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun *  Copyright 2016 Advanced Micro Devices, Inc.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
10*4882a593Smuzhiyun * and associated documentation files (the "Software"), to deal in the Software without restriction,
11*4882a593Smuzhiyun * including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
12*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so,
13*4882a593Smuzhiyun * subject to the following conditions:
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in all copies or substantial
16*4882a593Smuzhiyun * portions of the Software.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
21*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
22*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
23*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
24*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE.
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun \****************************************************************************/
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #ifndef _ATOMFIRMWAREID_H_
29*4882a593Smuzhiyun #define _ATOMFIRMWAREID_H_
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun enum atom_master_data_table_id
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__UTILITY_PIPELINE,
34*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__MULTIMEDIA_INF,
35*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__FIRMWARE_INF,
36*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__LCD_INF,
37*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__SMU_INF,
38*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__VRAM_USAGE_BY_FIRMWARE,
39*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__GPIO_PIN_LUT,
40*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__GFX_INF,
41*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__POWER_PLAY_INF,
42*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__DISPLAY_OBJECT_INF,
43*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__INDIRECT_IO_ACCESS,
44*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__UMC_INF,
45*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__DCE_INF,
46*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__VRAM_INF,
47*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__INTEGRATED_SYS_INF,
48*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__ASIC_PROFILING_INF,
49*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__VOLTAGE_OBJ_INF,
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun     VBIOS_DATA_TBL_ID__UNDEFINED,
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun enum atom_master_command_table_id
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__ASIC_INIT,
57*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__DIGX_ENCODER_CONTROL,
58*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__SET_ENGINE_CLOCK,
59*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__SET_MEMORY_CLOCK,
60*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__SET_PIXEL_CLOCK,
61*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__ENABLE_DISP_POWER_GATING,
62*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__BLANK_CRTC,
63*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__ENABLE_CRTC,
64*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__GET_SMU_CLOCK_INFO,
65*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__SELECT_CRTC_SOURCE,
66*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__SET_DCE_CLOCK,
67*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__GET_MEMORY_CLOCK,
68*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__GET_ENGINE_CLOCK,
69*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__SET_CRTC_USING_DTD_TIMING,
70*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__EXTENAL_ENCODER_CONTROL,
71*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__PROCESS_I2C_CHANNEL_TRANSACTION,
72*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__COMPUTE_GPU_CLOCK_PARAM,
73*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__DYNAMIC_MEMORY_SETTINGS,
74*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__MEMORY_TRAINING,
75*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__SET_VOLTAGE,
76*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__DIG1_TRANSMITTER_CONTROL,
77*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__PROCESS_AUX_CHANNEL_TRANSACTION,
78*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__GET_VOLTAGE_INF,
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun     VBIOS_CMD_TBL_ID__UNDEFINED,
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun #endif  /* _ATOMFIRMWAREID_H_  */
86*4882a593Smuzhiyun /* ### EOF ### */
87