1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright 2012 Advanced Micro Devices, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a 5*4882a593Smuzhiyun * copy of this software and associated documentation files (the "Software"), 6*4882a593Smuzhiyun * to deal in the Software without restriction, including without limitation 7*4882a593Smuzhiyun * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*4882a593Smuzhiyun * and/or sell copies of the Software, and to permit persons to whom the 9*4882a593Smuzhiyun * Software is furnished to do so, subject to the following conditions: 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in 12*4882a593Smuzhiyun * all copies or substantial portions of the Software. 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*4882a593Smuzhiyun * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*4882a593Smuzhiyun * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*4882a593Smuzhiyun * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun */ 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #ifndef AMD_ACPI_H 25*4882a593Smuzhiyun #define AMD_ACPI_H 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define ACPI_AC_CLASS "ac_adapter" 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun struct atif_verify_interface { 30*4882a593Smuzhiyun u16 size; /* structure size in bytes (includes size field) */ 31*4882a593Smuzhiyun u16 version; /* version */ 32*4882a593Smuzhiyun u32 notification_mask; /* supported notifications mask */ 33*4882a593Smuzhiyun u32 function_bits; /* supported functions bit vector */ 34*4882a593Smuzhiyun } __packed; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun struct atif_system_params { 37*4882a593Smuzhiyun u16 size; /* structure size in bytes (includes size field) */ 38*4882a593Smuzhiyun u32 valid_mask; /* valid flags mask */ 39*4882a593Smuzhiyun u32 flags; /* flags */ 40*4882a593Smuzhiyun u8 command_code; /* notify command code */ 41*4882a593Smuzhiyun } __packed; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun struct atif_sbios_requests { 44*4882a593Smuzhiyun u16 size; /* structure size in bytes (includes size field) */ 45*4882a593Smuzhiyun u32 pending; /* pending sbios requests */ 46*4882a593Smuzhiyun u8 panel_exp_mode; /* panel expansion mode */ 47*4882a593Smuzhiyun u8 thermal_gfx; /* thermal state: target gfx controller */ 48*4882a593Smuzhiyun u8 thermal_state; /* thermal state: state id (0: exit state, non-0: state) */ 49*4882a593Smuzhiyun u8 forced_power_gfx; /* forced power state: target gfx controller */ 50*4882a593Smuzhiyun u8 forced_power_state; /* forced power state: state id */ 51*4882a593Smuzhiyun u8 system_power_src; /* system power source */ 52*4882a593Smuzhiyun u8 backlight_level; /* panel backlight level (0-255) */ 53*4882a593Smuzhiyun } __packed; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun struct atif_qbtc_arguments { 56*4882a593Smuzhiyun u16 size; /* structure size in bytes (includes size field) */ 57*4882a593Smuzhiyun u8 requested_display; /* which display is requested */ 58*4882a593Smuzhiyun } __packed; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define ATIF_QBTC_MAX_DATA_POINTS 99 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun struct atif_qbtc_data_point { 63*4882a593Smuzhiyun u8 luminance; /* luminance in percent */ 64*4882a593Smuzhiyun u8 ipnut_signal; /* input signal in range 0-255 */ 65*4882a593Smuzhiyun } __packed; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun struct atif_qbtc_output { 68*4882a593Smuzhiyun u16 size; /* structure size in bytes (includes size field) */ 69*4882a593Smuzhiyun u16 flags; /* all zeroes */ 70*4882a593Smuzhiyun u8 error_code; /* error code */ 71*4882a593Smuzhiyun u8 ac_level; /* default brightness on AC power */ 72*4882a593Smuzhiyun u8 dc_level; /* default brightness on DC power */ 73*4882a593Smuzhiyun u8 min_input_signal; /* max input signal in range 0-255 */ 74*4882a593Smuzhiyun u8 max_input_signal; /* min input signal in range 0-255 */ 75*4882a593Smuzhiyun u8 number_of_points; /* number of data points */ 76*4882a593Smuzhiyun struct atif_qbtc_data_point data_points[ATIF_QBTC_MAX_DATA_POINTS]; 77*4882a593Smuzhiyun } __packed; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #define ATIF_NOTIFY_MASK 0x3 80*4882a593Smuzhiyun #define ATIF_NOTIFY_NONE 0 81*4882a593Smuzhiyun #define ATIF_NOTIFY_81 1 82*4882a593Smuzhiyun #define ATIF_NOTIFY_N 2 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun struct atcs_verify_interface { 85*4882a593Smuzhiyun u16 size; /* structure size in bytes (includes size field) */ 86*4882a593Smuzhiyun u16 version; /* version */ 87*4882a593Smuzhiyun u32 function_bits; /* supported functions bit vector */ 88*4882a593Smuzhiyun } __packed; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #define ATCS_VALID_FLAGS_MASK 0x3 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun struct atcs_pref_req_input { 93*4882a593Smuzhiyun u16 size; /* structure size in bytes (includes size field) */ 94*4882a593Smuzhiyun u16 client_id; /* client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) */ 95*4882a593Smuzhiyun u16 valid_flags_mask; /* valid flags mask */ 96*4882a593Smuzhiyun u16 flags; /* flags */ 97*4882a593Smuzhiyun u8 req_type; /* request type */ 98*4882a593Smuzhiyun u8 perf_req; /* performance request */ 99*4882a593Smuzhiyun } __packed; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun struct atcs_pref_req_output { 102*4882a593Smuzhiyun u16 size; /* structure size in bytes (includes size field) */ 103*4882a593Smuzhiyun u8 ret_val; /* return value */ 104*4882a593Smuzhiyun } __packed; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun /* AMD hw uses four ACPI control methods: 107*4882a593Smuzhiyun * 1. ATIF 108*4882a593Smuzhiyun * ARG0: (ACPI_INTEGER) function code 109*4882a593Smuzhiyun * ARG1: (ACPI_BUFFER) parameter buffer, 256 bytes 110*4882a593Smuzhiyun * OUTPUT: (ACPI_BUFFER) output buffer, 256 bytes 111*4882a593Smuzhiyun * ATIF provides an entry point for the gfx driver to interact with the sbios. 112*4882a593Smuzhiyun * The AMD ACPI notification mechanism uses Notify (VGA, 0x81) or a custom 113*4882a593Smuzhiyun * notification. Which notification is used as indicated by the ATIF Control 114*4882a593Smuzhiyun * Method GET_SYSTEM_PARAMETERS. When the driver receives Notify (VGA, 0x81) or 115*4882a593Smuzhiyun * a custom notification it invokes ATIF Control Method GET_SYSTEM_BIOS_REQUESTS 116*4882a593Smuzhiyun * to identify pending System BIOS requests and associated parameters. For 117*4882a593Smuzhiyun * example, if one of the pending requests is DISPLAY_SWITCH_REQUEST, the driver 118*4882a593Smuzhiyun * will perform display device detection and invoke ATIF Control Method 119*4882a593Smuzhiyun * SELECT_ACTIVE_DISPLAYS. 120*4882a593Smuzhiyun * 121*4882a593Smuzhiyun * 2. ATPX 122*4882a593Smuzhiyun * ARG0: (ACPI_INTEGER) function code 123*4882a593Smuzhiyun * ARG1: (ACPI_BUFFER) parameter buffer, 256 bytes 124*4882a593Smuzhiyun * OUTPUT: (ACPI_BUFFER) output buffer, 256 bytes 125*4882a593Smuzhiyun * ATPX methods are used on PowerXpress systems to handle mux switching and 126*4882a593Smuzhiyun * discrete GPU power control. 127*4882a593Smuzhiyun * 128*4882a593Smuzhiyun * 3. ATRM 129*4882a593Smuzhiyun * ARG0: (ACPI_INTEGER) offset of vbios rom data 130*4882a593Smuzhiyun * ARG1: (ACPI_BUFFER) size of the buffer to fill (up to 4K). 131*4882a593Smuzhiyun * OUTPUT: (ACPI_BUFFER) output buffer 132*4882a593Smuzhiyun * ATRM provides an interfacess to access the discrete GPU vbios image on 133*4882a593Smuzhiyun * PowerXpress systems with multiple GPUs. 134*4882a593Smuzhiyun * 135*4882a593Smuzhiyun * 4. ATCS 136*4882a593Smuzhiyun * ARG0: (ACPI_INTEGER) function code 137*4882a593Smuzhiyun * ARG1: (ACPI_BUFFER) parameter buffer, 256 bytes 138*4882a593Smuzhiyun * OUTPUT: (ACPI_BUFFER) output buffer, 256 bytes 139*4882a593Smuzhiyun * ATCS provides an interface to AMD chipset specific functionality. 140*4882a593Smuzhiyun * 141*4882a593Smuzhiyun */ 142*4882a593Smuzhiyun /* ATIF */ 143*4882a593Smuzhiyun #define ATIF_FUNCTION_VERIFY_INTERFACE 0x0 144*4882a593Smuzhiyun /* ARG0: ATIF_FUNCTION_VERIFY_INTERFACE 145*4882a593Smuzhiyun * ARG1: none 146*4882a593Smuzhiyun * OUTPUT: 147*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 148*4882a593Smuzhiyun * WORD - version 149*4882a593Smuzhiyun * DWORD - supported notifications mask 150*4882a593Smuzhiyun * DWORD - supported functions bit vector 151*4882a593Smuzhiyun */ 152*4882a593Smuzhiyun /* Notifications mask */ 153*4882a593Smuzhiyun # define ATIF_THERMAL_STATE_CHANGE_REQUEST_SUPPORTED (1 << 2) 154*4882a593Smuzhiyun # define ATIF_FORCED_POWER_STATE_CHANGE_REQUEST_SUPPORTED (1 << 3) 155*4882a593Smuzhiyun # define ATIF_SYSTEM_POWER_SOURCE_CHANGE_REQUEST_SUPPORTED (1 << 4) 156*4882a593Smuzhiyun # define ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST_SUPPORTED (1 << 7) 157*4882a593Smuzhiyun # define ATIF_DGPU_DISPLAY_EVENT_SUPPORTED (1 << 8) 158*4882a593Smuzhiyun # define ATIF_GPU_PACKAGE_POWER_LIMIT_REQUEST_SUPPORTED (1 << 12) 159*4882a593Smuzhiyun /* supported functions vector */ 160*4882a593Smuzhiyun # define ATIF_GET_SYSTEM_PARAMETERS_SUPPORTED (1 << 0) 161*4882a593Smuzhiyun # define ATIF_GET_SYSTEM_BIOS_REQUESTS_SUPPORTED (1 << 1) 162*4882a593Smuzhiyun # define ATIF_TEMPERATURE_CHANGE_NOTIFICATION_SUPPORTED (1 << 12) 163*4882a593Smuzhiyun # define ATIF_QUERY_BACKLIGHT_TRANSFER_CHARACTERISTICS_SUPPORTED (1 << 15) 164*4882a593Smuzhiyun # define ATIF_READY_TO_UNDOCK_NOTIFICATION_SUPPORTED (1 << 16) 165*4882a593Smuzhiyun # define ATIF_GET_EXTERNAL_GPU_INFORMATION_SUPPORTED (1 << 20) 166*4882a593Smuzhiyun #define ATIF_FUNCTION_GET_SYSTEM_PARAMETERS 0x1 167*4882a593Smuzhiyun /* ARG0: ATIF_FUNCTION_GET_SYSTEM_PARAMETERS 168*4882a593Smuzhiyun * ARG1: none 169*4882a593Smuzhiyun * OUTPUT: 170*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 171*4882a593Smuzhiyun * DWORD - valid flags mask 172*4882a593Smuzhiyun * DWORD - flags 173*4882a593Smuzhiyun * 174*4882a593Smuzhiyun * OR 175*4882a593Smuzhiyun * 176*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 177*4882a593Smuzhiyun * DWORD - valid flags mask 178*4882a593Smuzhiyun * DWORD - flags 179*4882a593Smuzhiyun * BYTE - notify command code 180*4882a593Smuzhiyun * 181*4882a593Smuzhiyun * flags 182*4882a593Smuzhiyun * bits 1:0: 183*4882a593Smuzhiyun * 0 - Notify(VGA, 0x81) is not used for notification 184*4882a593Smuzhiyun * 1 - Notify(VGA, 0x81) is used for notification 185*4882a593Smuzhiyun * 2 - Notify(VGA, n) is used for notification where 186*4882a593Smuzhiyun * n (0xd0-0xd9) is specified in notify command code. 187*4882a593Smuzhiyun * bit 2: 188*4882a593Smuzhiyun * 1 - lid changes not reported though int10 189*4882a593Smuzhiyun * bit 3: 190*4882a593Smuzhiyun * 1 - system bios controls overclocking 191*4882a593Smuzhiyun * bit 4: 192*4882a593Smuzhiyun * 1 - enable overclocking 193*4882a593Smuzhiyun */ 194*4882a593Smuzhiyun #define ATIF_FUNCTION_GET_SYSTEM_BIOS_REQUESTS 0x2 195*4882a593Smuzhiyun /* ARG0: ATIF_FUNCTION_GET_SYSTEM_BIOS_REQUESTS 196*4882a593Smuzhiyun * ARG1: none 197*4882a593Smuzhiyun * OUTPUT: 198*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 199*4882a593Smuzhiyun * DWORD - pending sbios requests 200*4882a593Smuzhiyun * BYTE - reserved (all zeroes) 201*4882a593Smuzhiyun * BYTE - thermal state: target gfx controller 202*4882a593Smuzhiyun * BYTE - thermal state: state id (0: exit state, non-0: state) 203*4882a593Smuzhiyun * BYTE - forced power state: target gfx controller 204*4882a593Smuzhiyun * BYTE - forced power state: state id (0: forced state, non-0: state) 205*4882a593Smuzhiyun * BYTE - system power source 206*4882a593Smuzhiyun * BYTE - panel backlight level (0-255) 207*4882a593Smuzhiyun * BYTE - GPU package power limit: target gfx controller 208*4882a593Smuzhiyun * DWORD - GPU package power limit: value (24:8 fractional format, Watts) 209*4882a593Smuzhiyun */ 210*4882a593Smuzhiyun /* pending sbios requests */ 211*4882a593Smuzhiyun # define ATIF_THERMAL_STATE_CHANGE_REQUEST (1 << 2) 212*4882a593Smuzhiyun # define ATIF_FORCED_POWER_STATE_CHANGE_REQUEST (1 << 3) 213*4882a593Smuzhiyun # define ATIF_SYSTEM_POWER_SOURCE_CHANGE_REQUEST (1 << 4) 214*4882a593Smuzhiyun # define ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST (1 << 7) 215*4882a593Smuzhiyun # define ATIF_DGPU_DISPLAY_EVENT (1 << 8) 216*4882a593Smuzhiyun # define ATIF_GPU_PACKAGE_POWER_LIMIT_REQUEST (1 << 12) 217*4882a593Smuzhiyun /* target gfx controller */ 218*4882a593Smuzhiyun # define ATIF_TARGET_GFX_SINGLE 0 219*4882a593Smuzhiyun # define ATIF_TARGET_GFX_PX_IGPU 1 220*4882a593Smuzhiyun # define ATIF_TARGET_GFX_PX_DGPU 2 221*4882a593Smuzhiyun /* system power source */ 222*4882a593Smuzhiyun # define ATIF_POWER_SOURCE_AC 1 223*4882a593Smuzhiyun # define ATIF_POWER_SOURCE_DC 2 224*4882a593Smuzhiyun # define ATIF_POWER_SOURCE_RESTRICTED_AC_1 3 225*4882a593Smuzhiyun # define ATIF_POWER_SOURCE_RESTRICTED_AC_2 4 226*4882a593Smuzhiyun #define ATIF_FUNCTION_TEMPERATURE_CHANGE_NOTIFICATION 0xD 227*4882a593Smuzhiyun /* ARG0: ATIF_FUNCTION_TEMPERATURE_CHANGE_NOTIFICATION 228*4882a593Smuzhiyun * ARG1: 229*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 230*4882a593Smuzhiyun * WORD - gfx controller id 231*4882a593Smuzhiyun * BYTE - current temperature (degress Celsius) 232*4882a593Smuzhiyun * OUTPUT: none 233*4882a593Smuzhiyun */ 234*4882a593Smuzhiyun #define ATIF_FUNCTION_QUERY_BRIGHTNESS_TRANSFER_CHARACTERISTICS 0x10 235*4882a593Smuzhiyun /* ARG0: ATIF_FUNCTION_QUERY_BRIGHTNESS_TRANSFER_CHARACTERISTICS 236*4882a593Smuzhiyun * ARG1: 237*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 238*4882a593Smuzhiyun * BYTE - requested display 239*4882a593Smuzhiyun * OUTPUT: 240*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 241*4882a593Smuzhiyun * WORD - flags (currently all 16 bits are reserved) 242*4882a593Smuzhiyun * BYTE - error code (on failure, disregard all below fields) 243*4882a593Smuzhiyun * BYTE - AC level (default brightness in percent when machine has full power) 244*4882a593Smuzhiyun * BYTE - DC level (default brightness in percent when machine is on battery) 245*4882a593Smuzhiyun * BYTE - min input signal, in range 0-255, corresponding to 0% backlight 246*4882a593Smuzhiyun * BYTE - max input signal, in range 0-255, corresponding to 100% backlight 247*4882a593Smuzhiyun * BYTE - number of reported data points 248*4882a593Smuzhiyun * BYTE - luminance level in percent \ repeated structure 249*4882a593Smuzhiyun * BYTE - input signal in range 0-255 / does not have entries for 0% and 100% 250*4882a593Smuzhiyun */ 251*4882a593Smuzhiyun /* requested display */ 252*4882a593Smuzhiyun # define ATIF_QBTC_REQUEST_LCD1 0 253*4882a593Smuzhiyun # define ATIF_QBTC_REQUEST_CRT1 1 254*4882a593Smuzhiyun # define ATIF_QBTC_REQUEST_DFP1 3 255*4882a593Smuzhiyun # define ATIF_QBTC_REQUEST_CRT2 4 256*4882a593Smuzhiyun # define ATIF_QBTC_REQUEST_LCD2 5 257*4882a593Smuzhiyun # define ATIF_QBTC_REQUEST_DFP2 7 258*4882a593Smuzhiyun # define ATIF_QBTC_REQUEST_DFP3 9 259*4882a593Smuzhiyun # define ATIF_QBTC_REQUEST_DFP4 10 260*4882a593Smuzhiyun # define ATIF_QBTC_REQUEST_DFP5 11 261*4882a593Smuzhiyun # define ATIF_QBTC_REQUEST_DFP6 12 262*4882a593Smuzhiyun /* error code */ 263*4882a593Smuzhiyun # define ATIF_QBTC_ERROR_CODE_SUCCESS 0 264*4882a593Smuzhiyun # define ATIF_QBTC_ERROR_CODE_FAILURE 1 265*4882a593Smuzhiyun # define ATIF_QBTC_ERROR_CODE_DEVICE_NOT_SUPPORTED 2 266*4882a593Smuzhiyun #define ATIF_FUNCTION_READY_TO_UNDOCK_NOTIFICATION 0x11 267*4882a593Smuzhiyun /* ARG0: ATIF_FUNCTION_READY_TO_UNDOCK_NOTIFICATION 268*4882a593Smuzhiyun * ARG1: none 269*4882a593Smuzhiyun * OUTPUT: none 270*4882a593Smuzhiyun */ 271*4882a593Smuzhiyun #define ATIF_FUNCTION_GET_EXTERNAL_GPU_INFORMATION 0x15 272*4882a593Smuzhiyun /* ARG0: ATIF_FUNCTION_GET_EXTERNAL_GPU_INFORMATION 273*4882a593Smuzhiyun * ARG1: none 274*4882a593Smuzhiyun * OUTPUT: 275*4882a593Smuzhiyun * WORD - number of reported external gfx devices 276*4882a593Smuzhiyun * WORD - device structure size in bytes (excludes device size field) 277*4882a593Smuzhiyun * WORD - flags \ 278*4882a593Smuzhiyun * WORD - bus number / repeated structure 279*4882a593Smuzhiyun */ 280*4882a593Smuzhiyun /* flags */ 281*4882a593Smuzhiyun # define ATIF_EXTERNAL_GRAPHICS_PORT (1 << 0) 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun /* ATPX */ 284*4882a593Smuzhiyun #define ATPX_FUNCTION_VERIFY_INTERFACE 0x0 285*4882a593Smuzhiyun /* ARG0: ATPX_FUNCTION_VERIFY_INTERFACE 286*4882a593Smuzhiyun * ARG1: none 287*4882a593Smuzhiyun * OUTPUT: 288*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 289*4882a593Smuzhiyun * WORD - version 290*4882a593Smuzhiyun * DWORD - supported functions bit vector 291*4882a593Smuzhiyun */ 292*4882a593Smuzhiyun /* supported functions vector */ 293*4882a593Smuzhiyun # define ATPX_GET_PX_PARAMETERS_SUPPORTED (1 << 0) 294*4882a593Smuzhiyun # define ATPX_POWER_CONTROL_SUPPORTED (1 << 1) 295*4882a593Smuzhiyun # define ATPX_DISPLAY_MUX_CONTROL_SUPPORTED (1 << 2) 296*4882a593Smuzhiyun # define ATPX_I2C_MUX_CONTROL_SUPPORTED (1 << 3) 297*4882a593Smuzhiyun # define ATPX_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION_SUPPORTED (1 << 4) 298*4882a593Smuzhiyun # define ATPX_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION_SUPPORTED (1 << 5) 299*4882a593Smuzhiyun # define ATPX_GET_DISPLAY_CONNECTORS_MAPPING_SUPPORTED (1 << 7) 300*4882a593Smuzhiyun # define ATPX_GET_DISPLAY_DETECTION_PORTS_SUPPORTED (1 << 8) 301*4882a593Smuzhiyun #define ATPX_FUNCTION_GET_PX_PARAMETERS 0x1 302*4882a593Smuzhiyun /* ARG0: ATPX_FUNCTION_GET_PX_PARAMETERS 303*4882a593Smuzhiyun * ARG1: none 304*4882a593Smuzhiyun * OUTPUT: 305*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 306*4882a593Smuzhiyun * DWORD - valid flags mask 307*4882a593Smuzhiyun * DWORD - flags 308*4882a593Smuzhiyun */ 309*4882a593Smuzhiyun /* flags */ 310*4882a593Smuzhiyun # define ATPX_LVDS_I2C_AVAILABLE_TO_BOTH_GPUS (1 << 0) 311*4882a593Smuzhiyun # define ATPX_CRT1_I2C_AVAILABLE_TO_BOTH_GPUS (1 << 1) 312*4882a593Smuzhiyun # define ATPX_DVI1_I2C_AVAILABLE_TO_BOTH_GPUS (1 << 2) 313*4882a593Smuzhiyun # define ATPX_CRT1_RGB_SIGNAL_MUXED (1 << 3) 314*4882a593Smuzhiyun # define ATPX_TV_SIGNAL_MUXED (1 << 4) 315*4882a593Smuzhiyun # define ATPX_DFP_SIGNAL_MUXED (1 << 5) 316*4882a593Smuzhiyun # define ATPX_SEPARATE_MUX_FOR_I2C (1 << 6) 317*4882a593Smuzhiyun # define ATPX_DYNAMIC_PX_SUPPORTED (1 << 7) 318*4882a593Smuzhiyun # define ATPX_ACF_NOT_SUPPORTED (1 << 8) 319*4882a593Smuzhiyun # define ATPX_FIXED_NOT_SUPPORTED (1 << 9) 320*4882a593Smuzhiyun # define ATPX_DYNAMIC_DGPU_POWER_OFF_SUPPORTED (1 << 10) 321*4882a593Smuzhiyun # define ATPX_DGPU_REQ_POWER_FOR_DISPLAYS (1 << 11) 322*4882a593Smuzhiyun # define ATPX_DGPU_CAN_DRIVE_DISPLAYS (1 << 12) 323*4882a593Smuzhiyun # define ATPX_MS_HYBRID_GFX_SUPPORTED (1 << 14) 324*4882a593Smuzhiyun #define ATPX_FUNCTION_POWER_CONTROL 0x2 325*4882a593Smuzhiyun /* ARG0: ATPX_FUNCTION_POWER_CONTROL 326*4882a593Smuzhiyun * ARG1: 327*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 328*4882a593Smuzhiyun * BYTE - dGPU power state (0: power off, 1: power on) 329*4882a593Smuzhiyun * OUTPUT: none 330*4882a593Smuzhiyun */ 331*4882a593Smuzhiyun #define ATPX_FUNCTION_DISPLAY_MUX_CONTROL 0x3 332*4882a593Smuzhiyun /* ARG0: ATPX_FUNCTION_DISPLAY_MUX_CONTROL 333*4882a593Smuzhiyun * ARG1: 334*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 335*4882a593Smuzhiyun * WORD - display mux control (0: iGPU, 1: dGPU) 336*4882a593Smuzhiyun * OUTPUT: none 337*4882a593Smuzhiyun */ 338*4882a593Smuzhiyun # define ATPX_INTEGRATED_GPU 0 339*4882a593Smuzhiyun # define ATPX_DISCRETE_GPU 1 340*4882a593Smuzhiyun #define ATPX_FUNCTION_I2C_MUX_CONTROL 0x4 341*4882a593Smuzhiyun /* ARG0: ATPX_FUNCTION_I2C_MUX_CONTROL 342*4882a593Smuzhiyun * ARG1: 343*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 344*4882a593Smuzhiyun * WORD - i2c/aux/hpd mux control (0: iGPU, 1: dGPU) 345*4882a593Smuzhiyun * OUTPUT: none 346*4882a593Smuzhiyun */ 347*4882a593Smuzhiyun #define ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION 0x5 348*4882a593Smuzhiyun /* ARG0: ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION 349*4882a593Smuzhiyun * ARG1: 350*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 351*4882a593Smuzhiyun * WORD - target gpu (0: iGPU, 1: dGPU) 352*4882a593Smuzhiyun * OUTPUT: none 353*4882a593Smuzhiyun */ 354*4882a593Smuzhiyun #define ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION 0x6 355*4882a593Smuzhiyun /* ARG0: ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION 356*4882a593Smuzhiyun * ARG1: 357*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 358*4882a593Smuzhiyun * WORD - target gpu (0: iGPU, 1: dGPU) 359*4882a593Smuzhiyun * OUTPUT: none 360*4882a593Smuzhiyun */ 361*4882a593Smuzhiyun #define ATPX_FUNCTION_GET_DISPLAY_CONNECTORS_MAPPING 0x8 362*4882a593Smuzhiyun /* ARG0: ATPX_FUNCTION_GET_DISPLAY_CONNECTORS_MAPPING 363*4882a593Smuzhiyun * ARG1: none 364*4882a593Smuzhiyun * OUTPUT: 365*4882a593Smuzhiyun * WORD - number of display connectors 366*4882a593Smuzhiyun * WORD - connector structure size in bytes (excludes connector size field) 367*4882a593Smuzhiyun * BYTE - flags \ 368*4882a593Smuzhiyun * BYTE - ATIF display vector bit position } repeated 369*4882a593Smuzhiyun * BYTE - adapter id (0: iGPU, 1-n: dGPU ordered by pcie bus number) } structure 370*4882a593Smuzhiyun * WORD - connector ACPI id / 371*4882a593Smuzhiyun */ 372*4882a593Smuzhiyun /* flags */ 373*4882a593Smuzhiyun # define ATPX_DISPLAY_OUTPUT_SUPPORTED_BY_ADAPTER_ID_DEVICE (1 << 0) 374*4882a593Smuzhiyun # define ATPX_DISPLAY_HPD_SUPPORTED_BY_ADAPTER_ID_DEVICE (1 << 1) 375*4882a593Smuzhiyun # define ATPX_DISPLAY_I2C_SUPPORTED_BY_ADAPTER_ID_DEVICE (1 << 2) 376*4882a593Smuzhiyun #define ATPX_FUNCTION_GET_DISPLAY_DETECTION_PORTS 0x9 377*4882a593Smuzhiyun /* ARG0: ATPX_FUNCTION_GET_DISPLAY_DETECTION_PORTS 378*4882a593Smuzhiyun * ARG1: none 379*4882a593Smuzhiyun * OUTPUT: 380*4882a593Smuzhiyun * WORD - number of HPD/DDC ports 381*4882a593Smuzhiyun * WORD - port structure size in bytes (excludes port size field) 382*4882a593Smuzhiyun * BYTE - ATIF display vector bit position \ 383*4882a593Smuzhiyun * BYTE - hpd id } reapeated structure 384*4882a593Smuzhiyun * BYTE - ddc id / 385*4882a593Smuzhiyun * 386*4882a593Smuzhiyun * available on A+A systems only 387*4882a593Smuzhiyun */ 388*4882a593Smuzhiyun /* hpd id */ 389*4882a593Smuzhiyun # define ATPX_HPD_NONE 0 390*4882a593Smuzhiyun # define ATPX_HPD1 1 391*4882a593Smuzhiyun # define ATPX_HPD2 2 392*4882a593Smuzhiyun # define ATPX_HPD3 3 393*4882a593Smuzhiyun # define ATPX_HPD4 4 394*4882a593Smuzhiyun # define ATPX_HPD5 5 395*4882a593Smuzhiyun # define ATPX_HPD6 6 396*4882a593Smuzhiyun /* ddc id */ 397*4882a593Smuzhiyun # define ATPX_DDC_NONE 0 398*4882a593Smuzhiyun # define ATPX_DDC1 1 399*4882a593Smuzhiyun # define ATPX_DDC2 2 400*4882a593Smuzhiyun # define ATPX_DDC3 3 401*4882a593Smuzhiyun # define ATPX_DDC4 4 402*4882a593Smuzhiyun # define ATPX_DDC5 5 403*4882a593Smuzhiyun # define ATPX_DDC6 6 404*4882a593Smuzhiyun # define ATPX_DDC7 7 405*4882a593Smuzhiyun # define ATPX_DDC8 8 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun /* ATCS */ 408*4882a593Smuzhiyun #define ATCS_FUNCTION_VERIFY_INTERFACE 0x0 409*4882a593Smuzhiyun /* ARG0: ATCS_FUNCTION_VERIFY_INTERFACE 410*4882a593Smuzhiyun * ARG1: none 411*4882a593Smuzhiyun * OUTPUT: 412*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 413*4882a593Smuzhiyun * WORD - version 414*4882a593Smuzhiyun * DWORD - supported functions bit vector 415*4882a593Smuzhiyun */ 416*4882a593Smuzhiyun /* supported functions vector */ 417*4882a593Smuzhiyun # define ATCS_GET_EXTERNAL_STATE_SUPPORTED (1 << 0) 418*4882a593Smuzhiyun # define ATCS_PCIE_PERFORMANCE_REQUEST_SUPPORTED (1 << 1) 419*4882a593Smuzhiyun # define ATCS_PCIE_DEVICE_READY_NOTIFICATION_SUPPORTED (1 << 2) 420*4882a593Smuzhiyun # define ATCS_SET_PCIE_BUS_WIDTH_SUPPORTED (1 << 3) 421*4882a593Smuzhiyun #define ATCS_FUNCTION_GET_EXTERNAL_STATE 0x1 422*4882a593Smuzhiyun /* ARG0: ATCS_FUNCTION_GET_EXTERNAL_STATE 423*4882a593Smuzhiyun * ARG1: none 424*4882a593Smuzhiyun * OUTPUT: 425*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 426*4882a593Smuzhiyun * DWORD - valid flags mask 427*4882a593Smuzhiyun * DWORD - flags (0: undocked, 1: docked) 428*4882a593Smuzhiyun */ 429*4882a593Smuzhiyun /* flags */ 430*4882a593Smuzhiyun # define ATCS_DOCKED (1 << 0) 431*4882a593Smuzhiyun #define ATCS_FUNCTION_PCIE_PERFORMANCE_REQUEST 0x2 432*4882a593Smuzhiyun /* ARG0: ATCS_FUNCTION_PCIE_PERFORMANCE_REQUEST 433*4882a593Smuzhiyun * ARG1: 434*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 435*4882a593Smuzhiyun * WORD - client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) 436*4882a593Smuzhiyun * WORD - valid flags mask 437*4882a593Smuzhiyun * WORD - flags 438*4882a593Smuzhiyun * BYTE - request type 439*4882a593Smuzhiyun * BYTE - performance request 440*4882a593Smuzhiyun * OUTPUT: 441*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 442*4882a593Smuzhiyun * BYTE - return value 443*4882a593Smuzhiyun */ 444*4882a593Smuzhiyun /* flags */ 445*4882a593Smuzhiyun # define ATCS_ADVERTISE_CAPS (1 << 0) 446*4882a593Smuzhiyun # define ATCS_WAIT_FOR_COMPLETION (1 << 1) 447*4882a593Smuzhiyun /* request type */ 448*4882a593Smuzhiyun # define ATCS_PCIE_LINK_SPEED 1 449*4882a593Smuzhiyun /* performance request */ 450*4882a593Smuzhiyun # define ATCS_REMOVE 0 451*4882a593Smuzhiyun # define ATCS_FORCE_LOW_POWER 1 452*4882a593Smuzhiyun # define ATCS_PERF_LEVEL_1 2 /* PCIE Gen 1 */ 453*4882a593Smuzhiyun # define ATCS_PERF_LEVEL_2 3 /* PCIE Gen 2 */ 454*4882a593Smuzhiyun # define ATCS_PERF_LEVEL_3 4 /* PCIE Gen 3 */ 455*4882a593Smuzhiyun /* return value */ 456*4882a593Smuzhiyun # define ATCS_REQUEST_REFUSED 1 457*4882a593Smuzhiyun # define ATCS_REQUEST_COMPLETE 2 458*4882a593Smuzhiyun # define ATCS_REQUEST_IN_PROGRESS 3 459*4882a593Smuzhiyun #define ATCS_FUNCTION_PCIE_DEVICE_READY_NOTIFICATION 0x3 460*4882a593Smuzhiyun /* ARG0: ATCS_FUNCTION_PCIE_DEVICE_READY_NOTIFICATION 461*4882a593Smuzhiyun * ARG1: none 462*4882a593Smuzhiyun * OUTPUT: none 463*4882a593Smuzhiyun */ 464*4882a593Smuzhiyun #define ATCS_FUNCTION_SET_PCIE_BUS_WIDTH 0x4 465*4882a593Smuzhiyun /* ARG0: ATCS_FUNCTION_SET_PCIE_BUS_WIDTH 466*4882a593Smuzhiyun * ARG1: 467*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 468*4882a593Smuzhiyun * WORD - client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) 469*4882a593Smuzhiyun * BYTE - number of active lanes 470*4882a593Smuzhiyun * OUTPUT: 471*4882a593Smuzhiyun * WORD - structure size in bytes (includes size field) 472*4882a593Smuzhiyun * BYTE - number of active lanes 473*4882a593Smuzhiyun */ 474*4882a593Smuzhiyun 475*4882a593Smuzhiyun #endif 476