xref: /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2017 Advanced Micro Devices, Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Permission is hereby granted, free of charge, to any person obtaining a
5*4882a593Smuzhiyun  * copy of this software and associated documentation files (the "Software"),
6*4882a593Smuzhiyun  * to deal in the Software without restriction, including without limitation
7*4882a593Smuzhiyun  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*4882a593Smuzhiyun  * and/or sell copies of the Software, and to permit persons to whom the
9*4882a593Smuzhiyun  * Software is furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun  * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17*4882a593Smuzhiyun  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*4882a593Smuzhiyun  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*4882a593Smuzhiyun  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*4882a593Smuzhiyun  * OTHER DEALINGS IN THE SOFTWARE.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  */
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #if !defined(_AMDGPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ)
25*4882a593Smuzhiyun #define _AMDGPU_TRACE_H_
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include <linux/stringify.h>
28*4882a593Smuzhiyun #include <linux/types.h>
29*4882a593Smuzhiyun #include <linux/tracepoint.h>
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #undef TRACE_SYSTEM
32*4882a593Smuzhiyun #define TRACE_SYSTEM amdgpu
33*4882a593Smuzhiyun #define TRACE_INCLUDE_FILE amdgpu_trace
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define AMDGPU_JOB_GET_TIMELINE_NAME(job) \
36*4882a593Smuzhiyun 	 job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished)
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun TRACE_EVENT(amdgpu_device_rreg,
39*4882a593Smuzhiyun 	    TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
40*4882a593Smuzhiyun 	    TP_ARGS(did, reg, value),
41*4882a593Smuzhiyun 	    TP_STRUCT__entry(
42*4882a593Smuzhiyun 				__field(unsigned, did)
43*4882a593Smuzhiyun 				__field(uint32_t, reg)
44*4882a593Smuzhiyun 				__field(uint32_t, value)
45*4882a593Smuzhiyun 			    ),
46*4882a593Smuzhiyun 	    TP_fast_assign(
47*4882a593Smuzhiyun 			   __entry->did = did;
48*4882a593Smuzhiyun 			   __entry->reg = reg;
49*4882a593Smuzhiyun 			   __entry->value = value;
50*4882a593Smuzhiyun 			   ),
51*4882a593Smuzhiyun 	    TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
52*4882a593Smuzhiyun 		      (unsigned long)__entry->did,
53*4882a593Smuzhiyun 		      (unsigned long)__entry->reg,
54*4882a593Smuzhiyun 		      (unsigned long)__entry->value)
55*4882a593Smuzhiyun );
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun TRACE_EVENT(amdgpu_device_wreg,
58*4882a593Smuzhiyun 	    TP_PROTO(unsigned did, uint32_t reg, uint32_t value),
59*4882a593Smuzhiyun 	    TP_ARGS(did, reg, value),
60*4882a593Smuzhiyun 	    TP_STRUCT__entry(
61*4882a593Smuzhiyun 				__field(unsigned, did)
62*4882a593Smuzhiyun 				__field(uint32_t, reg)
63*4882a593Smuzhiyun 				__field(uint32_t, value)
64*4882a593Smuzhiyun 			    ),
65*4882a593Smuzhiyun 	    TP_fast_assign(
66*4882a593Smuzhiyun 			   __entry->did = did;
67*4882a593Smuzhiyun 			   __entry->reg = reg;
68*4882a593Smuzhiyun 			   __entry->value = value;
69*4882a593Smuzhiyun 			   ),
70*4882a593Smuzhiyun 	    TP_printk("0x%04lx, 0x%08lx, 0x%08lx",
71*4882a593Smuzhiyun 		      (unsigned long)__entry->did,
72*4882a593Smuzhiyun 		      (unsigned long)__entry->reg,
73*4882a593Smuzhiyun 		      (unsigned long)__entry->value)
74*4882a593Smuzhiyun );
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun TRACE_EVENT(amdgpu_iv,
77*4882a593Smuzhiyun 	    TP_PROTO(unsigned ih, struct amdgpu_iv_entry *iv),
78*4882a593Smuzhiyun 	    TP_ARGS(ih, iv),
79*4882a593Smuzhiyun 	    TP_STRUCT__entry(
80*4882a593Smuzhiyun 			     __field(unsigned, ih)
81*4882a593Smuzhiyun 			     __field(unsigned, client_id)
82*4882a593Smuzhiyun 			     __field(unsigned, src_id)
83*4882a593Smuzhiyun 			     __field(unsigned, ring_id)
84*4882a593Smuzhiyun 			     __field(unsigned, vmid)
85*4882a593Smuzhiyun 			     __field(unsigned, vmid_src)
86*4882a593Smuzhiyun 			     __field(uint64_t, timestamp)
87*4882a593Smuzhiyun 			     __field(unsigned, timestamp_src)
88*4882a593Smuzhiyun 			     __field(unsigned, pasid)
89*4882a593Smuzhiyun 			     __array(unsigned, src_data, 4)
90*4882a593Smuzhiyun 			    ),
91*4882a593Smuzhiyun 	    TP_fast_assign(
92*4882a593Smuzhiyun 			   __entry->ih = ih;
93*4882a593Smuzhiyun 			   __entry->client_id = iv->client_id;
94*4882a593Smuzhiyun 			   __entry->src_id = iv->src_id;
95*4882a593Smuzhiyun 			   __entry->ring_id = iv->ring_id;
96*4882a593Smuzhiyun 			   __entry->vmid = iv->vmid;
97*4882a593Smuzhiyun 			   __entry->vmid_src = iv->vmid_src;
98*4882a593Smuzhiyun 			   __entry->timestamp = iv->timestamp;
99*4882a593Smuzhiyun 			   __entry->timestamp_src = iv->timestamp_src;
100*4882a593Smuzhiyun 			   __entry->pasid = iv->pasid;
101*4882a593Smuzhiyun 			   __entry->src_data[0] = iv->src_data[0];
102*4882a593Smuzhiyun 			   __entry->src_data[1] = iv->src_data[1];
103*4882a593Smuzhiyun 			   __entry->src_data[2] = iv->src_data[2];
104*4882a593Smuzhiyun 			   __entry->src_data[3] = iv->src_data[3];
105*4882a593Smuzhiyun 			   ),
106*4882a593Smuzhiyun 	    TP_printk("ih:%u client_id:%u src_id:%u ring:%u vmid:%u "
107*4882a593Smuzhiyun 		      "timestamp: %llu pasid:%u src_data: %08x %08x %08x %08x",
108*4882a593Smuzhiyun 		      __entry->ih, __entry->client_id, __entry->src_id,
109*4882a593Smuzhiyun 		      __entry->ring_id, __entry->vmid,
110*4882a593Smuzhiyun 		      __entry->timestamp, __entry->pasid,
111*4882a593Smuzhiyun 		      __entry->src_data[0], __entry->src_data[1],
112*4882a593Smuzhiyun 		      __entry->src_data[2], __entry->src_data[3])
113*4882a593Smuzhiyun );
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun TRACE_EVENT(amdgpu_bo_create,
117*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_bo *bo),
118*4882a593Smuzhiyun 	    TP_ARGS(bo),
119*4882a593Smuzhiyun 	    TP_STRUCT__entry(
120*4882a593Smuzhiyun 			     __field(struct amdgpu_bo *, bo)
121*4882a593Smuzhiyun 			     __field(u32, pages)
122*4882a593Smuzhiyun 			     __field(u32, type)
123*4882a593Smuzhiyun 			     __field(u32, prefer)
124*4882a593Smuzhiyun 			     __field(u32, allow)
125*4882a593Smuzhiyun 			     __field(u32, visible)
126*4882a593Smuzhiyun 			     ),
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	    TP_fast_assign(
129*4882a593Smuzhiyun 			   __entry->bo = bo;
130*4882a593Smuzhiyun 			   __entry->pages = bo->tbo.num_pages;
131*4882a593Smuzhiyun 			   __entry->type = bo->tbo.mem.mem_type;
132*4882a593Smuzhiyun 			   __entry->prefer = bo->preferred_domains;
133*4882a593Smuzhiyun 			   __entry->allow = bo->allowed_domains;
134*4882a593Smuzhiyun 			   __entry->visible = bo->flags;
135*4882a593Smuzhiyun 			   ),
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	    TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d",
138*4882a593Smuzhiyun 		       __entry->bo, __entry->pages, __entry->type,
139*4882a593Smuzhiyun 		       __entry->prefer, __entry->allow, __entry->visible)
140*4882a593Smuzhiyun );
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun TRACE_EVENT(amdgpu_cs,
143*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_cs_parser *p, int i),
144*4882a593Smuzhiyun 	    TP_ARGS(p, i),
145*4882a593Smuzhiyun 	    TP_STRUCT__entry(
146*4882a593Smuzhiyun 			     __field(struct amdgpu_bo_list *, bo_list)
147*4882a593Smuzhiyun 			     __field(u32, ring)
148*4882a593Smuzhiyun 			     __field(u32, dw)
149*4882a593Smuzhiyun 			     __field(u32, fences)
150*4882a593Smuzhiyun 			     ),
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	    TP_fast_assign(
153*4882a593Smuzhiyun 			   __entry->bo_list = p->bo_list;
154*4882a593Smuzhiyun 			   __entry->ring = to_amdgpu_ring(p->entity->rq->sched)->idx;
155*4882a593Smuzhiyun 			   __entry->dw = p->job->ibs[i].length_dw;
156*4882a593Smuzhiyun 			   __entry->fences = amdgpu_fence_count_emitted(
157*4882a593Smuzhiyun 				to_amdgpu_ring(p->entity->rq->sched));
158*4882a593Smuzhiyun 			   ),
159*4882a593Smuzhiyun 	    TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u",
160*4882a593Smuzhiyun 		      __entry->bo_list, __entry->ring, __entry->dw,
161*4882a593Smuzhiyun 		      __entry->fences)
162*4882a593Smuzhiyun );
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun TRACE_EVENT(amdgpu_cs_ioctl,
165*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_job *job),
166*4882a593Smuzhiyun 	    TP_ARGS(job),
167*4882a593Smuzhiyun 	    TP_STRUCT__entry(
168*4882a593Smuzhiyun 			     __field(uint64_t, sched_job_id)
169*4882a593Smuzhiyun 			     __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
170*4882a593Smuzhiyun 			     __field(unsigned int, context)
171*4882a593Smuzhiyun 			     __field(unsigned int, seqno)
172*4882a593Smuzhiyun 			     __field(struct dma_fence *, fence)
173*4882a593Smuzhiyun 			     __string(ring, to_amdgpu_ring(job->base.sched)->name)
174*4882a593Smuzhiyun 			     __field(u32, num_ibs)
175*4882a593Smuzhiyun 			     ),
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	    TP_fast_assign(
178*4882a593Smuzhiyun 			   __entry->sched_job_id = job->base.id;
179*4882a593Smuzhiyun 			   __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
180*4882a593Smuzhiyun 			   __entry->context = job->base.s_fence->finished.context;
181*4882a593Smuzhiyun 			   __entry->seqno = job->base.s_fence->finished.seqno;
182*4882a593Smuzhiyun 			   __assign_str(ring, to_amdgpu_ring(job->base.sched)->name)
183*4882a593Smuzhiyun 			   __entry->num_ibs = job->num_ibs;
184*4882a593Smuzhiyun 			   ),
185*4882a593Smuzhiyun 	    TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
186*4882a593Smuzhiyun 		      __entry->sched_job_id, __get_str(timeline), __entry->context,
187*4882a593Smuzhiyun 		      __entry->seqno, __get_str(ring), __entry->num_ibs)
188*4882a593Smuzhiyun );
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun TRACE_EVENT(amdgpu_sched_run_job,
191*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_job *job),
192*4882a593Smuzhiyun 	    TP_ARGS(job),
193*4882a593Smuzhiyun 	    TP_STRUCT__entry(
194*4882a593Smuzhiyun 			     __field(uint64_t, sched_job_id)
195*4882a593Smuzhiyun 			     __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
196*4882a593Smuzhiyun 			     __field(unsigned int, context)
197*4882a593Smuzhiyun 			     __field(unsigned int, seqno)
198*4882a593Smuzhiyun 			     __string(ring, to_amdgpu_ring(job->base.sched)->name)
199*4882a593Smuzhiyun 			     __field(u32, num_ibs)
200*4882a593Smuzhiyun 			     ),
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	    TP_fast_assign(
203*4882a593Smuzhiyun 			   __entry->sched_job_id = job->base.id;
204*4882a593Smuzhiyun 			   __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job))
205*4882a593Smuzhiyun 			   __entry->context = job->base.s_fence->finished.context;
206*4882a593Smuzhiyun 			   __entry->seqno = job->base.s_fence->finished.seqno;
207*4882a593Smuzhiyun 			   __assign_str(ring, to_amdgpu_ring(job->base.sched)->name)
208*4882a593Smuzhiyun 			   __entry->num_ibs = job->num_ibs;
209*4882a593Smuzhiyun 			   ),
210*4882a593Smuzhiyun 	    TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u",
211*4882a593Smuzhiyun 		      __entry->sched_job_id, __get_str(timeline), __entry->context,
212*4882a593Smuzhiyun 		      __entry->seqno, __get_str(ring), __entry->num_ibs)
213*4882a593Smuzhiyun );
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun TRACE_EVENT(amdgpu_vm_grab_id,
217*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
218*4882a593Smuzhiyun 		     struct amdgpu_job *job),
219*4882a593Smuzhiyun 	    TP_ARGS(vm, ring, job),
220*4882a593Smuzhiyun 	    TP_STRUCT__entry(
221*4882a593Smuzhiyun 			     __field(u32, pasid)
222*4882a593Smuzhiyun 			     __string(ring, ring->name)
223*4882a593Smuzhiyun 			     __field(u32, ring)
224*4882a593Smuzhiyun 			     __field(u32, vmid)
225*4882a593Smuzhiyun 			     __field(u32, vm_hub)
226*4882a593Smuzhiyun 			     __field(u64, pd_addr)
227*4882a593Smuzhiyun 			     __field(u32, needs_flush)
228*4882a593Smuzhiyun 			     ),
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	    TP_fast_assign(
231*4882a593Smuzhiyun 			   __entry->pasid = vm->pasid;
232*4882a593Smuzhiyun 			   __assign_str(ring, ring->name)
233*4882a593Smuzhiyun 			   __entry->vmid = job->vmid;
234*4882a593Smuzhiyun 			   __entry->vm_hub = ring->funcs->vmhub,
235*4882a593Smuzhiyun 			   __entry->pd_addr = job->vm_pd_addr;
236*4882a593Smuzhiyun 			   __entry->needs_flush = job->vm_needs_flush;
237*4882a593Smuzhiyun 			   ),
238*4882a593Smuzhiyun 	    TP_printk("pasid=%d, ring=%s, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u",
239*4882a593Smuzhiyun 		      __entry->pasid, __get_str(ring), __entry->vmid,
240*4882a593Smuzhiyun 		      __entry->vm_hub, __entry->pd_addr, __entry->needs_flush)
241*4882a593Smuzhiyun );
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun TRACE_EVENT(amdgpu_vm_bo_map,
244*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_bo_va *bo_va,
245*4882a593Smuzhiyun 		     struct amdgpu_bo_va_mapping *mapping),
246*4882a593Smuzhiyun 	    TP_ARGS(bo_va, mapping),
247*4882a593Smuzhiyun 	    TP_STRUCT__entry(
248*4882a593Smuzhiyun 			     __field(struct amdgpu_bo *, bo)
249*4882a593Smuzhiyun 			     __field(long, start)
250*4882a593Smuzhiyun 			     __field(long, last)
251*4882a593Smuzhiyun 			     __field(u64, offset)
252*4882a593Smuzhiyun 			     __field(u64, flags)
253*4882a593Smuzhiyun 			     ),
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	    TP_fast_assign(
256*4882a593Smuzhiyun 			   __entry->bo = bo_va ? bo_va->base.bo : NULL;
257*4882a593Smuzhiyun 			   __entry->start = mapping->start;
258*4882a593Smuzhiyun 			   __entry->last = mapping->last;
259*4882a593Smuzhiyun 			   __entry->offset = mapping->offset;
260*4882a593Smuzhiyun 			   __entry->flags = mapping->flags;
261*4882a593Smuzhiyun 			   ),
262*4882a593Smuzhiyun 	    TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
263*4882a593Smuzhiyun 		      __entry->bo, __entry->start, __entry->last,
264*4882a593Smuzhiyun 		      __entry->offset, __entry->flags)
265*4882a593Smuzhiyun );
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun TRACE_EVENT(amdgpu_vm_bo_unmap,
268*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_bo_va *bo_va,
269*4882a593Smuzhiyun 		     struct amdgpu_bo_va_mapping *mapping),
270*4882a593Smuzhiyun 	    TP_ARGS(bo_va, mapping),
271*4882a593Smuzhiyun 	    TP_STRUCT__entry(
272*4882a593Smuzhiyun 			     __field(struct amdgpu_bo *, bo)
273*4882a593Smuzhiyun 			     __field(long, start)
274*4882a593Smuzhiyun 			     __field(long, last)
275*4882a593Smuzhiyun 			     __field(u64, offset)
276*4882a593Smuzhiyun 			     __field(u64, flags)
277*4882a593Smuzhiyun 			     ),
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	    TP_fast_assign(
280*4882a593Smuzhiyun 			   __entry->bo = bo_va ? bo_va->base.bo : NULL;
281*4882a593Smuzhiyun 			   __entry->start = mapping->start;
282*4882a593Smuzhiyun 			   __entry->last = mapping->last;
283*4882a593Smuzhiyun 			   __entry->offset = mapping->offset;
284*4882a593Smuzhiyun 			   __entry->flags = mapping->flags;
285*4882a593Smuzhiyun 			   ),
286*4882a593Smuzhiyun 	    TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx",
287*4882a593Smuzhiyun 		      __entry->bo, __entry->start, __entry->last,
288*4882a593Smuzhiyun 		      __entry->offset, __entry->flags)
289*4882a593Smuzhiyun );
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun DECLARE_EVENT_CLASS(amdgpu_vm_mapping,
292*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
293*4882a593Smuzhiyun 	    TP_ARGS(mapping),
294*4882a593Smuzhiyun 	    TP_STRUCT__entry(
295*4882a593Smuzhiyun 			     __field(u64, soffset)
296*4882a593Smuzhiyun 			     __field(u64, eoffset)
297*4882a593Smuzhiyun 			     __field(u64, flags)
298*4882a593Smuzhiyun 			     ),
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	    TP_fast_assign(
301*4882a593Smuzhiyun 			   __entry->soffset = mapping->start;
302*4882a593Smuzhiyun 			   __entry->eoffset = mapping->last + 1;
303*4882a593Smuzhiyun 			   __entry->flags = mapping->flags;
304*4882a593Smuzhiyun 			   ),
305*4882a593Smuzhiyun 	    TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx",
306*4882a593Smuzhiyun 		      __entry->soffset, __entry->eoffset, __entry->flags)
307*4882a593Smuzhiyun );
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update,
310*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
311*4882a593Smuzhiyun 	    TP_ARGS(mapping)
312*4882a593Smuzhiyun );
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping,
315*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
316*4882a593Smuzhiyun 	    TP_ARGS(mapping)
317*4882a593Smuzhiyun );
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_cs,
320*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_bo_va_mapping *mapping),
321*4882a593Smuzhiyun 	    TP_ARGS(mapping)
322*4882a593Smuzhiyun );
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun TRACE_EVENT(amdgpu_vm_update_ptes,
325*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_vm_update_params *p,
326*4882a593Smuzhiyun 		     uint64_t start, uint64_t end,
327*4882a593Smuzhiyun 		     unsigned int nptes, uint64_t dst,
328*4882a593Smuzhiyun 		     uint64_t incr, uint64_t flags,
329*4882a593Smuzhiyun 		     pid_t pid, uint64_t vm_ctx),
330*4882a593Smuzhiyun 	TP_ARGS(p, start, end, nptes, dst, incr, flags, pid, vm_ctx),
331*4882a593Smuzhiyun 	TP_STRUCT__entry(
332*4882a593Smuzhiyun 			 __field(u64, start)
333*4882a593Smuzhiyun 			 __field(u64, end)
334*4882a593Smuzhiyun 			 __field(u64, flags)
335*4882a593Smuzhiyun 			 __field(unsigned int, nptes)
336*4882a593Smuzhiyun 			 __field(u64, incr)
337*4882a593Smuzhiyun 			 __field(pid_t, pid)
338*4882a593Smuzhiyun 			 __field(u64, vm_ctx)
339*4882a593Smuzhiyun 			 __dynamic_array(u64, dst, nptes)
340*4882a593Smuzhiyun 	),
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	TP_fast_assign(
343*4882a593Smuzhiyun 			unsigned int i;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 			__entry->start = start;
346*4882a593Smuzhiyun 			__entry->end = end;
347*4882a593Smuzhiyun 			__entry->flags = flags;
348*4882a593Smuzhiyun 			__entry->incr = incr;
349*4882a593Smuzhiyun 			__entry->nptes = nptes;
350*4882a593Smuzhiyun 			__entry->pid = pid;
351*4882a593Smuzhiyun 			__entry->vm_ctx = vm_ctx;
352*4882a593Smuzhiyun 			for (i = 0; i < nptes; ++i) {
353*4882a593Smuzhiyun 				u64 addr = p->pages_addr ? amdgpu_vm_map_gart(
354*4882a593Smuzhiyun 					p->pages_addr, dst) : dst;
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 				((u64 *)__get_dynamic_array(dst))[i] = addr;
357*4882a593Smuzhiyun 				dst += incr;
358*4882a593Smuzhiyun 			}
359*4882a593Smuzhiyun 	),
360*4882a593Smuzhiyun 	TP_printk("pid:%u vm_ctx:0x%llx start:0x%010llx end:0x%010llx,"
361*4882a593Smuzhiyun 		  " flags:0x%llx, incr:%llu, dst:\n%s", __entry->pid,
362*4882a593Smuzhiyun 		  __entry->vm_ctx, __entry->start, __entry->end,
363*4882a593Smuzhiyun 		  __entry->flags, __entry->incr,  __print_array(
364*4882a593Smuzhiyun 		  __get_dynamic_array(dst), __entry->nptes, 8))
365*4882a593Smuzhiyun );
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun TRACE_EVENT(amdgpu_vm_set_ptes,
368*4882a593Smuzhiyun 	    TP_PROTO(uint64_t pe, uint64_t addr, unsigned count,
369*4882a593Smuzhiyun 		     uint32_t incr, uint64_t flags, bool direct),
370*4882a593Smuzhiyun 	    TP_ARGS(pe, addr, count, incr, flags, direct),
371*4882a593Smuzhiyun 	    TP_STRUCT__entry(
372*4882a593Smuzhiyun 			     __field(u64, pe)
373*4882a593Smuzhiyun 			     __field(u64, addr)
374*4882a593Smuzhiyun 			     __field(u32, count)
375*4882a593Smuzhiyun 			     __field(u32, incr)
376*4882a593Smuzhiyun 			     __field(u64, flags)
377*4882a593Smuzhiyun 			     __field(bool, direct)
378*4882a593Smuzhiyun 			     ),
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	    TP_fast_assign(
381*4882a593Smuzhiyun 			   __entry->pe = pe;
382*4882a593Smuzhiyun 			   __entry->addr = addr;
383*4882a593Smuzhiyun 			   __entry->count = count;
384*4882a593Smuzhiyun 			   __entry->incr = incr;
385*4882a593Smuzhiyun 			   __entry->flags = flags;
386*4882a593Smuzhiyun 			   __entry->direct = direct;
387*4882a593Smuzhiyun 			   ),
388*4882a593Smuzhiyun 	    TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u, "
389*4882a593Smuzhiyun 		      "direct=%d", __entry->pe, __entry->addr, __entry->incr,
390*4882a593Smuzhiyun 		      __entry->flags, __entry->count, __entry->direct)
391*4882a593Smuzhiyun );
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun TRACE_EVENT(amdgpu_vm_copy_ptes,
394*4882a593Smuzhiyun 	    TP_PROTO(uint64_t pe, uint64_t src, unsigned count, bool direct),
395*4882a593Smuzhiyun 	    TP_ARGS(pe, src, count, direct),
396*4882a593Smuzhiyun 	    TP_STRUCT__entry(
397*4882a593Smuzhiyun 			     __field(u64, pe)
398*4882a593Smuzhiyun 			     __field(u64, src)
399*4882a593Smuzhiyun 			     __field(u32, count)
400*4882a593Smuzhiyun 			     __field(bool, direct)
401*4882a593Smuzhiyun 			     ),
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	    TP_fast_assign(
404*4882a593Smuzhiyun 			   __entry->pe = pe;
405*4882a593Smuzhiyun 			   __entry->src = src;
406*4882a593Smuzhiyun 			   __entry->count = count;
407*4882a593Smuzhiyun 			   __entry->direct = direct;
408*4882a593Smuzhiyun 			   ),
409*4882a593Smuzhiyun 	    TP_printk("pe=%010Lx, src=%010Lx, count=%u, direct=%d",
410*4882a593Smuzhiyun 		      __entry->pe, __entry->src, __entry->count,
411*4882a593Smuzhiyun 		      __entry->direct)
412*4882a593Smuzhiyun );
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun TRACE_EVENT(amdgpu_vm_flush,
415*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_ring *ring, unsigned vmid,
416*4882a593Smuzhiyun 		     uint64_t pd_addr),
417*4882a593Smuzhiyun 	    TP_ARGS(ring, vmid, pd_addr),
418*4882a593Smuzhiyun 	    TP_STRUCT__entry(
419*4882a593Smuzhiyun 			     __string(ring, ring->name)
420*4882a593Smuzhiyun 			     __field(u32, vmid)
421*4882a593Smuzhiyun 			     __field(u32, vm_hub)
422*4882a593Smuzhiyun 			     __field(u64, pd_addr)
423*4882a593Smuzhiyun 			     ),
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	    TP_fast_assign(
426*4882a593Smuzhiyun 			   __assign_str(ring, ring->name)
427*4882a593Smuzhiyun 			   __entry->vmid = vmid;
428*4882a593Smuzhiyun 			   __entry->vm_hub = ring->funcs->vmhub;
429*4882a593Smuzhiyun 			   __entry->pd_addr = pd_addr;
430*4882a593Smuzhiyun 			   ),
431*4882a593Smuzhiyun 	    TP_printk("ring=%s, id=%u, hub=%u, pd_addr=%010Lx",
432*4882a593Smuzhiyun 		      __get_str(ring), __entry->vmid,
433*4882a593Smuzhiyun 		      __entry->vm_hub,__entry->pd_addr)
434*4882a593Smuzhiyun );
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun DECLARE_EVENT_CLASS(amdgpu_pasid,
437*4882a593Smuzhiyun 	    TP_PROTO(unsigned pasid),
438*4882a593Smuzhiyun 	    TP_ARGS(pasid),
439*4882a593Smuzhiyun 	    TP_STRUCT__entry(
440*4882a593Smuzhiyun 			     __field(unsigned, pasid)
441*4882a593Smuzhiyun 			     ),
442*4882a593Smuzhiyun 	    TP_fast_assign(
443*4882a593Smuzhiyun 			   __entry->pasid = pasid;
444*4882a593Smuzhiyun 			   ),
445*4882a593Smuzhiyun 	    TP_printk("pasid=%u", __entry->pasid)
446*4882a593Smuzhiyun );
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_allocated,
449*4882a593Smuzhiyun 	    TP_PROTO(unsigned pasid),
450*4882a593Smuzhiyun 	    TP_ARGS(pasid)
451*4882a593Smuzhiyun );
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun DEFINE_EVENT(amdgpu_pasid, amdgpu_pasid_freed,
454*4882a593Smuzhiyun 	    TP_PROTO(unsigned pasid),
455*4882a593Smuzhiyun 	    TP_ARGS(pasid)
456*4882a593Smuzhiyun );
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun TRACE_EVENT(amdgpu_bo_list_set,
459*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo),
460*4882a593Smuzhiyun 	    TP_ARGS(list, bo),
461*4882a593Smuzhiyun 	    TP_STRUCT__entry(
462*4882a593Smuzhiyun 			     __field(struct amdgpu_bo_list *, list)
463*4882a593Smuzhiyun 			     __field(struct amdgpu_bo *, bo)
464*4882a593Smuzhiyun 			     __field(u64, bo_size)
465*4882a593Smuzhiyun 			     ),
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	    TP_fast_assign(
468*4882a593Smuzhiyun 			   __entry->list = list;
469*4882a593Smuzhiyun 			   __entry->bo = bo;
470*4882a593Smuzhiyun 			   __entry->bo_size = amdgpu_bo_size(bo);
471*4882a593Smuzhiyun 			   ),
472*4882a593Smuzhiyun 	    TP_printk("list=%p, bo=%p, bo_size=%Ld",
473*4882a593Smuzhiyun 		      __entry->list,
474*4882a593Smuzhiyun 		      __entry->bo,
475*4882a593Smuzhiyun 		      __entry->bo_size)
476*4882a593Smuzhiyun );
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun TRACE_EVENT(amdgpu_cs_bo_status,
479*4882a593Smuzhiyun 	    TP_PROTO(uint64_t total_bo, uint64_t total_size),
480*4882a593Smuzhiyun 	    TP_ARGS(total_bo, total_size),
481*4882a593Smuzhiyun 	    TP_STRUCT__entry(
482*4882a593Smuzhiyun 			__field(u64, total_bo)
483*4882a593Smuzhiyun 			__field(u64, total_size)
484*4882a593Smuzhiyun 			),
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	    TP_fast_assign(
487*4882a593Smuzhiyun 			__entry->total_bo = total_bo;
488*4882a593Smuzhiyun 			__entry->total_size = total_size;
489*4882a593Smuzhiyun 			),
490*4882a593Smuzhiyun 	    TP_printk("total_bo_size=%Ld, total_bo_count=%Ld",
491*4882a593Smuzhiyun 			__entry->total_bo, __entry->total_size)
492*4882a593Smuzhiyun );
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun TRACE_EVENT(amdgpu_bo_move,
495*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_bo* bo, uint32_t new_placement, uint32_t old_placement),
496*4882a593Smuzhiyun 	    TP_ARGS(bo, new_placement, old_placement),
497*4882a593Smuzhiyun 	    TP_STRUCT__entry(
498*4882a593Smuzhiyun 			__field(struct amdgpu_bo *, bo)
499*4882a593Smuzhiyun 			__field(u64, bo_size)
500*4882a593Smuzhiyun 			__field(u32, new_placement)
501*4882a593Smuzhiyun 			__field(u32, old_placement)
502*4882a593Smuzhiyun 			),
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	    TP_fast_assign(
505*4882a593Smuzhiyun 			__entry->bo      = bo;
506*4882a593Smuzhiyun 			__entry->bo_size = amdgpu_bo_size(bo);
507*4882a593Smuzhiyun 			__entry->new_placement = new_placement;
508*4882a593Smuzhiyun 			__entry->old_placement = old_placement;
509*4882a593Smuzhiyun 			),
510*4882a593Smuzhiyun 	    TP_printk("bo=%p, from=%d, to=%d, size=%Ld",
511*4882a593Smuzhiyun 			__entry->bo, __entry->old_placement,
512*4882a593Smuzhiyun 			__entry->new_placement, __entry->bo_size)
513*4882a593Smuzhiyun );
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun TRACE_EVENT(amdgpu_ib_pipe_sync,
516*4882a593Smuzhiyun 	    TP_PROTO(struct amdgpu_job *sched_job, struct dma_fence *fence),
517*4882a593Smuzhiyun 	    TP_ARGS(sched_job, fence),
518*4882a593Smuzhiyun 	    TP_STRUCT__entry(
519*4882a593Smuzhiyun 			     __string(ring, sched_job->base.sched->name)
520*4882a593Smuzhiyun 			     __field(uint64_t, id)
521*4882a593Smuzhiyun 			     __field(struct dma_fence *, fence)
522*4882a593Smuzhiyun 			     __field(uint64_t, ctx)
523*4882a593Smuzhiyun 			     __field(unsigned, seqno)
524*4882a593Smuzhiyun 			     ),
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	    TP_fast_assign(
527*4882a593Smuzhiyun 			   __assign_str(ring, sched_job->base.sched->name)
528*4882a593Smuzhiyun 			   __entry->id = sched_job->base.id;
529*4882a593Smuzhiyun 			   __entry->fence = fence;
530*4882a593Smuzhiyun 			   __entry->ctx = fence->context;
531*4882a593Smuzhiyun 			   __entry->seqno = fence->seqno;
532*4882a593Smuzhiyun 			   ),
533*4882a593Smuzhiyun 	    TP_printk("job ring=%s, id=%llu, need pipe sync to fence=%p, context=%llu, seq=%u",
534*4882a593Smuzhiyun 		      __get_str(ring), __entry->id,
535*4882a593Smuzhiyun 		      __entry->fence, __entry->ctx,
536*4882a593Smuzhiyun 		      __entry->seqno)
537*4882a593Smuzhiyun );
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun #undef AMDGPU_JOB_GET_TIMELINE_NAME
540*4882a593Smuzhiyun #endif
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun /* This part must be outside protection */
543*4882a593Smuzhiyun #undef TRACE_INCLUDE_PATH
544*4882a593Smuzhiyun #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/amd/amdgpu
545*4882a593Smuzhiyun #include <trace/define_trace.h>
546