1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * (C) COPYRIGHT 2012-2017 ARM Limited. All rights reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This program is free software and is provided to you under the terms of the
6*4882a593Smuzhiyun * GNU General Public License version 2 as published by the Free Software
7*4882a593Smuzhiyun * Foundation, and any use by you of this program is subject to the terms
8*4882a593Smuzhiyun * of such GNU licence.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * A copy of the licence is included with the program, and can also be obtained
11*4882a593Smuzhiyun * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
12*4882a593Smuzhiyun * Boston, MA 02110-1301, USA.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun /*
21*4882a593Smuzhiyun * Run-time work-arounds helpers
22*4882a593Smuzhiyun */
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include <mali_base_hwconfig_features.h>
25*4882a593Smuzhiyun #include <mali_base_hwconfig_issues.h>
26*4882a593Smuzhiyun #include <mali_midg_regmap.h>
27*4882a593Smuzhiyun #include "mali_kbase.h"
28*4882a593Smuzhiyun #include "mali_kbase_hw.h"
29*4882a593Smuzhiyun
kbase_hw_set_features_mask(struct kbase_device * kbdev)30*4882a593Smuzhiyun void kbase_hw_set_features_mask(struct kbase_device *kbdev)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun const enum base_hw_feature *features;
33*4882a593Smuzhiyun u32 gpu_id;
34*4882a593Smuzhiyun u32 product_id;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun gpu_id = kbdev->gpu_props.props.raw_props.gpu_id;
37*4882a593Smuzhiyun product_id = gpu_id & GPU_ID_VERSION_PRODUCT_ID;
38*4882a593Smuzhiyun product_id >>= GPU_ID_VERSION_PRODUCT_ID_SHIFT;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun if (GPU_ID_IS_NEW_FORMAT(product_id)) {
41*4882a593Smuzhiyun switch (gpu_id & GPU_ID2_PRODUCT_MODEL) {
42*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TMIX:
43*4882a593Smuzhiyun features = base_hw_features_tMIx;
44*4882a593Smuzhiyun break;
45*4882a593Smuzhiyun case GPU_ID2_PRODUCT_THEX:
46*4882a593Smuzhiyun features = base_hw_features_tHEx;
47*4882a593Smuzhiyun break;
48*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TSIX:
49*4882a593Smuzhiyun features = base_hw_features_tSIx;
50*4882a593Smuzhiyun break;
51*4882a593Smuzhiyun #ifdef MALI_INCLUDE_TKAX
52*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TKAX:
53*4882a593Smuzhiyun features = base_hw_features_tKAx;
54*4882a593Smuzhiyun break;
55*4882a593Smuzhiyun #endif /* MALI_INCLUDE_TKAX */
56*4882a593Smuzhiyun #ifdef MALI_INCLUDE_TTRX
57*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TTRX:
58*4882a593Smuzhiyun features = base_hw_features_tTRx;
59*4882a593Smuzhiyun break;
60*4882a593Smuzhiyun #endif /* MALI_INCLUDE_TTRX */
61*4882a593Smuzhiyun default:
62*4882a593Smuzhiyun features = base_hw_features_generic;
63*4882a593Smuzhiyun break;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun } else {
66*4882a593Smuzhiyun switch (product_id) {
67*4882a593Smuzhiyun case GPU_ID_PI_TFRX:
68*4882a593Smuzhiyun /* FALLTHROUGH */
69*4882a593Smuzhiyun case GPU_ID_PI_T86X:
70*4882a593Smuzhiyun features = base_hw_features_tFxx;
71*4882a593Smuzhiyun break;
72*4882a593Smuzhiyun case GPU_ID_PI_T83X:
73*4882a593Smuzhiyun features = base_hw_features_t83x;
74*4882a593Smuzhiyun break;
75*4882a593Smuzhiyun case GPU_ID_PI_T82X:
76*4882a593Smuzhiyun features = base_hw_features_t82x;
77*4882a593Smuzhiyun break;
78*4882a593Smuzhiyun case GPU_ID_PI_T76X:
79*4882a593Smuzhiyun features = base_hw_features_t76x;
80*4882a593Smuzhiyun break;
81*4882a593Smuzhiyun case GPU_ID_PI_T72X:
82*4882a593Smuzhiyun features = base_hw_features_t72x;
83*4882a593Smuzhiyun break;
84*4882a593Smuzhiyun case GPU_ID_PI_T62X:
85*4882a593Smuzhiyun features = base_hw_features_t62x;
86*4882a593Smuzhiyun break;
87*4882a593Smuzhiyun case GPU_ID_PI_T60X:
88*4882a593Smuzhiyun features = base_hw_features_t60x;
89*4882a593Smuzhiyun break;
90*4882a593Smuzhiyun default:
91*4882a593Smuzhiyun features = base_hw_features_generic;
92*4882a593Smuzhiyun break;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun for (; *features != BASE_HW_FEATURE_END; features++)
97*4882a593Smuzhiyun set_bit(*features, &kbdev->hw_features_mask[0]);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /**
101*4882a593Smuzhiyun * kbase_hw_get_issues_for_new_id - Get the hardware issues for a new GPU ID
102*4882a593Smuzhiyun * @kbdev: Device pointer
103*4882a593Smuzhiyun *
104*4882a593Smuzhiyun * Return: pointer to an array of hardware issues, terminated by
105*4882a593Smuzhiyun * BASE_HW_ISSUE_END.
106*4882a593Smuzhiyun *
107*4882a593Smuzhiyun * This function can only be used on new-format GPU IDs, i.e. those for which
108*4882a593Smuzhiyun * GPU_ID_IS_NEW_FORMAT evaluates as true. The GPU ID is read from the @kbdev.
109*4882a593Smuzhiyun *
110*4882a593Smuzhiyun * In debugging versions of the driver, unknown versions of a known GPU will
111*4882a593Smuzhiyun * be treated as the most recent known version not later than the actual
112*4882a593Smuzhiyun * version. In such circumstances, the GPU ID in @kbdev will also be replaced
113*4882a593Smuzhiyun * with the most recent known version.
114*4882a593Smuzhiyun *
115*4882a593Smuzhiyun * Note: The GPU configuration must have been read by kbase_gpuprops_get_props()
116*4882a593Smuzhiyun * before calling this function.
117*4882a593Smuzhiyun */
kbase_hw_get_issues_for_new_id(struct kbase_device * kbdev)118*4882a593Smuzhiyun static const enum base_hw_issue *kbase_hw_get_issues_for_new_id(
119*4882a593Smuzhiyun struct kbase_device *kbdev)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun const enum base_hw_issue *issues = NULL;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun struct base_hw_product {
124*4882a593Smuzhiyun u32 product_model;
125*4882a593Smuzhiyun struct {
126*4882a593Smuzhiyun u32 version;
127*4882a593Smuzhiyun const enum base_hw_issue *issues;
128*4882a593Smuzhiyun } map[7];
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun static const struct base_hw_product base_hw_products[] = {
132*4882a593Smuzhiyun {GPU_ID2_PRODUCT_TMIX,
133*4882a593Smuzhiyun {{GPU_ID2_VERSION_MAKE(0, 0, 1),
134*4882a593Smuzhiyun base_hw_issues_tMIx_r0p0_05dev0},
135*4882a593Smuzhiyun {GPU_ID2_VERSION_MAKE(0, 0, 2), base_hw_issues_tMIx_r0p0},
136*4882a593Smuzhiyun {U32_MAX /* sentinel value */, NULL} } },
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun {GPU_ID2_PRODUCT_THEX,
139*4882a593Smuzhiyun {{GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tHEx_r0p0},
140*4882a593Smuzhiyun {GPU_ID2_VERSION_MAKE(0, 0, 1), base_hw_issues_tHEx_r0p0},
141*4882a593Smuzhiyun {GPU_ID2_VERSION_MAKE(0, 1, 0), base_hw_issues_tHEx_r0p1},
142*4882a593Smuzhiyun {U32_MAX, NULL} } },
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun {GPU_ID2_PRODUCT_TSIX,
145*4882a593Smuzhiyun {{GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tSIx_r0p0},
146*4882a593Smuzhiyun {GPU_ID2_VERSION_MAKE(0, 0, 1), base_hw_issues_tSIx_r0p0},
147*4882a593Smuzhiyun {GPU_ID2_VERSION_MAKE(0, 1, 0), base_hw_issues_tSIx_r0p1},
148*4882a593Smuzhiyun {GPU_ID2_VERSION_MAKE(0, 1, 1), base_hw_issues_tSIx_r0p1},
149*4882a593Smuzhiyun {GPU_ID2_VERSION_MAKE(1, 0, 0), base_hw_issues_tSIx_r1p0},
150*4882a593Smuzhiyun {GPU_ID2_VERSION_MAKE(1, 0, 1), base_hw_issues_tSIx_r1p0},
151*4882a593Smuzhiyun {U32_MAX, NULL} } },
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun #ifdef MALI_INCLUDE_TKAX
155*4882a593Smuzhiyun {GPU_ID2_PRODUCT_TKAX,
156*4882a593Smuzhiyun {{GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tKAx_r0p0},
157*4882a593Smuzhiyun {U32_MAX, NULL} } },
158*4882a593Smuzhiyun #endif /* MALI_INCLUDE_TKAX */
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun #ifdef MALI_INCLUDE_TTRX
161*4882a593Smuzhiyun {GPU_ID2_PRODUCT_TTRX,
162*4882a593Smuzhiyun {{GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tTRx_r0p0},
163*4882a593Smuzhiyun {U32_MAX, NULL} } },
164*4882a593Smuzhiyun #endif /* MALI_INCLUDE_TTRX */
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun u32 gpu_id = kbdev->gpu_props.props.raw_props.gpu_id;
168*4882a593Smuzhiyun const u32 product_model = gpu_id & GPU_ID2_PRODUCT_MODEL;
169*4882a593Smuzhiyun const struct base_hw_product *product = NULL;
170*4882a593Smuzhiyun size_t p;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun /* Stop when we reach the end of the products array. */
173*4882a593Smuzhiyun for (p = 0; p < ARRAY_SIZE(base_hw_products); ++p) {
174*4882a593Smuzhiyun if (product_model == base_hw_products[p].product_model) {
175*4882a593Smuzhiyun product = &base_hw_products[p];
176*4882a593Smuzhiyun break;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun if (product != NULL) {
181*4882a593Smuzhiyun /* Found a matching product. */
182*4882a593Smuzhiyun const u32 version = gpu_id & GPU_ID2_VERSION;
183*4882a593Smuzhiyun u32 fallback_version = 0;
184*4882a593Smuzhiyun const enum base_hw_issue *fallback_issues = NULL;
185*4882a593Smuzhiyun size_t v;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /* Stop when we reach the end of the map. */
188*4882a593Smuzhiyun for (v = 0; product->map[v].version != U32_MAX; ++v) {
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun if (version == product->map[v].version) {
191*4882a593Smuzhiyun /* Exact match so stop. */
192*4882a593Smuzhiyun issues = product->map[v].issues;
193*4882a593Smuzhiyun break;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /* Check whether this is a candidate for most recent
197*4882a593Smuzhiyun known version not later than the actual
198*4882a593Smuzhiyun version. */
199*4882a593Smuzhiyun if ((version > product->map[v].version) &&
200*4882a593Smuzhiyun (product->map[v].version >= fallback_version)) {
201*4882a593Smuzhiyun fallback_version = product->map[v].version;
202*4882a593Smuzhiyun fallback_issues = product->map[v].issues;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun if ((issues == NULL) && (fallback_issues != NULL)) {
207*4882a593Smuzhiyun /* Fall back to the issue set of the most recent known
208*4882a593Smuzhiyun version not later than the actual version. */
209*4882a593Smuzhiyun issues = fallback_issues;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun dev_info(kbdev->dev,
212*4882a593Smuzhiyun "r%dp%d status %d is unknown; treating as r%dp%d status %d",
213*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_MAJOR) >>
214*4882a593Smuzhiyun GPU_ID2_VERSION_MAJOR_SHIFT,
215*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_MINOR) >>
216*4882a593Smuzhiyun GPU_ID2_VERSION_MINOR_SHIFT,
217*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_STATUS) >>
218*4882a593Smuzhiyun GPU_ID2_VERSION_STATUS_SHIFT,
219*4882a593Smuzhiyun (fallback_version & GPU_ID2_VERSION_MAJOR) >>
220*4882a593Smuzhiyun GPU_ID2_VERSION_MAJOR_SHIFT,
221*4882a593Smuzhiyun (fallback_version & GPU_ID2_VERSION_MINOR) >>
222*4882a593Smuzhiyun GPU_ID2_VERSION_MINOR_SHIFT,
223*4882a593Smuzhiyun (fallback_version & GPU_ID2_VERSION_STATUS) >>
224*4882a593Smuzhiyun GPU_ID2_VERSION_STATUS_SHIFT);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun gpu_id &= ~GPU_ID2_VERSION;
227*4882a593Smuzhiyun gpu_id |= fallback_version;
228*4882a593Smuzhiyun kbdev->gpu_props.props.raw_props.gpu_id = gpu_id;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun kbase_gpuprops_update_core_props_gpu_id(&kbdev->gpu_props.props);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun return issues;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
kbase_hw_set_issues_mask(struct kbase_device * kbdev)236*4882a593Smuzhiyun int kbase_hw_set_issues_mask(struct kbase_device *kbdev)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun const enum base_hw_issue *issues;
239*4882a593Smuzhiyun u32 gpu_id;
240*4882a593Smuzhiyun u32 product_id;
241*4882a593Smuzhiyun u32 impl_tech;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun gpu_id = kbdev->gpu_props.props.raw_props.gpu_id;
244*4882a593Smuzhiyun product_id = gpu_id & GPU_ID_VERSION_PRODUCT_ID;
245*4882a593Smuzhiyun product_id >>= GPU_ID_VERSION_PRODUCT_ID_SHIFT;
246*4882a593Smuzhiyun impl_tech = kbdev->gpu_props.props.thread_props.impl_tech;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun if (impl_tech != IMPLEMENTATION_MODEL) {
249*4882a593Smuzhiyun if (GPU_ID_IS_NEW_FORMAT(product_id)) {
250*4882a593Smuzhiyun issues = kbase_hw_get_issues_for_new_id(kbdev);
251*4882a593Smuzhiyun if (issues == NULL) {
252*4882a593Smuzhiyun dev_err(kbdev->dev,
253*4882a593Smuzhiyun "Unknown GPU ID %x", gpu_id);
254*4882a593Smuzhiyun return -EINVAL;
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun /* The GPU ID might have been replaced with the last
258*4882a593Smuzhiyun known version of the same GPU. */
259*4882a593Smuzhiyun gpu_id = kbdev->gpu_props.props.raw_props.gpu_id;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun } else {
262*4882a593Smuzhiyun switch (gpu_id) {
263*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T60X, 0, 0, GPU_ID_S_15DEV0):
264*4882a593Smuzhiyun issues = base_hw_issues_t60x_r0p0_15dev0;
265*4882a593Smuzhiyun break;
266*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T60X, 0, 0, GPU_ID_S_EAC):
267*4882a593Smuzhiyun issues = base_hw_issues_t60x_r0p0_eac;
268*4882a593Smuzhiyun break;
269*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T60X, 0, 1, 0):
270*4882a593Smuzhiyun issues = base_hw_issues_t60x_r0p1;
271*4882a593Smuzhiyun break;
272*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T62X, 0, 1, 0):
273*4882a593Smuzhiyun issues = base_hw_issues_t62x_r0p1;
274*4882a593Smuzhiyun break;
275*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T62X, 1, 0, 0):
276*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T62X, 1, 0, 1):
277*4882a593Smuzhiyun issues = base_hw_issues_t62x_r1p0;
278*4882a593Smuzhiyun break;
279*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T62X, 1, 1, 0):
280*4882a593Smuzhiyun issues = base_hw_issues_t62x_r1p1;
281*4882a593Smuzhiyun break;
282*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T76X, 0, 0, 1):
283*4882a593Smuzhiyun issues = base_hw_issues_t76x_r0p0;
284*4882a593Smuzhiyun break;
285*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T76X, 0, 1, 1):
286*4882a593Smuzhiyun issues = base_hw_issues_t76x_r0p1;
287*4882a593Smuzhiyun break;
288*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T76X, 0, 1, 9):
289*4882a593Smuzhiyun issues = base_hw_issues_t76x_r0p1_50rel0;
290*4882a593Smuzhiyun break;
291*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T76X, 0, 2, 1):
292*4882a593Smuzhiyun issues = base_hw_issues_t76x_r0p2;
293*4882a593Smuzhiyun break;
294*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T76X, 0, 3, 1):
295*4882a593Smuzhiyun issues = base_hw_issues_t76x_r0p3;
296*4882a593Smuzhiyun break;
297*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T76X, 1, 0, 0):
298*4882a593Smuzhiyun issues = base_hw_issues_t76x_r1p0;
299*4882a593Smuzhiyun break;
300*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T72X, 0, 0, 0):
301*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T72X, 0, 0, 1):
302*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T72X, 0, 0, 2):
303*4882a593Smuzhiyun issues = base_hw_issues_t72x_r0p0;
304*4882a593Smuzhiyun break;
305*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T72X, 1, 0, 0):
306*4882a593Smuzhiyun issues = base_hw_issues_t72x_r1p0;
307*4882a593Smuzhiyun break;
308*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T72X, 1, 1, 0):
309*4882a593Smuzhiyun issues = base_hw_issues_t72x_r1p1;
310*4882a593Smuzhiyun break;
311*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_TFRX, 0, 1, 2):
312*4882a593Smuzhiyun issues = base_hw_issues_tFRx_r0p1;
313*4882a593Smuzhiyun break;
314*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_TFRX, 0, 2, 0):
315*4882a593Smuzhiyun issues = base_hw_issues_tFRx_r0p2;
316*4882a593Smuzhiyun break;
317*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_TFRX, 1, 0, 0):
318*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_TFRX, 1, 0, 8):
319*4882a593Smuzhiyun issues = base_hw_issues_tFRx_r1p0;
320*4882a593Smuzhiyun break;
321*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_TFRX, 2, 0, 0):
322*4882a593Smuzhiyun issues = base_hw_issues_tFRx_r2p0;
323*4882a593Smuzhiyun break;
324*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T86X, 0, 2, 0):
325*4882a593Smuzhiyun issues = base_hw_issues_t86x_r0p2;
326*4882a593Smuzhiyun break;
327*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T86X, 1, 0, 0):
328*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T86X, 1, 0, 8):
329*4882a593Smuzhiyun issues = base_hw_issues_t86x_r1p0;
330*4882a593Smuzhiyun break;
331*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T86X, 2, 0, 0):
332*4882a593Smuzhiyun issues = base_hw_issues_t86x_r2p0;
333*4882a593Smuzhiyun break;
334*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T83X, 0, 1, 0):
335*4882a593Smuzhiyun issues = base_hw_issues_t83x_r0p1;
336*4882a593Smuzhiyun break;
337*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T83X, 1, 0, 0):
338*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T83X, 1, 0, 8):
339*4882a593Smuzhiyun issues = base_hw_issues_t83x_r1p0;
340*4882a593Smuzhiyun break;
341*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T82X, 0, 0, 0):
342*4882a593Smuzhiyun issues = base_hw_issues_t82x_r0p0;
343*4882a593Smuzhiyun break;
344*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T82X, 0, 1, 0):
345*4882a593Smuzhiyun issues = base_hw_issues_t82x_r0p1;
346*4882a593Smuzhiyun break;
347*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T82X, 1, 0, 0):
348*4882a593Smuzhiyun case GPU_ID_MAKE(GPU_ID_PI_T82X, 1, 0, 8):
349*4882a593Smuzhiyun issues = base_hw_issues_t82x_r1p0;
350*4882a593Smuzhiyun break;
351*4882a593Smuzhiyun default:
352*4882a593Smuzhiyun dev_err(kbdev->dev,
353*4882a593Smuzhiyun "Unknown GPU ID %x", gpu_id);
354*4882a593Smuzhiyun return -EINVAL;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun } else {
358*4882a593Smuzhiyun /* Software model */
359*4882a593Smuzhiyun if (GPU_ID_IS_NEW_FORMAT(product_id)) {
360*4882a593Smuzhiyun switch (gpu_id & GPU_ID2_PRODUCT_MODEL) {
361*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TMIX:
362*4882a593Smuzhiyun issues = base_hw_issues_model_tMIx;
363*4882a593Smuzhiyun break;
364*4882a593Smuzhiyun case GPU_ID2_PRODUCT_THEX:
365*4882a593Smuzhiyun issues = base_hw_issues_model_tHEx;
366*4882a593Smuzhiyun break;
367*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TSIX:
368*4882a593Smuzhiyun issues = base_hw_issues_model_tSIx;
369*4882a593Smuzhiyun break;
370*4882a593Smuzhiyun #ifdef MALI_INCLUDE_TKAX
371*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TKAX:
372*4882a593Smuzhiyun issues = base_hw_issues_model_tKAx;
373*4882a593Smuzhiyun break;
374*4882a593Smuzhiyun #endif /* MALI_INCLUDE_TKAX */
375*4882a593Smuzhiyun #ifdef MALI_INCLUDE_TTRX
376*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TTRX:
377*4882a593Smuzhiyun issues = base_hw_issues_model_tTRx;
378*4882a593Smuzhiyun break;
379*4882a593Smuzhiyun #endif /* MALI_INCLUDE_TTRX */
380*4882a593Smuzhiyun default:
381*4882a593Smuzhiyun dev_err(kbdev->dev,
382*4882a593Smuzhiyun "Unknown GPU ID %x", gpu_id);
383*4882a593Smuzhiyun return -EINVAL;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun } else {
386*4882a593Smuzhiyun switch (product_id) {
387*4882a593Smuzhiyun case GPU_ID_PI_T60X:
388*4882a593Smuzhiyun issues = base_hw_issues_model_t60x;
389*4882a593Smuzhiyun break;
390*4882a593Smuzhiyun case GPU_ID_PI_T62X:
391*4882a593Smuzhiyun issues = base_hw_issues_model_t62x;
392*4882a593Smuzhiyun break;
393*4882a593Smuzhiyun case GPU_ID_PI_T72X:
394*4882a593Smuzhiyun issues = base_hw_issues_model_t72x;
395*4882a593Smuzhiyun break;
396*4882a593Smuzhiyun case GPU_ID_PI_T76X:
397*4882a593Smuzhiyun issues = base_hw_issues_model_t76x;
398*4882a593Smuzhiyun break;
399*4882a593Smuzhiyun case GPU_ID_PI_TFRX:
400*4882a593Smuzhiyun issues = base_hw_issues_model_tFRx;
401*4882a593Smuzhiyun break;
402*4882a593Smuzhiyun case GPU_ID_PI_T86X:
403*4882a593Smuzhiyun issues = base_hw_issues_model_t86x;
404*4882a593Smuzhiyun break;
405*4882a593Smuzhiyun case GPU_ID_PI_T83X:
406*4882a593Smuzhiyun issues = base_hw_issues_model_t83x;
407*4882a593Smuzhiyun break;
408*4882a593Smuzhiyun case GPU_ID_PI_T82X:
409*4882a593Smuzhiyun issues = base_hw_issues_model_t82x;
410*4882a593Smuzhiyun break;
411*4882a593Smuzhiyun default:
412*4882a593Smuzhiyun dev_err(kbdev->dev, "Unknown GPU ID %x",
413*4882a593Smuzhiyun gpu_id);
414*4882a593Smuzhiyun return -EINVAL;
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun if (GPU_ID_IS_NEW_FORMAT(product_id)) {
420*4882a593Smuzhiyun dev_info(kbdev->dev,
421*4882a593Smuzhiyun "GPU identified as 0x%x arch %d.%d.%d r%dp%d status %d",
422*4882a593Smuzhiyun (gpu_id & GPU_ID2_PRODUCT_MAJOR) >>
423*4882a593Smuzhiyun GPU_ID2_PRODUCT_MAJOR_SHIFT,
424*4882a593Smuzhiyun (gpu_id & GPU_ID2_ARCH_MAJOR) >>
425*4882a593Smuzhiyun GPU_ID2_ARCH_MAJOR_SHIFT,
426*4882a593Smuzhiyun (gpu_id & GPU_ID2_ARCH_MINOR) >>
427*4882a593Smuzhiyun GPU_ID2_ARCH_MINOR_SHIFT,
428*4882a593Smuzhiyun (gpu_id & GPU_ID2_ARCH_REV) >>
429*4882a593Smuzhiyun GPU_ID2_ARCH_REV_SHIFT,
430*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_MAJOR) >>
431*4882a593Smuzhiyun GPU_ID2_VERSION_MAJOR_SHIFT,
432*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_MINOR) >>
433*4882a593Smuzhiyun GPU_ID2_VERSION_MINOR_SHIFT,
434*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_STATUS) >>
435*4882a593Smuzhiyun GPU_ID2_VERSION_STATUS_SHIFT);
436*4882a593Smuzhiyun } else {
437*4882a593Smuzhiyun dev_info(kbdev->dev,
438*4882a593Smuzhiyun "GPU identified as 0x%04x r%dp%d status %d",
439*4882a593Smuzhiyun (gpu_id & GPU_ID_VERSION_PRODUCT_ID) >>
440*4882a593Smuzhiyun GPU_ID_VERSION_PRODUCT_ID_SHIFT,
441*4882a593Smuzhiyun (gpu_id & GPU_ID_VERSION_MAJOR) >>
442*4882a593Smuzhiyun GPU_ID_VERSION_MAJOR_SHIFT,
443*4882a593Smuzhiyun (gpu_id & GPU_ID_VERSION_MINOR) >>
444*4882a593Smuzhiyun GPU_ID_VERSION_MINOR_SHIFT,
445*4882a593Smuzhiyun (gpu_id & GPU_ID_VERSION_STATUS) >>
446*4882a593Smuzhiyun GPU_ID_VERSION_STATUS_SHIFT);
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun for (; *issues != BASE_HW_ISSUE_END; issues++)
450*4882a593Smuzhiyun set_bit(*issues, &kbdev->hw_issues_mask[0]);
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun return 0;
453*4882a593Smuzhiyun }
454