1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (C) COPYRIGHT 2012-2023 ARM Limited. All rights reserved.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This program is free software and is provided to you under the terms of the
7*4882a593Smuzhiyun * GNU General Public License version 2 as published by the Free Software
8*4882a593Smuzhiyun * Foundation, and any use by you of this program is subject to the terms
9*4882a593Smuzhiyun * of such GNU license.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful,
12*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of
13*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14*4882a593Smuzhiyun * GNU General Public License for more details.
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
17*4882a593Smuzhiyun * along with this program; if not, you can access it online at
18*4882a593Smuzhiyun * http://www.gnu.org/licenses/gpl-2.0.html.
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun */
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * Run-time work-arounds helpers
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include <mali_base_hwconfig_features.h>
27*4882a593Smuzhiyun #include <mali_base_hwconfig_issues.h>
28*4882a593Smuzhiyun #include "gpu/mali_kbase_gpu_regmap.h"
29*4882a593Smuzhiyun #include "mali_kbase.h"
30*4882a593Smuzhiyun #include "mali_kbase_hw.h"
31*4882a593Smuzhiyun
kbase_hw_set_features_mask(struct kbase_device * kbdev)32*4882a593Smuzhiyun void kbase_hw_set_features_mask(struct kbase_device *kbdev)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun const enum base_hw_feature *features;
35*4882a593Smuzhiyun u32 gpu_id;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun gpu_id = kbdev->gpu_props.props.raw_props.gpu_id;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun switch (gpu_id & GPU_ID2_PRODUCT_MODEL) {
40*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TMIX:
41*4882a593Smuzhiyun features = base_hw_features_tMIx;
42*4882a593Smuzhiyun break;
43*4882a593Smuzhiyun case GPU_ID2_PRODUCT_THEX:
44*4882a593Smuzhiyun features = base_hw_features_tHEx;
45*4882a593Smuzhiyun break;
46*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TSIX:
47*4882a593Smuzhiyun features = base_hw_features_tSIx;
48*4882a593Smuzhiyun break;
49*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TDVX:
50*4882a593Smuzhiyun features = base_hw_features_tDVx;
51*4882a593Smuzhiyun break;
52*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TNOX:
53*4882a593Smuzhiyun features = base_hw_features_tNOx;
54*4882a593Smuzhiyun break;
55*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TGOX:
56*4882a593Smuzhiyun features = base_hw_features_tGOx;
57*4882a593Smuzhiyun break;
58*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TTRX:
59*4882a593Smuzhiyun features = base_hw_features_tTRx;
60*4882a593Smuzhiyun break;
61*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TNAX:
62*4882a593Smuzhiyun features = base_hw_features_tNAx;
63*4882a593Smuzhiyun break;
64*4882a593Smuzhiyun case GPU_ID2_PRODUCT_LBEX:
65*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TBEX:
66*4882a593Smuzhiyun features = base_hw_features_tBEx;
67*4882a593Smuzhiyun break;
68*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TBAX:
69*4882a593Smuzhiyun features = base_hw_features_tBAx;
70*4882a593Smuzhiyun break;
71*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TODX:
72*4882a593Smuzhiyun case GPU_ID2_PRODUCT_LODX:
73*4882a593Smuzhiyun features = base_hw_features_tODx;
74*4882a593Smuzhiyun break;
75*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TGRX:
76*4882a593Smuzhiyun features = base_hw_features_tGRx;
77*4882a593Smuzhiyun break;
78*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TVAX:
79*4882a593Smuzhiyun features = base_hw_features_tVAx;
80*4882a593Smuzhiyun break;
81*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TTUX:
82*4882a593Smuzhiyun case GPU_ID2_PRODUCT_LTUX:
83*4882a593Smuzhiyun features = base_hw_features_tTUx;
84*4882a593Smuzhiyun break;
85*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TTIX:
86*4882a593Smuzhiyun case GPU_ID2_PRODUCT_LTIX:
87*4882a593Smuzhiyun features = base_hw_features_tTIx;
88*4882a593Smuzhiyun break;
89*4882a593Smuzhiyun default:
90*4882a593Smuzhiyun features = base_hw_features_generic;
91*4882a593Smuzhiyun break;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun for (; *features != BASE_HW_FEATURE_END; features++)
95*4882a593Smuzhiyun set_bit(*features, &kbdev->hw_features_mask[0]);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun #if defined(CONFIG_MALI_VECTOR_DUMP)
98*4882a593Smuzhiyun /* When dumping is enabled, need to disable flush reduction optimization
99*4882a593Smuzhiyun * for GPUs on which it is safe to have only cache clean operation at
100*4882a593Smuzhiyun * the end of job chain.
101*4882a593Smuzhiyun * This is required to make vector dump work. There is some discrepancy
102*4882a593Smuzhiyun * in the implementation of flush reduction optimization due to
103*4882a593Smuzhiyun * unclear or ambiguous ARCH spec.
104*4882a593Smuzhiyun */
105*4882a593Smuzhiyun if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_CLEAN_ONLY_SAFE))
106*4882a593Smuzhiyun clear_bit(BASE_HW_FEATURE_FLUSH_REDUCTION,
107*4882a593Smuzhiyun &kbdev->hw_features_mask[0]);
108*4882a593Smuzhiyun #endif
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /**
112*4882a593Smuzhiyun * kbase_hw_get_issues_for_new_id - Get the hardware issues for a new GPU ID
113*4882a593Smuzhiyun * @kbdev: Device pointer
114*4882a593Smuzhiyun *
115*4882a593Smuzhiyun * Return: pointer to an array of hardware issues, terminated by
116*4882a593Smuzhiyun * BASE_HW_ISSUE_END.
117*4882a593Smuzhiyun *
118*4882a593Smuzhiyun * In debugging versions of the driver, unknown versions of a known GPU will
119*4882a593Smuzhiyun * be treated as the most recent known version not later than the actual
120*4882a593Smuzhiyun * version. In such circumstances, the GPU ID in @kbdev will also be replaced
121*4882a593Smuzhiyun * with the most recent known version.
122*4882a593Smuzhiyun *
123*4882a593Smuzhiyun * Note: The GPU configuration must have been read by kbase_gpuprops_get_props()
124*4882a593Smuzhiyun * before calling this function.
125*4882a593Smuzhiyun */
kbase_hw_get_issues_for_new_id(struct kbase_device * kbdev)126*4882a593Smuzhiyun static const enum base_hw_issue *kbase_hw_get_issues_for_new_id(
127*4882a593Smuzhiyun struct kbase_device *kbdev)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun const enum base_hw_issue *issues = NULL;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun struct base_hw_product {
132*4882a593Smuzhiyun u32 product_model;
133*4882a593Smuzhiyun struct {
134*4882a593Smuzhiyun u32 version;
135*4882a593Smuzhiyun const enum base_hw_issue *issues;
136*4882a593Smuzhiyun } map[7];
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun static const struct base_hw_product base_hw_products[] = {
140*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TMIX,
141*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 1), base_hw_issues_tMIx_r0p0_05dev0 },
142*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 2), base_hw_issues_tMIx_r0p0 },
143*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 1, 0), base_hw_issues_tMIx_r0p1 },
144*4882a593Smuzhiyun { U32_MAX /* sentinel value */, NULL } } },
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun { GPU_ID2_PRODUCT_THEX,
147*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tHEx_r0p0 },
148*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 1), base_hw_issues_tHEx_r0p0 },
149*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 1, 0), base_hw_issues_tHEx_r0p1 },
150*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 1, 1), base_hw_issues_tHEx_r0p1 },
151*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 2, 0), base_hw_issues_tHEx_r0p2 },
152*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 3, 0), base_hw_issues_tHEx_r0p3 },
153*4882a593Smuzhiyun { U32_MAX, NULL } } },
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TSIX,
156*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tSIx_r0p0 },
157*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 1), base_hw_issues_tSIx_r0p0 },
158*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 1, 0), base_hw_issues_tSIx_r0p1 },
159*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 0, 0), base_hw_issues_tSIx_r1p0 },
160*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 1, 0), base_hw_issues_tSIx_r1p1 },
161*4882a593Smuzhiyun { U32_MAX, NULL } } },
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TDVX,
164*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tDVx_r0p0 },
165*4882a593Smuzhiyun { U32_MAX, NULL } } },
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TNOX,
168*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tNOx_r0p0 },
169*4882a593Smuzhiyun { U32_MAX, NULL } } },
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TGOX,
172*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tGOx_r0p0 },
173*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 0, 0), base_hw_issues_tGOx_r1p0 },
174*4882a593Smuzhiyun { U32_MAX, NULL } } },
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TTRX,
177*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tTRx_r0p0 },
178*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 3), base_hw_issues_tTRx_r0p0 },
179*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 1, 0), base_hw_issues_tTRx_r0p1 },
180*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 1, 1), base_hw_issues_tTRx_r0p1 },
181*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 2, 0), base_hw_issues_tTRx_r0p2 },
182*4882a593Smuzhiyun { U32_MAX, NULL } } },
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TNAX,
185*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tNAx_r0p0 },
186*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 3), base_hw_issues_tNAx_r0p0 },
187*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 4), base_hw_issues_tNAx_r0p0 },
188*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 5), base_hw_issues_tNAx_r0p0 },
189*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 1, 0), base_hw_issues_tNAx_r0p1 },
190*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 1, 1), base_hw_issues_tNAx_r0p1 },
191*4882a593Smuzhiyun { U32_MAX, NULL } } },
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun { GPU_ID2_PRODUCT_LBEX,
194*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(1, 0, 0), base_hw_issues_lBEx_r1p0 },
195*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 1, 0), base_hw_issues_lBEx_r1p1 },
196*4882a593Smuzhiyun { U32_MAX, NULL } } },
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TBEX,
199*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tBEx_r0p0 },
200*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 3), base_hw_issues_tBEx_r0p0 },
201*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 1, 0), base_hw_issues_tBEx_r0p1 },
202*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 0, 0), base_hw_issues_tBEx_r1p0 },
203*4882a593Smuzhiyun { U32_MAX, NULL } } },
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TBAX,
206*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tBAx_r0p0 },
207*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 1), base_hw_issues_tBAx_r0p0 },
208*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 2), base_hw_issues_tBAx_r0p0 },
209*4882a593Smuzhiyun { U32_MAX, NULL } } },
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TODX,
212*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tODx_r0p0 },
213*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 4), base_hw_issues_tODx_r0p0 },
214*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 0, 5), base_hw_issues_tODx_r0p0 },
215*4882a593Smuzhiyun { U32_MAX, NULL } } },
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun { GPU_ID2_PRODUCT_LODX,
218*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tODx_r0p0 },
219*4882a593Smuzhiyun { U32_MAX, NULL } } },
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TGRX,
222*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tGRx_r0p0 },
223*4882a593Smuzhiyun { U32_MAX, NULL } } },
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TVAX,
226*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tVAx_r0p0 },
227*4882a593Smuzhiyun { U32_MAX, NULL } } },
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TTUX,
230*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tTUx_r0p0 },
231*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(0, 1, 0), base_hw_issues_tTUx_r0p1 },
232*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 0, 0), base_hw_issues_tTUx_r1p0 },
233*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 1, 0), base_hw_issues_tTUx_r1p1 },
234*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 2, 0), base_hw_issues_tTUx_r1p2 },
235*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 3, 0), base_hw_issues_tTUx_r1p3 },
236*4882a593Smuzhiyun { U32_MAX, NULL } } },
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun { GPU_ID2_PRODUCT_LTUX,
239*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tTUx_r0p0 },
240*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 0, 0), base_hw_issues_tTUx_r1p0 },
241*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 1, 0), base_hw_issues_tTUx_r1p1 },
242*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 2, 0), base_hw_issues_tTUx_r1p2 },
243*4882a593Smuzhiyun { GPU_ID2_VERSION_MAKE(1, 3, 0), base_hw_issues_tTUx_r1p3 },
244*4882a593Smuzhiyun { U32_MAX, NULL } } },
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun { GPU_ID2_PRODUCT_TTIX,
247*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tTIx_r0p0 },
248*4882a593Smuzhiyun { U32_MAX, NULL } } },
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun { GPU_ID2_PRODUCT_LTIX,
251*4882a593Smuzhiyun { { GPU_ID2_VERSION_MAKE(0, 0, 0), base_hw_issues_tTIx_r0p0 },
252*4882a593Smuzhiyun { U32_MAX, NULL } } },
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun };
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun u32 gpu_id = kbdev->gpu_props.props.raw_props.gpu_id;
257*4882a593Smuzhiyun const u32 product_model = gpu_id & GPU_ID2_PRODUCT_MODEL;
258*4882a593Smuzhiyun const struct base_hw_product *product = NULL;
259*4882a593Smuzhiyun size_t p;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun /* Stop when we reach the end of the products array. */
262*4882a593Smuzhiyun for (p = 0; p < ARRAY_SIZE(base_hw_products); ++p) {
263*4882a593Smuzhiyun if (product_model == base_hw_products[p].product_model) {
264*4882a593Smuzhiyun product = &base_hw_products[p];
265*4882a593Smuzhiyun break;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun if (product != NULL) {
270*4882a593Smuzhiyun /* Found a matching product. */
271*4882a593Smuzhiyun const u32 version = gpu_id & GPU_ID2_VERSION;
272*4882a593Smuzhiyun u32 fallback_version = 0;
273*4882a593Smuzhiyun const enum base_hw_issue *fallback_issues = NULL;
274*4882a593Smuzhiyun size_t v;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /* Stop when we reach the end of the map. */
277*4882a593Smuzhiyun for (v = 0; product->map[v].version != U32_MAX; ++v) {
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun if (version == product->map[v].version) {
280*4882a593Smuzhiyun /* Exact match so stop. */
281*4882a593Smuzhiyun issues = product->map[v].issues;
282*4882a593Smuzhiyun break;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun /* Check whether this is a candidate for most recent
286*4882a593Smuzhiyun * known version not later than the actual version.
287*4882a593Smuzhiyun */
288*4882a593Smuzhiyun if ((version > product->map[v].version) &&
289*4882a593Smuzhiyun (product->map[v].version >= fallback_version)) {
290*4882a593Smuzhiyun #if MALI_CUSTOMER_RELEASE
291*4882a593Smuzhiyun /* Match on version's major and minor fields */
292*4882a593Smuzhiyun if (((version ^ product->map[v].version) >>
293*4882a593Smuzhiyun GPU_ID2_VERSION_MINOR_SHIFT) == 0)
294*4882a593Smuzhiyun #endif
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun fallback_version = product->map[v].version;
297*4882a593Smuzhiyun fallback_issues = product->map[v].issues;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun if ((issues == NULL) && (fallback_issues != NULL)) {
303*4882a593Smuzhiyun /* Fall back to the issue set of the most recent known
304*4882a593Smuzhiyun * version not later than the actual version.
305*4882a593Smuzhiyun */
306*4882a593Smuzhiyun issues = fallback_issues;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun dev_notice(kbdev->dev, "r%dp%d status %d not found in HW issues table;\n",
309*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_MAJOR) >> GPU_ID2_VERSION_MAJOR_SHIFT,
310*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_MINOR) >> GPU_ID2_VERSION_MINOR_SHIFT,
311*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_STATUS) >>
312*4882a593Smuzhiyun GPU_ID2_VERSION_STATUS_SHIFT);
313*4882a593Smuzhiyun dev_notice(kbdev->dev, "falling back to closest match: r%dp%d status %d\n",
314*4882a593Smuzhiyun (fallback_version & GPU_ID2_VERSION_MAJOR) >>
315*4882a593Smuzhiyun GPU_ID2_VERSION_MAJOR_SHIFT,
316*4882a593Smuzhiyun (fallback_version & GPU_ID2_VERSION_MINOR) >>
317*4882a593Smuzhiyun GPU_ID2_VERSION_MINOR_SHIFT,
318*4882a593Smuzhiyun (fallback_version & GPU_ID2_VERSION_STATUS) >>
319*4882a593Smuzhiyun GPU_ID2_VERSION_STATUS_SHIFT);
320*4882a593Smuzhiyun dev_notice(kbdev->dev,
321*4882a593Smuzhiyun "Execution proceeding normally with fallback match\n");
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun gpu_id &= ~GPU_ID2_VERSION;
324*4882a593Smuzhiyun gpu_id |= fallback_version;
325*4882a593Smuzhiyun kbdev->gpu_props.props.raw_props.gpu_id = gpu_id;
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun kbase_gpuprops_update_core_props_gpu_id(
328*4882a593Smuzhiyun &kbdev->gpu_props.props);
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun return issues;
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun
kbase_hw_set_issues_mask(struct kbase_device * kbdev)334*4882a593Smuzhiyun int kbase_hw_set_issues_mask(struct kbase_device *kbdev)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun const enum base_hw_issue *issues;
337*4882a593Smuzhiyun u32 gpu_id;
338*4882a593Smuzhiyun u32 impl_tech;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun gpu_id = kbdev->gpu_props.props.raw_props.gpu_id;
341*4882a593Smuzhiyun impl_tech = kbdev->gpu_props.props.thread_props.impl_tech;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun if (impl_tech != IMPLEMENTATION_MODEL) {
344*4882a593Smuzhiyun issues = kbase_hw_get_issues_for_new_id(kbdev);
345*4882a593Smuzhiyun if (issues == NULL) {
346*4882a593Smuzhiyun dev_err(kbdev->dev,
347*4882a593Smuzhiyun "HW product - Unknown GPU ID %x", gpu_id);
348*4882a593Smuzhiyun return -EINVAL;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun #if !MALI_CUSTOMER_RELEASE
352*4882a593Smuzhiyun /* The GPU ID might have been replaced with the last
353*4882a593Smuzhiyun * known version of the same GPU.
354*4882a593Smuzhiyun */
355*4882a593Smuzhiyun gpu_id = kbdev->gpu_props.props.raw_props.gpu_id;
356*4882a593Smuzhiyun #endif
357*4882a593Smuzhiyun } else {
358*4882a593Smuzhiyun /* Software model */
359*4882a593Smuzhiyun switch (gpu_id & GPU_ID2_PRODUCT_MODEL) {
360*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TMIX:
361*4882a593Smuzhiyun issues = base_hw_issues_model_tMIx;
362*4882a593Smuzhiyun break;
363*4882a593Smuzhiyun case GPU_ID2_PRODUCT_THEX:
364*4882a593Smuzhiyun issues = base_hw_issues_model_tHEx;
365*4882a593Smuzhiyun break;
366*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TSIX:
367*4882a593Smuzhiyun issues = base_hw_issues_model_tSIx;
368*4882a593Smuzhiyun break;
369*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TDVX:
370*4882a593Smuzhiyun issues = base_hw_issues_model_tDVx;
371*4882a593Smuzhiyun break;
372*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TNOX:
373*4882a593Smuzhiyun issues = base_hw_issues_model_tNOx;
374*4882a593Smuzhiyun break;
375*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TGOX:
376*4882a593Smuzhiyun issues = base_hw_issues_model_tGOx;
377*4882a593Smuzhiyun break;
378*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TTRX:
379*4882a593Smuzhiyun issues = base_hw_issues_model_tTRx;
380*4882a593Smuzhiyun break;
381*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TNAX:
382*4882a593Smuzhiyun issues = base_hw_issues_model_tNAx;
383*4882a593Smuzhiyun break;
384*4882a593Smuzhiyun case GPU_ID2_PRODUCT_LBEX:
385*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TBEX:
386*4882a593Smuzhiyun issues = base_hw_issues_model_tBEx;
387*4882a593Smuzhiyun break;
388*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TBAX:
389*4882a593Smuzhiyun issues = base_hw_issues_model_tBAx;
390*4882a593Smuzhiyun break;
391*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TODX:
392*4882a593Smuzhiyun case GPU_ID2_PRODUCT_LODX:
393*4882a593Smuzhiyun issues = base_hw_issues_model_tODx;
394*4882a593Smuzhiyun break;
395*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TGRX:
396*4882a593Smuzhiyun issues = base_hw_issues_model_tGRx;
397*4882a593Smuzhiyun break;
398*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TVAX:
399*4882a593Smuzhiyun issues = base_hw_issues_model_tVAx;
400*4882a593Smuzhiyun break;
401*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TTUX:
402*4882a593Smuzhiyun case GPU_ID2_PRODUCT_LTUX:
403*4882a593Smuzhiyun issues = base_hw_issues_model_tTUx;
404*4882a593Smuzhiyun break;
405*4882a593Smuzhiyun case GPU_ID2_PRODUCT_TTIX:
406*4882a593Smuzhiyun case GPU_ID2_PRODUCT_LTIX:
407*4882a593Smuzhiyun issues = base_hw_issues_model_tTIx;
408*4882a593Smuzhiyun break;
409*4882a593Smuzhiyun default:
410*4882a593Smuzhiyun dev_err(kbdev->dev,
411*4882a593Smuzhiyun "HW issues - Unknown GPU ID %x", gpu_id);
412*4882a593Smuzhiyun return -EINVAL;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun dev_info(kbdev->dev,
417*4882a593Smuzhiyun "GPU identified as 0x%x arch %d.%d.%d r%dp%d status %d",
418*4882a593Smuzhiyun (gpu_id & GPU_ID2_PRODUCT_MAJOR) >>
419*4882a593Smuzhiyun GPU_ID2_PRODUCT_MAJOR_SHIFT,
420*4882a593Smuzhiyun (gpu_id & GPU_ID2_ARCH_MAJOR) >>
421*4882a593Smuzhiyun GPU_ID2_ARCH_MAJOR_SHIFT,
422*4882a593Smuzhiyun (gpu_id & GPU_ID2_ARCH_MINOR) >>
423*4882a593Smuzhiyun GPU_ID2_ARCH_MINOR_SHIFT,
424*4882a593Smuzhiyun (gpu_id & GPU_ID2_ARCH_REV) >>
425*4882a593Smuzhiyun GPU_ID2_ARCH_REV_SHIFT,
426*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_MAJOR) >>
427*4882a593Smuzhiyun GPU_ID2_VERSION_MAJOR_SHIFT,
428*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_MINOR) >>
429*4882a593Smuzhiyun GPU_ID2_VERSION_MINOR_SHIFT,
430*4882a593Smuzhiyun (gpu_id & GPU_ID2_VERSION_STATUS) >>
431*4882a593Smuzhiyun GPU_ID2_VERSION_STATUS_SHIFT);
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun for (; *issues != BASE_HW_ISSUE_END; issues++)
434*4882a593Smuzhiyun set_bit(*issues, &kbdev->hw_issues_mask[0]);
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun return 0;
437*4882a593Smuzhiyun }
438