xref: /OK3568_Linux_fs/kernel/drivers/gpio/gpio-wm831x.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * gpiolib support for Wolfson WM831x PMICs
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2009 Wolfson Microelectronics PLC.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/gpio/driver.h>
15*4882a593Smuzhiyun #include <linux/mfd/core.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/seq_file.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <linux/mfd/wm831x/core.h>
20*4882a593Smuzhiyun #include <linux/mfd/wm831x/pdata.h>
21*4882a593Smuzhiyun #include <linux/mfd/wm831x/gpio.h>
22*4882a593Smuzhiyun #include <linux/mfd/wm831x/irq.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun struct wm831x_gpio {
25*4882a593Smuzhiyun 	struct wm831x *wm831x;
26*4882a593Smuzhiyun 	struct gpio_chip gpio_chip;
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun 
wm831x_gpio_direction_in(struct gpio_chip * chip,unsigned offset)29*4882a593Smuzhiyun static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
32*4882a593Smuzhiyun 	struct wm831x *wm831x = wm831x_gpio->wm831x;
33*4882a593Smuzhiyun 	int val = WM831X_GPN_DIR;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	if (wm831x->has_gpio_ena)
36*4882a593Smuzhiyun 		val |= WM831X_GPN_TRI;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
39*4882a593Smuzhiyun 			       WM831X_GPN_DIR | WM831X_GPN_TRI |
40*4882a593Smuzhiyun 			       WM831X_GPN_FN_MASK, val);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun 
wm831x_gpio_get(struct gpio_chip * chip,unsigned offset)43*4882a593Smuzhiyun static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
46*4882a593Smuzhiyun 	struct wm831x *wm831x = wm831x_gpio->wm831x;
47*4882a593Smuzhiyun 	int ret;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL);
50*4882a593Smuzhiyun 	if (ret < 0)
51*4882a593Smuzhiyun 		return ret;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	if (ret & 1 << offset)
54*4882a593Smuzhiyun 		return 1;
55*4882a593Smuzhiyun 	else
56*4882a593Smuzhiyun 		return 0;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
wm831x_gpio_set(struct gpio_chip * chip,unsigned offset,int value)59*4882a593Smuzhiyun static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
62*4882a593Smuzhiyun 	struct wm831x *wm831x = wm831x_gpio->wm831x;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset,
65*4882a593Smuzhiyun 			value << offset);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
wm831x_gpio_direction_out(struct gpio_chip * chip,unsigned offset,int value)68*4882a593Smuzhiyun static int wm831x_gpio_direction_out(struct gpio_chip *chip,
69*4882a593Smuzhiyun 				     unsigned offset, int value)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
72*4882a593Smuzhiyun 	struct wm831x *wm831x = wm831x_gpio->wm831x;
73*4882a593Smuzhiyun 	int val = 0;
74*4882a593Smuzhiyun 	int ret;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	if (wm831x->has_gpio_ena)
77*4882a593Smuzhiyun 		val |= WM831X_GPN_TRI;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	ret = wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
80*4882a593Smuzhiyun 			      WM831X_GPN_DIR | WM831X_GPN_TRI |
81*4882a593Smuzhiyun 			      WM831X_GPN_FN_MASK, val);
82*4882a593Smuzhiyun 	if (ret < 0)
83*4882a593Smuzhiyun 		return ret;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	/* Can only set GPIO state once it's in output mode */
86*4882a593Smuzhiyun 	wm831x_gpio_set(chip, offset, value);
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	return 0;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
wm831x_gpio_to_irq(struct gpio_chip * chip,unsigned offset)91*4882a593Smuzhiyun static int wm831x_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
94*4882a593Smuzhiyun 	struct wm831x *wm831x = wm831x_gpio->wm831x;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	return irq_create_mapping(wm831x->irq_domain,
97*4882a593Smuzhiyun 				  WM831X_IRQ_GPIO_1 + offset);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
wm831x_gpio_set_debounce(struct wm831x * wm831x,unsigned offset,unsigned debounce)100*4882a593Smuzhiyun static int wm831x_gpio_set_debounce(struct wm831x *wm831x, unsigned offset,
101*4882a593Smuzhiyun 				    unsigned debounce)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	int reg = WM831X_GPIO1_CONTROL + offset;
104*4882a593Smuzhiyun 	int ret, fn;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	ret = wm831x_reg_read(wm831x, reg);
107*4882a593Smuzhiyun 	if (ret < 0)
108*4882a593Smuzhiyun 		return ret;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	switch (ret & WM831X_GPN_FN_MASK) {
111*4882a593Smuzhiyun 	case 0:
112*4882a593Smuzhiyun 	case 1:
113*4882a593Smuzhiyun 		break;
114*4882a593Smuzhiyun 	default:
115*4882a593Smuzhiyun 		/* Not in GPIO mode */
116*4882a593Smuzhiyun 		return -EBUSY;
117*4882a593Smuzhiyun 	}
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	if (debounce >= 32 && debounce <= 64)
120*4882a593Smuzhiyun 		fn = 0;
121*4882a593Smuzhiyun 	else if (debounce >= 4000 && debounce <= 8000)
122*4882a593Smuzhiyun 		fn = 1;
123*4882a593Smuzhiyun 	else
124*4882a593Smuzhiyun 		return -EINVAL;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	return wm831x_set_bits(wm831x, reg, WM831X_GPN_FN_MASK, fn);
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun 
wm831x_set_config(struct gpio_chip * chip,unsigned int offset,unsigned long config)129*4882a593Smuzhiyun static int wm831x_set_config(struct gpio_chip *chip, unsigned int offset,
130*4882a593Smuzhiyun 			     unsigned long config)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
133*4882a593Smuzhiyun 	struct wm831x *wm831x = wm831x_gpio->wm831x;
134*4882a593Smuzhiyun 	int reg = WM831X_GPIO1_CONTROL + offset;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	switch (pinconf_to_config_param(config)) {
137*4882a593Smuzhiyun 	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
138*4882a593Smuzhiyun 		return wm831x_set_bits(wm831x, reg,
139*4882a593Smuzhiyun 				       WM831X_GPN_OD_MASK, WM831X_GPN_OD);
140*4882a593Smuzhiyun 	case PIN_CONFIG_DRIVE_PUSH_PULL:
141*4882a593Smuzhiyun 		return wm831x_set_bits(wm831x, reg,
142*4882a593Smuzhiyun 				       WM831X_GPN_OD_MASK, 0);
143*4882a593Smuzhiyun 	case PIN_CONFIG_INPUT_DEBOUNCE:
144*4882a593Smuzhiyun 		return wm831x_gpio_set_debounce(wm831x, offset,
145*4882a593Smuzhiyun 			pinconf_to_config_argument(config));
146*4882a593Smuzhiyun 	default:
147*4882a593Smuzhiyun 		break;
148*4882a593Smuzhiyun 	}
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	return -ENOTSUPP;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_FS
wm831x_gpio_dbg_show(struct seq_file * s,struct gpio_chip * chip)154*4882a593Smuzhiyun static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun 	struct wm831x_gpio *wm831x_gpio = gpiochip_get_data(chip);
157*4882a593Smuzhiyun 	struct wm831x *wm831x = wm831x_gpio->wm831x;
158*4882a593Smuzhiyun 	int i, tristated;
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	for (i = 0; i < chip->ngpio; i++) {
161*4882a593Smuzhiyun 		int gpio = i + chip->base;
162*4882a593Smuzhiyun 		int reg;
163*4882a593Smuzhiyun 		const char *label, *pull, *powerdomain;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 		/* We report the GPIO even if it's not requested since
166*4882a593Smuzhiyun 		 * we're also reporting things like alternate
167*4882a593Smuzhiyun 		 * functions which apply even when the GPIO is not in
168*4882a593Smuzhiyun 		 * use as a GPIO.
169*4882a593Smuzhiyun 		 */
170*4882a593Smuzhiyun 		label = gpiochip_is_requested(chip, i);
171*4882a593Smuzhiyun 		if (!label)
172*4882a593Smuzhiyun 			label = "Unrequested";
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 		seq_printf(s, " gpio-%-3d (%-20.20s) ", gpio, label);
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 		reg = wm831x_reg_read(wm831x, WM831X_GPIO1_CONTROL + i);
177*4882a593Smuzhiyun 		if (reg < 0) {
178*4882a593Smuzhiyun 			dev_err(wm831x->dev,
179*4882a593Smuzhiyun 				"GPIO control %d read failed: %d\n",
180*4882a593Smuzhiyun 				gpio, reg);
181*4882a593Smuzhiyun 			seq_putc(s, '\n');
182*4882a593Smuzhiyun 			continue;
183*4882a593Smuzhiyun 		}
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 		switch (reg & WM831X_GPN_PULL_MASK) {
186*4882a593Smuzhiyun 		case WM831X_GPIO_PULL_NONE:
187*4882a593Smuzhiyun 			pull = "nopull";
188*4882a593Smuzhiyun 			break;
189*4882a593Smuzhiyun 		case WM831X_GPIO_PULL_DOWN:
190*4882a593Smuzhiyun 			pull = "pulldown";
191*4882a593Smuzhiyun 			break;
192*4882a593Smuzhiyun 		case WM831X_GPIO_PULL_UP:
193*4882a593Smuzhiyun 			pull = "pullup";
194*4882a593Smuzhiyun 			break;
195*4882a593Smuzhiyun 		default:
196*4882a593Smuzhiyun 			pull = "INVALID PULL";
197*4882a593Smuzhiyun 			break;
198*4882a593Smuzhiyun 		}
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 		switch (i + 1) {
201*4882a593Smuzhiyun 		case 1 ... 3:
202*4882a593Smuzhiyun 		case 7 ... 9:
203*4882a593Smuzhiyun 			if (reg & WM831X_GPN_PWR_DOM)
204*4882a593Smuzhiyun 				powerdomain = "VPMIC";
205*4882a593Smuzhiyun 			else
206*4882a593Smuzhiyun 				powerdomain = "DBVDD";
207*4882a593Smuzhiyun 			break;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 		case 4 ... 6:
210*4882a593Smuzhiyun 		case 10 ... 12:
211*4882a593Smuzhiyun 			if (reg & WM831X_GPN_PWR_DOM)
212*4882a593Smuzhiyun 				powerdomain = "SYSVDD";
213*4882a593Smuzhiyun 			else
214*4882a593Smuzhiyun 				powerdomain = "DBVDD";
215*4882a593Smuzhiyun 			break;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 		case 13 ... 16:
218*4882a593Smuzhiyun 			powerdomain = "TPVDD";
219*4882a593Smuzhiyun 			break;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 		default:
222*4882a593Smuzhiyun 			BUG();
223*4882a593Smuzhiyun 			break;
224*4882a593Smuzhiyun 		}
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 		tristated = reg & WM831X_GPN_TRI;
227*4882a593Smuzhiyun 		if (wm831x->has_gpio_ena)
228*4882a593Smuzhiyun 			tristated = !tristated;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 		seq_printf(s, " %s %s %s %s%s\n"
231*4882a593Smuzhiyun 			   "                                  %s%s (0x%4x)\n",
232*4882a593Smuzhiyun 			   reg & WM831X_GPN_DIR ? "in" : "out",
233*4882a593Smuzhiyun 			   wm831x_gpio_get(chip, i) ? "high" : "low",
234*4882a593Smuzhiyun 			   pull,
235*4882a593Smuzhiyun 			   powerdomain,
236*4882a593Smuzhiyun 			   reg & WM831X_GPN_POL ? "" : " inverted",
237*4882a593Smuzhiyun 			   reg & WM831X_GPN_OD ? "open-drain" : "push-pull",
238*4882a593Smuzhiyun 			   tristated ? " tristated" : "",
239*4882a593Smuzhiyun 			   reg);
240*4882a593Smuzhiyun 	}
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun #else
243*4882a593Smuzhiyun #define wm831x_gpio_dbg_show NULL
244*4882a593Smuzhiyun #endif
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun static const struct gpio_chip template_chip = {
247*4882a593Smuzhiyun 	.label			= "wm831x",
248*4882a593Smuzhiyun 	.owner			= THIS_MODULE,
249*4882a593Smuzhiyun 	.direction_input	= wm831x_gpio_direction_in,
250*4882a593Smuzhiyun 	.get			= wm831x_gpio_get,
251*4882a593Smuzhiyun 	.direction_output	= wm831x_gpio_direction_out,
252*4882a593Smuzhiyun 	.set			= wm831x_gpio_set,
253*4882a593Smuzhiyun 	.to_irq			= wm831x_gpio_to_irq,
254*4882a593Smuzhiyun 	.set_config		= wm831x_set_config,
255*4882a593Smuzhiyun 	.dbg_show		= wm831x_gpio_dbg_show,
256*4882a593Smuzhiyun 	.can_sleep		= true,
257*4882a593Smuzhiyun };
258*4882a593Smuzhiyun 
wm831x_gpio_probe(struct platform_device * pdev)259*4882a593Smuzhiyun static int wm831x_gpio_probe(struct platform_device *pdev)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun 	struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
262*4882a593Smuzhiyun 	struct wm831x_pdata *pdata = &wm831x->pdata;
263*4882a593Smuzhiyun 	struct wm831x_gpio *wm831x_gpio;
264*4882a593Smuzhiyun 	int ret;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	wm831x_gpio = devm_kzalloc(&pdev->dev, sizeof(*wm831x_gpio),
267*4882a593Smuzhiyun 				   GFP_KERNEL);
268*4882a593Smuzhiyun 	if (wm831x_gpio == NULL)
269*4882a593Smuzhiyun 		return -ENOMEM;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	wm831x_gpio->wm831x = wm831x;
272*4882a593Smuzhiyun 	wm831x_gpio->gpio_chip = template_chip;
273*4882a593Smuzhiyun 	wm831x_gpio->gpio_chip.ngpio = wm831x->num_gpio;
274*4882a593Smuzhiyun 	wm831x_gpio->gpio_chip.parent = &pdev->dev;
275*4882a593Smuzhiyun 	if (pdata && pdata->gpio_base)
276*4882a593Smuzhiyun 		wm831x_gpio->gpio_chip.base = pdata->gpio_base;
277*4882a593Smuzhiyun 	else
278*4882a593Smuzhiyun 		wm831x_gpio->gpio_chip.base = -1;
279*4882a593Smuzhiyun #ifdef CONFIG_OF_GPIO
280*4882a593Smuzhiyun 	wm831x_gpio->gpio_chip.of_node = wm831x->dev->of_node;
281*4882a593Smuzhiyun #endif
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	ret = devm_gpiochip_add_data(&pdev->dev, &wm831x_gpio->gpio_chip,
284*4882a593Smuzhiyun 				     wm831x_gpio);
285*4882a593Smuzhiyun 	if (ret < 0) {
286*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
287*4882a593Smuzhiyun 		return ret;
288*4882a593Smuzhiyun 	}
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	platform_set_drvdata(pdev, wm831x_gpio);
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	return ret;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun static struct platform_driver wm831x_gpio_driver = {
296*4882a593Smuzhiyun 	.driver.name	= "wm831x-gpio",
297*4882a593Smuzhiyun 	.probe		= wm831x_gpio_probe,
298*4882a593Smuzhiyun };
299*4882a593Smuzhiyun 
wm831x_gpio_init(void)300*4882a593Smuzhiyun static int __init wm831x_gpio_init(void)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun 	return platform_driver_register(&wm831x_gpio_driver);
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun subsys_initcall(wm831x_gpio_init);
305*4882a593Smuzhiyun 
wm831x_gpio_exit(void)306*4882a593Smuzhiyun static void __exit wm831x_gpio_exit(void)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun 	platform_driver_unregister(&wm831x_gpio_driver);
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun module_exit(wm831x_gpio_exit);
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
313*4882a593Smuzhiyun MODULE_DESCRIPTION("GPIO interface for WM831x PMICs");
314*4882a593Smuzhiyun MODULE_LICENSE("GPL");
315*4882a593Smuzhiyun MODULE_ALIAS("platform:wm831x-gpio");
316